IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Regular Section
Algorithm of Determining BER-Minimized Block Delay for Joint Linear Transceiver Design with CSI
Chun-Hsien WU
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2012 Volume E95.A Issue 3 Pages 657-660

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Abstract
This letter proposes an algorithm of determining the BER-minimized block delay for detection and the associated precoder design once the channel state information and limited transmission power are given. Simulation cases demonstrate the adjusting capability of the proposed algorithm for achieving best BER performance of the joint linear transceiver design.
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© 2012 The Institute of Electronics, Information and Communication Engineers
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