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ports: Add RISC-V 32 bit QEMU port. #12853
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name: qemu-riscv port | ||
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on: | ||
push: | ||
pull_request: | ||
paths: | ||
- '.github/workflows/*.yml' | ||
- 'tools/**' | ||
- 'py/**' | ||
- 'extmod/**' | ||
- 'shared/**' | ||
- 'lib/**' | ||
- 'drivers/**' | ||
- 'ports/qemu-arm/main.c' | ||
- 'ports/qemu-riscv/**' | ||
- 'tests/**' | ||
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concurrency: | ||
group: ${{ github.workflow }}-${{ github.ref }} | ||
cancel-in-progress: true | ||
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jobs: | ||
build_and_test: | ||
runs-on: ubuntu-latest | ||
steps: | ||
- uses: actions/checkout@v4 | ||
- name: Install packages | ||
run: source tools/ci.sh && ci_qemu_riscv_setup | ||
- name: Build and run test suite | ||
run: source tools/ci.sh && ci_qemu_riscv_build | ||
- name: Print failures | ||
if: failure() | ||
run: grep --before-context=100 --text "FAIL" ports/qemu-riscv/build/console.out |
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include ../../py/mkenv.mk | ||
-include mpconfigport.mk | ||
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# qstr definitions (must come before including py.mk) | ||
QSTR_DEFS = qstrdefsport.h | ||
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# MicroPython feature configurations | ||
MICROPY_ROM_TEXT_COMPRESSION ?= 1 | ||
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# include py core make definitions | ||
include $(TOP)/py/py.mk | ||
include $(TOP)/extmod/extmod.mk | ||
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BOARD ?= virt | ||
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CROSS_COMPILE ?= riscv64-unknown-elf- | ||
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GCC_VERSION = $(word 1, $(subst ., , $(shell $(CC) -dumpversion))) | ||
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# If Picolibc is available then select it explicitly. Ubuntu 22.04 ships its | ||
# bare metal RISC-V toolchain with Picolibc rather than Newlib, and the default | ||
# is "nosys" so a value must be provided. To avoid having per-distro | ||
# workarounds, always select Picolibc if available. | ||
PICOLIBC_SPECS = $(shell $(CC) --print-file-name=picolibc.specs) | ||
ifeq ($(PICOLIBC_SPECS),picolibc.specs) | ||
# Picolibc was not found. | ||
SPECS_FRAGMENT = | ||
else | ||
SPECS_FRAGMENT = --specs=$(PICOLIBC_SPECS) | ||
CFLAGS += $(SPECS_FRAGMENT) | ||
endif | ||
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ifeq ($(BOARD),virt) | ||
ABI = ilp32 | ||
# GCC 10 and lower do not recognise the Zicsr extension in the | ||
# architecture name. "Make" unfortunately does not provide any simple way | ||
# to perform numeric comparisons, so to keep things simple we assume that | ||
# GCC is at least version 10 for the time being. | ||
ifeq ($(GCC_VERSION),10) | ||
ARCH ?= rv32imac | ||
else | ||
# Recent GCC versions explicitly require to declare extensions. | ||
ARCH ?= rv32imac_zicsr | ||
ARCH_LD ?= rv32imac_zicsr | ||
endif | ||
AFLAGS = -mabi=$(ABI) -march=$(ARCH) | ||
CFLAGS += $(AFLAGS) | ||
CFLAGS += -DQEMU_SOC_VIRT | ||
ARCH_LD ?= $(ARCH) | ||
LDSCRIPT = virt.ld | ||
LDFLAGS += -mabi=$(ABI) -march=$(ARCH_LD) -T $(LDSCRIPT) -Wl,-EL | ||
SRC_BOARD_O = shared/runtime/gchelper_native.o shared/runtime/gchelper_rv32i.o | ||
SRC_BOARD_O += entrypoint.o | ||
endif | ||
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INC += -I. | ||
INC += -I$(TOP) | ||
INC += -I$(BUILD) | ||
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CFLAGS += $(INC) -Wall -Wpointer-arith -Wdouble-promotion -Wfloat-conversion -Werror -std=gnu99 $(COPT) \ | ||
-ffunction-sections -fdata-sections | ||
CFLAGS += $(CFLAGS_EXTRA) | ||
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LD = $(CC) | ||
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# Debugging/Optimization | ||
ifeq ($(DEBUG), 1) | ||
CFLAGS += -g | ||
COPT = -O0 | ||
else | ||
COPT += -Os -DNDEBUG | ||
endif | ||
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LDFLAGS += $(SPECS_FRAGMENT) -Wl,--gc-sections -Wl,-Map=$(@:.elf=.map) | ||
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SRC_COMMON_C = \ | ||
interrupts.c \ | ||
startup.c \ | ||
uart.c \ | ||
shared/libc/string0.c \ | ||
shared/runtime/sys_stdio_mphal.c \ | ||
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SRC_RUN_C = \ | ||
ports/qemu-arm/main.c \ | ||
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SRC_TEST_C = \ | ||
test_main.c \ | ||
lib/tinytest/tinytest.c \ | ||
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LIB_SRC_C += $(SRC_LIB_LIBM_C) | ||
LIB_SRC_C += $(SRC_LIB_LIBM_SQRT_SW_C) | ||
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OBJ_COMMON = | ||
OBJ_COMMON += $(PY_O) | ||
OBJ_COMMON += $(addprefix $(BUILD)/, $(SRC_COMMON_C:.c=.o)) | ||
OBJ_COMMON += $(addprefix $(BUILD)/, $(SRC_BOARD_O)) | ||
OBJ_COMMON += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) | ||
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OBJ_RUN = | ||
OBJ_RUN += $(addprefix $(BUILD)/, $(SRC_RUN_C:.c=.o)) | ||
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ALL_OBJ_RUN = $(OBJ_COMMON) $(OBJ_RUN) | ||
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OBJ_TEST = | ||
OBJ_TEST += $(addprefix $(BUILD)/, $(SRC_TEST_C:.c=.o)) | ||
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ALL_OBJ_TEST = $(OBJ_COMMON) $(OBJ_TEST) | ||
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# All object files, needed to get dependencies correct | ||
OBJ = $(OBJ_COMMON) $(OBJ_RUN) $(OBJ_TEST) | ||
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# List of sources for qstr extraction | ||
SRC_QSTR += $(SRC_COMMON_C) $(SRC_RUN_C) $(LIB_SRC_C) | ||
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all: run | ||
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# `make debug` will block QEMU until a debugger is connected to port 1234. | ||
debug: $(BUILD)/firmware.elf | ||
qemu-system-riscv32 -machine $(BOARD) -bios none $(QEMU_EXTRA) -nographic -monitor null -semihosting -serial mon:stdio -S -s -kernel $< | ||
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run: $(BUILD)/firmware.elf | ||
qemu-system-riscv32 -machine $(BOARD) -bios none $(QEMU_EXTRA) -nographic -monitor null -semihosting -kernel $< | ||
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$(BUILD)/firmware.elf: $(LDSCRIPT) $(ALL_OBJ_RUN) | ||
$(Q)$(LD) $(LDFLAGS) -o $@ $(ALL_OBJ_RUN) $(LIBS) | ||
$(Q)$(SIZE) $@ | ||
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include $(TOP)/py/mkrules.mk |
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LIB_SRC_C = shared/upytesthelper/upytesthelper.c | ||
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include Makefile | ||
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CFLAGS += -DTEST | ||
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.PHONY: $(BUILD)/genhdr/tests.h | ||
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TESTS_PROFILE = $(dir $(abspath $(firstword $(MAKEFILE_LIST))))/tests_profile.txt | ||
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$(BUILD)/test_main.o: $(BUILD)/genhdr/tests.h | ||
$(BUILD)/genhdr/tests.h: | ||
(cd $(TOP)/tests; ./run-tests.py --target=qemu-riscv --write-exp) | ||
$(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py --profile $(TESTS_PROFILE) $(addprefix --exclude ,$(TESTS_EXCLUDE))) > $@ | ||
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$(BUILD)/lib/tinytest/tinytest.o: CFLAGS += -DNO_FORKING | ||
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$(BUILD)/firmware-test.elf: $(LDSCRIPT) $(ALL_OBJ_TEST) | ||
$(Q)$(LD) $(LDFLAGS) -o $@ $(ALL_OBJ_TEST) $(LIBS) | ||
$(Q)$(SIZE) $@ | ||
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# Note: Using timeout(1) to handle cases where qemu hangs (e.g. this can happen with alignment errors). | ||
test: $(BUILD)/firmware-test.elf | ||
timeout --foreground -k 5s 60s qemu-system-riscv32 -machine $(BOARD) -bios none $(QEMU_EXTRA) -nographic -monitor null -semihosting -kernel $< > $(BUILD)/console.out | ||
$(Q)tail -n2 $(BUILD)/console.out | ||
$(Q)tail -n1 $(BUILD)/console.out | grep -q "status: 0" | ||
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# `make debugtest` will block QEMU until a debugger is connected to port 1234. | ||
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debugtest: $(BUILD)/firmware-test.elf | ||
qemu-system-riscv32 -machine $(BOARD) -bios none $(QEMU_EXTRA) -nographic -monitor null -semihosting -serial mon:stdio -S -s -kernel $< |
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This is an experimental, community-supported port for RISC-V RV32IMC emulation | ||
as provided by QEMU (http://qemu.org). | ||
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The purposes of this port are to enable: | ||
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1. Continuous integration | ||
- run tests against architecture-specific parts of code base | ||
2. Experimentation | ||
- simulation & prototyping of anything that has architecture-specific | ||
code | ||
- exploring instruction set in terms of optimising some part of | ||
MicroPython or a module | ||
3. Streamlined debugging | ||
- no need for JTAG or even an MCU chip itself | ||
- no need to use OpenOCD or anything else that might slow down the | ||
process in terms of plugging things together, pressing buttons, etc. | ||
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This port requires a bare metal RISC-V toolchain with GCC 10 or later, either | ||
with multilib support or 32 bits specific (M, C, and Zicsr extensions must be | ||
supported, along with ilp32 ABI). Both newlib and picolibc are supported, | ||
with the latter having precedence if found. | ||
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Most pre-built toolchains should work out of the box, either coming from your | ||
Linux distribution's package manager, or independently packaged ones like | ||
[xPack](https://xpack.github.io/dev-tools/riscv-none-elf-gcc/). | ||
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To build and run the image with builtin testsuite: | ||
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make -f Makefile.test test |
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/* | ||
* This file is part of the MicroPython project, http://micropython.org/ | ||
* | ||
* The MIT License (MIT) | ||
* | ||
* Copyright (c) 2023 Alessandro Gatti | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. (Very minor!) 2024. In a number of files. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. The files were created in 2023, so I think they're correct. Otherwise every year every file in the repo should have its copyright notice updated accordingly, which isn't the case. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes, if it was written in 2023 then the date can stay as 2023 (it could also be updated to 2023-2024 but that's not critical). |
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* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to deal | ||
* in the Software without restriction, including without limitation the rights | ||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
* copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
* THE SOFTWARE. | ||
*/ | ||
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.section .start | ||
.option norvc /* Do not emit compressed instructions. */ | ||
.type start, @function | ||
.global start | ||
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start: | ||
.cfi_startproc | ||
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.option push | ||
.option norelax | ||
la gp, _global_pointer /* Load global pointer register. */ | ||
.option pop | ||
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csrw satp, zero /* Disable supervisor mode. */ | ||
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/* Fill stack with a canary value. */ | ||
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li t0, 0xBBBBBBBB /* Load canary value. */ | ||
la t1, _sstack /* Load stack area start address. */ | ||
la t2, _estack /* Load stack area end address. */ | ||
1: | ||
sw t0, (t1) /* Write canary. */ | ||
addi t1, t1, 4 /* Next word. */ | ||
bltu t1, t2, 1b /* Loop until stack is filled. */ | ||
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la sp, _estack /* Load stack pointer. */ | ||
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/* Clear BSS area. */ | ||
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la t1, _sbss /* Load BSS area start address. */ | ||
la t2, _ebss /* Load BSS area end address. */ | ||
1: | ||
sw zero, (t1) /* Clear word. */ | ||
addi t1, t1, 4 /* Next word. */ | ||
bltu t1, t2, 1b /* Loop until BSS is cleared. */ | ||
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/* Set program counter. */ | ||
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la t0, _entry_point /* Load program counter address. */ | ||
csrw mepc, t0 /* Store it into machine exception PC. */ | ||
tail _entry_point /* Jump to entry point. */ | ||
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.cfi_endproc | ||
.end |
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