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stm32/machine_i2s: Add support for I2S on H7 MCUs (WIP) #8270

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stm32/machine_i2s: Add support for I2S on H7 MCUs (WIP) #8270

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fbbe29b
stm32/machine_i2s: Support I2S passive mode.
dpgeorge Feb 9, 2022
f4afbff
stm32/machine_i2s: Set FullDuplexMode to disabled on F4.
dpgeorge Mar 23, 2022
86eb6bd
stm32/machine_i2s: Allow I2S.deinit to be called multiple times.
dpgeorge Mar 25, 2022
6c41da4
tests/multi_machine: Add a multi-test for machine.I2S.
dpgeorge Mar 25, 2022
3c1ef0f
stm32/machine_i2s: Fix 16-bit stereo i2s_frame_map.
dpgeorge Mar 25, 2022
7a84fc4
stm32/machine_i2s: Add support for I2S on H7 MCUs.
dpgeorge Feb 7, 2022
6c6f15c
stm32/dma: Provide 16 and 32 bit I2S DMA structs.
dpgeorge Mar 25, 2022
9c9a930
stm32/machine_i2s: Correctly set the DMA transfer size.
dpgeorge Feb 8, 2022
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2 changes: 1 addition & 1 deletion ports/stm32/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -412,7 +412,7 @@ endif
endif
endif

ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f0 f4 f7 l0))
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f0 f4 f7 h7 l0))
HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_,\
hal_i2s.c \
)
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2 changes: 1 addition & 1 deletion ports/stm32/boards/make-pins.py
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Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@
SUPPORTED_FN = {
"TIM": ["CH1", "CH2", "CH3", "CH4", "CH1N", "CH2N", "CH3N", "CH1_ETR", "ETR", "BKIN"],
"I2C": ["SDA", "SCL"],
"I2S": ["CK", "MCK", "SD", "WS", "EXTSD"],
"I2S": ["CK", "MCK", "SD", "SDO", "SDI", "WS", "EXTSD"],
"USART": ["RX", "TX", "CTS", "RTS", "CK"],
"UART": ["RX", "TX", "CTS", "RTS"],
"LPUART": ["RX", "TX", "CTS", "RTS"],
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1 change: 1 addition & 0 deletions ports/stm32/boards/stm32h7xx_hal_conf_base.h
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Expand Up @@ -57,6 +57,7 @@
#include "stm32h7xx_ll_lpuart.h"
#include "stm32h7xx_ll_pwr.h"
#include "stm32h7xx_ll_rtc.h"
#include "stm32h7xx_ll_spi.h"
#include "stm32h7xx_ll_usart.h"

// Enable various HAL modules
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44 changes: 39 additions & 5 deletions ports/stm32/dma.c
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Expand Up @@ -114,9 +114,10 @@ static const DMA_InitTypeDef dma_init_struct_spi_i2c = {
};

#if MICROPY_HW_ENABLE_I2S

// Default parameters to dma_init() for i2s; Channel and Direction
// vary depending on the peripheral instance so they get passed separately
static const DMA_InitTypeDef dma_init_struct_i2s = {
static const DMA_InitTypeDef dma_init_struct_i2s_16 = {
#if defined(STM32F4) || defined(STM32F7)
.Channel = 0,
#elif defined(STM32H7) || defined(STM32L0) || defined(STM32L4)
Expand All @@ -136,6 +137,25 @@ static const DMA_InitTypeDef dma_init_struct_i2s = {
.PeriphBurst = DMA_PBURST_SINGLE
#endif
};

#if defined(STM32H7)
// H7 requires different DMA settings for 32-bit transfers.
static const DMA_InitTypeDef dma_init_struct_i2s_32 = {
.Request = 0,
.Direction = DMA_MEMORY_TO_PERIPH,
.PeriphInc = DMA_PINC_DISABLE,
.MemInc = DMA_MINC_ENABLE,
.PeriphDataAlignment = DMA_PDATAALIGN_WORD,
.MemDataAlignment = DMA_MDATAALIGN_WORD,
.Mode = DMA_CIRCULAR,
.Priority = DMA_PRIORITY_LOW,
.FIFOMode = DMA_FIFOMODE_DISABLE,
.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL,
.MemBurst = DMA_MBURST_SINGLE,
.PeriphBurst = DMA_PBURST_SINGLE
};
#endif

#endif

#if ENABLE_SDIO && !defined(STM32H7)
Expand Down Expand Up @@ -278,8 +298,8 @@ const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_CHANNEL_7, dma_id_2, &dma
const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, dma_id_3, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, dma_id_4, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, dma_id_3, &dma_init_struct_i2s };
const dma_descr_t dma_I2S_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, dma_id_4, &dma_init_struct_i2s };
const dma_descr_t dma_I2S_2_RX_16 = { DMA1_Stream3, DMA_CHANNEL_0, dma_id_3, &dma_init_struct_i2s_16 };
const dma_descr_t dma_I2S_2_TX_16 = { DMA1_Stream4, DMA_CHANNEL_0, dma_id_4, &dma_init_struct_i2s_16 };
#endif
const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_CHANNEL_3, dma_id_4, &dma_init_struct_spi_i2c };
#if defined(STM32F7)
Expand All @@ -306,7 +326,7 @@ const dma_descr_t dma_DCMI_0 = { DMA2_Stream1, DMA_CHANNEL_1, dma_id_9, &dma_in
#endif
const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, dma_id_10, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, dma_id_10, &dma_init_struct_i2s };
const dma_descr_t dma_I2S_1_RX_16 = { DMA2_Stream2, DMA_CHANNEL_3, dma_id_10, &dma_init_struct_i2s_16 };
#endif
#if ENABLE_SDIO
const dma_descr_t dma_SDIO_0 = { DMA2_Stream3, DMA_CHANNEL_4, dma_id_11, &dma_init_struct_sdio };
Expand All @@ -320,7 +340,7 @@ const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_CHANNEL_5, dma_id_12, &dma
const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, DMA_CHANNEL_1, dma_id_13, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, dma_id_13, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, dma_id_13, &dma_init_struct_i2s };
const dma_descr_t dma_I2S_1_TX_16 = { DMA2_Stream5, DMA_CHANNEL_3, dma_id_13, &dma_init_struct_i2s_16 };
#endif
// #if defined(STM32F7) && defined(SDMMC2) && ENABLE_SDIO
// const dma_descr_t dma_SDMMC_2 = { DMA2_Stream5, DMA_CHANNEL_11, dma_id_13, &dma_init_struct_sdio };
Expand Down Expand Up @@ -612,6 +632,12 @@ const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_REQUEST_I2C3_RX, dma_id_2,
const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_REQUEST_I2C2_RX, dma_id_2, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_REQUEST_SPI2_RX, dma_id_3, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_REQUEST_SPI2_TX, dma_id_4, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_2_RX_16 = { DMA1_Stream3, DMA_REQUEST_SPI2_RX, dma_id_3, &dma_init_struct_i2s_16 };
const dma_descr_t dma_I2S_2_RX_32 = { DMA1_Stream3, DMA_REQUEST_SPI2_RX, dma_id_3, &dma_init_struct_i2s_32 };
const dma_descr_t dma_I2S_2_TX_16 = { DMA1_Stream4, DMA_REQUEST_SPI2_TX, dma_id_4, &dma_init_struct_i2s_16 };
const dma_descr_t dma_I2S_2_TX_32 = { DMA1_Stream4, DMA_REQUEST_SPI2_TX, dma_id_4, &dma_init_struct_i2s_32 };
#endif
const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_REQUEST_I2C3_TX, dma_id_4, &dma_init_struct_spi_i2c };
const dma_descr_t dma_I2C_4_TX = { DMA1_Stream5, BDMA_REQUEST_I2C4_TX, dma_id_5, &dma_init_struct_spi_i2c };
#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
Expand All @@ -627,12 +653,20 @@ const dma_descr_t dma_I2C_2_TX = { DMA1_Stream7, DMA_REQUEST_I2C2_TX, dma_id_7,
const dma_descr_t dma_DCMI_0 = { DMA2_Stream1, DMA_REQUEST_DCMI, dma_id_9, &dma_init_struct_dcmi };
#endif
const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_REQUEST_SPI1_RX, dma_id_10, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_1_RX_16 = { DMA2_Stream2, DMA_REQUEST_SPI1_RX, dma_id_10, &dma_init_struct_i2s_16 };
const dma_descr_t dma_I2S_1_RX_32 = { DMA2_Stream2, DMA_REQUEST_SPI1_RX, dma_id_10, &dma_init_struct_i2s_32 };
#endif
const dma_descr_t dma_SPI_5_RX = { DMA2_Stream3, DMA_REQUEST_SPI5_RX, dma_id_11, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_4_RX = { DMA2_Stream3, DMA_REQUEST_SPI4_RX, dma_id_11, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_REQUEST_SPI5_TX, dma_id_12, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_REQUEST_SPI4_TX, dma_id_12, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, BDMA_REQUEST_SPI6_TX, dma_id_13, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_REQUEST_SPI1_TX, dma_id_13, &dma_init_struct_spi_i2c };
#if MICROPY_HW_ENABLE_I2S
const dma_descr_t dma_I2S_1_TX_16 = { DMA2_Stream5, DMA_REQUEST_SPI1_TX, dma_id_13, &dma_init_struct_i2s_16 };
const dma_descr_t dma_I2S_1_TX_32 = { DMA2_Stream5, DMA_REQUEST_SPI1_TX, dma_id_13, &dma_init_struct_i2s_32 };
#endif
const dma_descr_t dma_SPI_6_RX = { DMA2_Stream6, BDMA_REQUEST_SPI6_RX, dma_id_14, &dma_init_struct_spi_i2c };

static const uint8_t dma_irqn[NSTREAM] = {
Expand Down
26 changes: 22 additions & 4 deletions ports/stm32/dma.h
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Original file line number Diff line number Diff line change
Expand Up @@ -57,10 +57,28 @@ extern const dma_descr_t dma_SDMMC_2;
extern const dma_descr_t dma_SPI_6_RX;
extern const dma_descr_t dma_SDIO_0;
extern const dma_descr_t dma_DCMI_0;
extern const dma_descr_t dma_I2S_1_RX;
extern const dma_descr_t dma_I2S_1_TX;
extern const dma_descr_t dma_I2S_2_RX;
extern const dma_descr_t dma_I2S_2_TX;

#if defined(STM32H7)
// H7 requires different DMA settings for 16-bit transfers.
extern const dma_descr_t dma_I2S_1_RX_16;
extern const dma_descr_t dma_I2S_1_RX_32;
extern const dma_descr_t dma_I2S_1_TX_16;
extern const dma_descr_t dma_I2S_1_TX_32;
extern const dma_descr_t dma_I2S_2_RX_16;
extern const dma_descr_t dma_I2S_2_RX_32;
extern const dma_descr_t dma_I2S_2_TX_16;
extern const dma_descr_t dma_I2S_2_TX_32;
#else
// F4/F7 uses the same DMA settings for 16-bit and 32-bit transfers.
extern const dma_descr_t dma_I2S_1_RX_16;
#define dma_I2S_1_RX_32 dma_I2S_1_RX_16
extern const dma_descr_t dma_I2S_1_TX_16;
#define dma_I2S_1_TX_32 dma_I2S_1_TX_16
extern const dma_descr_t dma_I2S_2_RX_16;
#define dma_I2S_2_RX_32 dma_I2S_2_RX_16
extern const dma_descr_t dma_I2S_2_TX_16;
#define dma_I2S_2_TX_32 dma_I2S_2_TX_16
#endif

#elif defined(STM32G4)

Expand Down
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