micropython · H-Grobben · Sep 20, 2022 · Sep 20, 2022 · Sep 22, 2022 · Mar 17, 2023
diff --git a/ports/stm32/boards/AEMICS_PYglet/bdev.c b/ports/stm32/boards/AEMICS_PYglet/bdev.c
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018-2019 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "storage.h"
+#include "qspi.h"
+#include "py/mphal.h"
+
+#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
+// Shared cache for first and second SPI block devices
+STATIC mp_spiflash_cache_t spi_bdev_cache;
+#endif
+
+// First external SPI flash uses software QSPI interface
+
+STATIC const mp_soft_qspi_obj_t soft_qspi_bus = {
+    .cs = MICROPY_HW_QSPIFLASH_CS,
+    .clk = MICROPY_HW_QSPIFLASH_SCK,
+    .io0 = MICROPY_HW_QSPIFLASH_IO0,
+    .io1 = MICROPY_HW_QSPIFLASH_IO1,
+    .io2 = MICROPY_HW_QSPIFLASH_IO2,
+    .io3 = MICROPY_HW_QSPIFLASH_IO3,
+};
+
+const mp_spiflash_config_t spiflash_config = {
+    .bus_kind = MP_SPIFLASH_BUS_QSPI,
+    .bus.u_qspi.data = (void *)&soft_qspi_bus,
+    .bus.u_qspi.proto = &mp_soft_qspi_proto,
+    #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
+    .cache = &spi_bdev_cache,
+    #endif
+};
+
+spi_bdev_t spi_bdev;
+
+void board_early_init(void) {
+    qspi_init();
+    qspi_memory_map();
+}
diff --git a/ports/stm32/boards/AEMICS_PYglet/board.json b/ports/stm32/boards/AEMICS_PYglet/board.json
@@ -0,0 +1,16 @@
+{
+    "deploy": [
+        "./deploy.md"
+    ],
+    "docs": "",
+    "features": [],
+    "id": "AEMICS_PYglet",
+    "images": [
+        "aemics_pyglet_1.png"
+    ],
+    "mcu": "stm32g4",
+    "product": "AEMICS PYglet",
+    "thumbnail": "",
+    "url": "https://www.aemics.nl/pyg/",
+    "vendor": "AEMICS"
+}
diff --git a/ports/stm32/boards/AEMICS_PYglet/deploy.md b/ports/stm32/boards/AEMICS_PYglet/deploy.md
@@ -0,0 +1,17 @@
+### AEMICS PYglet via DFU
+
+One you have downloaded or made the appropriate DFU file it can be flashed directly to your PYglet
+using a DFU programmer (Like STM32 Cube Programmer, see[here](https://www.st.com/en/development-tools/stm32cubeprog.html)). 
+
+The board can also be programmed via the ST DFU bootloader, using e.g. [dfu-util](http://dfu-util.sourceforge.net/) or [pydfu.py](https://github.com/micropython/micropython/blob/master/tools/pydfu.py).
+
+To enter the bootloader the `BOOT0` pin can be connected to `3V3` during reset, or you can use `machine.bootloader()` from the MicroPython REPL.
+
+```bash
+dfu-util --alt 0 -D build-AEMICS_PYglet/firmware.dfu
+```
+
+`3V3` is on Pin 1 of the PYglet module.
+`BOOT0` is on Pin 16 of the PYglet module.
+
+Check the [AEMICS PYg page](https://www.aemics.nl/pyg/) for more information.
diff --git a/ports/stm32/boards/AEMICS_PYglet/mpconfigboard.h b/ports/stm32/boards/AEMICS_PYglet/mpconfigboard.h
@@ -0,0 +1,107 @@
+#define MICROPY_HW_BOARD_NAME       "AEMICS PYglet"
+#define MICROPY_HW_MCU_NAME         "STM32G473"
+#define MICROPY_HW_FLASH_FS_LABEL   "PYglet"
+
+#define MICROPY_HW_USB_FS           (1)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_RNG       (1)
+#define MICROPY_HW_ENABLE_ADC       (1)
+#define MICROPY_HW_ENABLE_DAC       (1)  // A4, A5
+#define MICROPY_HW_ENABLE_USB       (1)  // A12 (dp), A11 (dm)
+#define MICROPY_HW_HAS_SWITCH       (1)
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_FLASH        (1)  // QSPI extflash mounted
+// #define MICROPY_HW_UART_REPL        (1)
+// #define MICROPY_HW_UART_REPL_BAUD   (115200)
+
+#define MICROPY_BOARD_EARLY_INIT    board_early_init
+void board_early_init(void);
+
+#if MICROPY_HW_USB_FS == 1
+#define MICROPY_HW_USB_MANUFACTURER_STRING    "AEMICS"
+#endif
+#define MICROPY_HW_USB_PRODUCT_FS_STRING   MICROPY_HW_BOARD_NAME
+
+
+// // ports/stm32/mpconfigport.h
+// #define MICROPY_PY_LWIP      (0)  // Geen ETH
+// #define MICROPY_PY_USSL      (0)
+// #define MICROPY_SSL_MBEDTLS  (0)
+// #define MICROPY_PY_UASYNCIO  (0)
+// #define MICROPY_PY_UZLIB     (0)
+// #define MICROPY_PY_UJSON     (1)
+// #define MICROPY_PY_URE       (0)
+// #define MICROPY_PY_FRAMEBUF  (0)
+// #define MICROPY_PY_USOCKET   (0)
+// #define MICROPY_PY_NETWORK   (0)
+// #define MICROPY_PERSISTENT_CODE_LOAD (1)
+
+// The board has an 16MHz HSI, the following gives 170MHz CPU speed and 48MHz for USB
+#define MICROPY_HW_CLK_USE_HSE      (0)
+#define MICROPY_HW_CLK_USE_HSI (1)
+#define MICROPY_HW_CLK_PLLM (4)
+#define MICROPY_HW_CLK_PLLN (85)
+#define MICROPY_HW_CLK_PLLP (2)
+#define MICROPY_HW_CLK_PLLQ (2)
+#define MICROPY_HW_CLK_PLLR (2)
+
+#define MICROPY_HW_CLK_USE_HSI48      (1)
+
+// 4 wait states
+#define MICROPY_HW_FLASH_LATENCY    FLASH_LATENCY_8
+
+// UART config
+#define MICROPY_HW_UART4_TX         (pin_C10)
+#define MICROPY_HW_UART4_RX         (pin_C11)
+
+// xSPI
+// SPI1
+#define MICROPY_HW_SPI1_NSS         (pin_A3)
+#define MICROPY_HW_SPI1_SCK         (pin_A5)
+#define MICROPY_HW_SPI1_MISO        (pin_B4)
+#define MICROPY_HW_SPI1_MOSI        (pin_B5)
+// SPI2
+#define MICROPY_HW_SPI2_NSS         (pin_B12)
+#define MICROPY_HW_SPI2_SCK         (pin_B13)
+#define MICROPY_HW_SPI2_MISO        (pin_B14)
+#define MICROPY_HW_SPI2_MOSI        (pin_B15)
+// //SPI3
+// #define MICROPY_HW_SPI3_NSS         (pin_A15)
+// #define MICROPY_HW_SPI3_SCK         (pin_C10)
+// #define MICROPY_HW_SPI3_MISO        (pin_C11)
+// #define MICROPY_HW_SPI3_MOSI        (pin_C12)
+
+// QSPI1
+// 8MBit external QSPI flash, used for either the filesystem or XIP memory mapped
+#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (23)
+#define MICROPY_HW_QSPIFLASH_CS     (pin_A2)
+#define MICROPY_HW_QSPIFLASH_SCK    (pin_A3)
+#define MICROPY_HW_QSPIFLASH_IO0    (pin_B1)
+#define MICROPY_HW_QSPIFLASH_IO1    (pin_B0)
+#define MICROPY_HW_QSPIFLASH_IO2    (pin_A7)
+#define MICROPY_HW_QSPIFLASH_IO3    (pin_A6)
+extern const struct _mp_spiflash_config_t spiflash_config;
+extern struct _spi_bdev_t spi_bdev;
+#if !USE_QSPI_XIP
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
+#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
+#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
+    (op) == BDEV_IOCTL_NUM_BLOCKS ? ((1 << MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2) / 8 / FLASH_BLOCK_SIZE) : \
+    (op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
+    spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
+    )
+#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
+#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
+#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev) // for extended block protocol
+#endif
+
+// USRSW has pullup, pressing the switch makes the input go low
+#define MICROPY_HW_USRSW_PIN        (pin_B9)
+#define MICROPY_HW_USRSW_PULL       (GPIO_PULLDOWN)
+#define MICROPY_HW_USRSW_EXTI_MODE  (GPIO_MODE_IT_RISING)
+#define MICROPY_HW_USRSW_PRESSED    (1)
+
+// LED
+#define MICROPY_HW_LED1             (pin_B7) // Red
+#define MICROPY_HW_LED_ON(pin)      (mp_hal_pin_low(pin))
+#define MICROPY_HW_LED_OFF(pin)     (mp_hal_pin_high(pin))
diff --git a/ports/stm32/boards/AEMICS_PYglet/mpconfigboard.mk b/ports/stm32/boards/AEMICS_PYglet/mpconfigboard.mk
@@ -0,0 +1,8 @@
+DEBUG = 0
+
+# MCU settings
+MCU_SERIES = g4
+CMSIS_MCU = STM32G473xx
+MICROPY_FLOAT_IMPL = double
+AF_FILE = boards/stm32g473_af.csv
+LD_FILES = boards/stm32g474.ld boards/common_basic.ld
diff --git a/ports/stm32/boards/AEMICS_PYglet/pins.csv b/ports/stm32/boards/AEMICS_PYglet/pins.csv
@@ -0,0 +1,95 @@
+LED_RED,PB7
+SW,PB9
+PA0,PA0
+PA1,PA1
+QSPI_CSN,PA2
+QSPI_CLK,PA3
+PA4,PA4
+PA5,PA5
+QSPI_IO3,PA6
+QSPI_IO2,PA7
+PA8,PA8
+PA9,PA9
+PA10,PA10
+USB_DN,PA11
+USB_DP,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+QSPI_IO1,PB0
+QSPI_IO0,PB1
+PB2,PB2
+PB3,PB3
+PB4,PB4
+PB5,PB5
+PB6,PB6
+PB7,PB7
+BOOT0,PB8
+PB9,PB9
+PB10,PB10
+PB11,PB11
+SPI2_NSS,PB12
+SPI2_SCK,PB13
+SPI2_MISO,PB14
+SPI2_MOSI,PB15
+PC0,PC0
+PC1,PC1
+PC2,PC2
+PC3,PC3
+PC4,PC4
+PC5,PC5
+I2C4_SCL,PC6
+I2C4_SDA,PC7
+PC8,PC8
+PC9,PC9
+UART4_TX,PC10
+UART4_RX,PC11
+PC12,PC12
+PC13,PC13
+OSC32_IN,PC14
+OSC32_OUT,PC15
+PD2,PD2
+OSC_IN,PF0
+OSC_OUT,PF1
+RSTN,PG10
+P2,PC13
+P3,PB10
+P4,PC8
+P5,PC9
+P6,PA10
+P7,PA13
+P8,PA14
+P9,PA15
+P10,PC12
+P11,PD2
+P12,PB3
+P13,PB4
+P14,PB5
+P15,PB6
+P16,PB8
+P17,PC6
+P18,PC7
+P23,PB9
+P25,PA11
+P26,PA12
+P27,PB14
+P28,PB15
+P29,PB13
+P30,PB12
+P31,PC0
+P32,PC1
+P33,PC2
+P34,PC3
+P35,PA0
+P36,PA1
+P37,PA9
+P38,PA8
+P39,PA4
+P40,PA5
+P41,PC4
+P42,PC5
+P43,PB2
+P44,PB11
+P45,PG10
+P46,PC11
+P47,PC10
diff --git a/ports/stm32/boards/AEMICS_PYglet/stm32g4xx_hal_conf.h b/ports/stm32/boards/AEMICS_PYglet/stm32g4xx_hal_conf.h
@@ -0,0 +1,13 @@
+#ifndef MICROPY_INCLUDED_STM32G4xx_HAL_CONF_H
+#define MICROPY_INCLUDED_STM32G4xx_HAL_CONF_H
+
+#include "boards/stm32g4xx_hal_conf_base.h"
+
+#define HSE_VALUE              (8000000)
+#define LSE_VALUE              (32768) /*!< Value of the External oscillator in Hz*/
+#define EXTERNAL_CLOCK_VALUE   (0) /*!< Value of the External clock source in Hz*/
+
+#define HSE_STARTUP_TIMEOUT    (100)   /*!< Time out for HSE start up, in ms */
+#define LSE_STARTUP_TIMEOUT    (5000)  /*!< Time out for LSE start up, in ms */
+
+#endif /* MICROPY_INCLUDED_STM32G4xx_HAL_CONF_H */