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pratikbhuran/README.md

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  1. Voting_Machine Voting_Machine Public

    Voting machine implemented in verilog

    Verilog 9 2

  2. Memories Memories Public

    Random Access Memories designed in Verilog

    Verilog

  3. synchronous_fifo synchronous_fifo Public

    Verilog

  4. RAM RAM Public

    RAM designs

    Verilog

  5. Parameterized-Designs Parameterized-Designs Public

    Verilog designs that are parameterized to fit any value of parameter.

    Verilog

  6. sequence_detector_mealy sequence_detector_mealy Public

    Detect the sequence 11x1 in verilog using mealy FSM.

    Verilog

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