Skip to content

Commit 647708f

Browse files
majbthrdfpistm
andcommitted
feat: add the STM32WL SUBGHZSPI to the SPI library
Signed-off-by: Peter Lawrence <12226419+majbthrd@users.noreply.github.com> Co-authored-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 0978f6b commit 647708f

File tree

4 files changed

+51
-12
lines changed

4 files changed

+51
-12
lines changed

libraries/SPI/src/SPI.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,9 @@ SPIClass::SPIClass() : _CSPinConfig(NO_CONFIG)
2222
_spi.pin_mosi = digitalPinToPinName(MOSI);
2323
_spi.pin_sclk = digitalPinToPinName(SCK);
2424
_spi.pin_ssel = NC;
25+
#if defined(SUBGHZSPI_BASE)
26+
_spi.subghzspi_dbg = false;
27+
#endif
2528
}
2629

2730
/**
@@ -49,6 +52,9 @@ SPIClass::SPIClass(uint32_t mosi, uint32_t miso, uint32_t sclk, uint32_t ssel) :
4952
_spi.pin_mosi = digitalPinToPinName(mosi);
5053
_spi.pin_sclk = digitalPinToPinName(sclk);
5154
_spi.pin_ssel = digitalPinToPinName(ssel);
55+
#if defined(SUBGHZSPI_BASE)
56+
_spi.subghzspi_dbg = false;
57+
#endif
5258
}
5359

5460
/**

libraries/SPI/src/SPI.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -151,6 +151,14 @@ class SPIClass {
151151
_spi.pin_ssel = (ssel);
152152
};
153153

154+
#if defined(SUBGHZSPI_BASE)
155+
void debug_SubGHzSPI_pins(bool state)
156+
{
157+
_spi.subghzspi_dbg = state;
158+
};
159+
#endif
160+
161+
154162
void begin(uint8_t _pin = CS_PIN_CONTROLLED_BY_USER);
155163
void end(void);
156164

libraries/SPI/src/utility/spi_com.c

Lines changed: 33 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -318,18 +318,23 @@ void spi_init(spi_t *obj, uint32_t speed, spi_mode_e mode, uint8_t msb)
318318
handle->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; /* Recommended setting to avoid glitches */
319319
#endif
320320

321-
/* Configure SPI GPIO pins */
322-
pinmap_pinout(obj->pin_mosi, PinMap_SPI_MOSI);
323-
pinmap_pinout(obj->pin_miso, PinMap_SPI_MISO);
324-
pinmap_pinout(obj->pin_sclk, PinMap_SPI_SCLK);
325-
/*
326-
* According the STM32 Datasheet for SPI peripheral we need to PULLDOWN
327-
* or PULLUP the SCK pin according the polarity used.
328-
*/
329-
pull = (handle->Init.CLKPolarity == SPI_POLARITY_LOW) ? GPIO_PULLDOWN : GPIO_PULLUP;
330-
pin_PullConfig(get_GPIO_Port(STM_PORT(obj->pin_sclk)), STM_LL_GPIO_PIN(obj->pin_sclk), pull);
331-
pinmap_pinout(obj->pin_ssel, PinMap_SPI_SSEL);
332-
321+
#if defined(SUBGHZSPI_BASE)
322+
if ((handle->Instance != SUBGHZSPI) || (obj->subghzspi_dbg)) {
323+
#endif
324+
/* Configure SPI GPIO pins */
325+
pinmap_pinout(obj->pin_mosi, PinMap_SPI_MOSI);
326+
pinmap_pinout(obj->pin_miso, PinMap_SPI_MISO);
327+
pinmap_pinout(obj->pin_sclk, PinMap_SPI_SCLK);
328+
/*
329+
* According the STM32 Datasheet for SPI peripheral we need to PULLDOWN
330+
* or PULLUP the SCK pin according the polarity used.
331+
*/
332+
pull = (handle->Init.CLKPolarity == SPI_POLARITY_LOW) ? GPIO_PULLDOWN : GPIO_PULLUP;
333+
pin_PullConfig(get_GPIO_Port(STM_PORT(obj->pin_sclk)), STM_LL_GPIO_PIN(obj->pin_sclk), pull);
334+
pinmap_pinout(obj->pin_ssel, PinMap_SPI_SSEL);
335+
#if defined(SUBGHZSPI_BASE)
336+
}
337+
#endif
333338
#if defined SPI1_BASE
334339
// Enable SPI clock
335340
if (handle->Instance == SPI1) {
@@ -379,6 +384,14 @@ void spi_init(spi_t *obj, uint32_t speed, spi_mode_e mode, uint8_t msb)
379384
}
380385
#endif
381386

387+
#if defined SUBGHZSPI_BASE
388+
if (handle->Instance == SUBGHZSPI) {
389+
__HAL_RCC_SUBGHZSPI_CLK_ENABLE();
390+
__HAL_RCC_SUBGHZSPI_FORCE_RESET();
391+
__HAL_RCC_SUBGHZSPI_RELEASE_RESET();
392+
}
393+
#endif
394+
382395
HAL_SPI_Init(handle);
383396

384397
/* In order to set correctly the SPI polarity we need to enable the peripheral */
@@ -448,6 +461,14 @@ void spi_deinit(spi_t *obj)
448461
__HAL_RCC_SPI6_CLK_DISABLE();
449462
}
450463
#endif
464+
465+
#if defined SUBGHZSPI_BASE
466+
if (handle->Instance == SUBGHZSPI) {
467+
__HAL_RCC_SUBGHZSPI_FORCE_RESET();
468+
__HAL_RCC_SUBGHZSPI_RELEASE_RESET();
469+
__HAL_RCC_SUBGHZSPI_CLK_DISABLE();
470+
}
471+
#endif
451472
}
452473

453474
/**

libraries/SPI/src/utility/spi_com.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,10 @@ struct spi_s {
6161
// See https://github.com/stm32duino/Arduino_Core_STM32/issues/1294
6262
uint32_t disable_delay;
6363
#endif
64+
#if defined(SUBGHZSPI_BASE)
65+
/* True if debug pins need to be initialized */
66+
bool subghzspi_dbg;
67+
#endif
6468
};
6569

6670
typedef struct spi_s spi_t;

0 commit comments

Comments
 (0)
pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy