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Question Paper

The document appears to be exam questions from a M.Tech course on Advanced Computer Architecture. It contains 8 questions with subparts on topics such as: - Amdahl's law of quantitative principle of computer design - Measuring and reporting performance - Addressing modes for signal processing - Instruction level parallelism techniques - Control dependencies - Loop unrolling and scheduling procedures - Hardware and software speculation mechanisms - Cache performance and processor performance - Cache coherence protocols - Bus timing diagrams - Reliability, availability, and dependability terms - Cluster design philosophies - Issues for commercial interconnection networks

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27 views1 page

Question Paper

The document appears to be exam questions from a M.Tech course on Advanced Computer Architecture. It contains 8 questions with subparts on topics such as: - Amdahl's law of quantitative principle of computer design - Measuring and reporting performance - Addressing modes for signal processing - Instruction level parallelism techniques - Control dependencies - Loop unrolling and scheduling procedures - Hardware and software speculation mechanisms - Cache performance and processor performance - Cache coherence protocols - Bus timing diagrams - Reliability, availability, and dependability terms - Cluster design philosophies - Issues for commercial interconnection networks

Uploaded by

computerstudent
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Code: 9D06103 M.Tech - I Semester Regular and Supplementary Examinations, April/May 2012 ADVANCED COMPUTER ARCHITECTURE (Common to DSCE, DECS and ES) Time: 3 hours Max Marks: 60 Answer any FIVE questions All questions carry equal marks ***** 1 (a) (b) 2 (a) (b) Explain Amdahls law of quantitative principle of computer design. Brief explain about measuring and reporting performance. Explain the addressing modes generally used in connection with signal processing. What is meant by size and type of operands and operands for media and signal processing? What is meant by instruction level parallelism? Explain the major techniques adopted. Explain briefly about control dependencies. Explain the term loop unrolling and scheduling and briefly explain the procedure adopted to obtain the final unrolled code. Distinguish between hardware and software speculation mechanisms. Explain the term Cache performance and processor performance. Explain briefly about first miss penalty reduction technique. Explain the basic structure of a centralized shared memory multiprocessor using easy the block diagram. Explain Cache coherent protocols generally used to maintain coherence. What is a bus? Explain the timing diagram of split transaction bus. Explain the following terms in: (i) Reliability. (ii) Availability. (iii) Dependability. Explain briefly about cluster and its design on the basis of philosophical points. What are the practical issues for commercial interconnection network? *****

3 (a) (b) 4 (a) (b) 5 (a) (b) 6 (a) (b) 7 (a) (b)

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8 (a) (b)

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