Table of Contents

1. Curriculum Analysis: ......................................................................................................................... 1

1.2 Units: .......................................................................................................................................... 1
2. Content Analysis: ............................................................................................................................. 3
2.1 General Goal: ............................................................................................................................. 3
2.2 Lesson Objectives: ..................................................................................................................... 3
2.3 The content by TVTC. ................................................................................................................. 3
2.3.1 Resources: ...................................................................................................................................... 3
2.3.2 XOR Gate: ...................................................................................................................................... 3
2.3.4 Properties of XOR/XNOR Operations: .......................................................................................... 5
2.4 content by Dr. Jeff Jackson ......................................................................................................... 6
2.4.1 Resources: ...................................................................................................................................... 6
2.4.2 Exclusive OR (XOR) gate .............................................................................................................. 6
2.5 Compare between lesson of TVTC and lesson of Dr. Jeff Jackson. ............................................. 7
2.6 The content of logic gates lesson of RCT. ................................................................................... 8
2.6.1 Resources ....................................................................................................................................... 8
6.2 . 2 Introduction ..................................................................................................................................... 8
2.6.3 XOR/XNOR Gates:......................................................................................................................... 8
3. Didactic Analysis ............................................................................................................................ 12
3.1 Environment ............................................................................................................................. 12
3.2 Methodology Analysis ............................................................................................................... 12
4. Lesson Plan ................................................................................................................................... 13
4.1 General Information: ................................................................................................................. 13
4.2 Learning Objectives: ................................................................................................................. 13
4.2.1 General Learning Objectives: ...................................................................................................... 13
4.2.2 Specific Learning Objectives: ...................................................................... 13
4.3 Overview of the Intended Process:.................................................................... 14



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1. CurriculumAnalysis:
The name of this Module is Programmable Control Technology "ELT 205" the contact
hours for this Module is 26-hour.The hour of lecture is 2-hour. The hour of laboratory
is 2-hour.A unit isLogic gates. Logic gates are the most basic components of
electronica. The prerequisites is Electrical Circuits 2, the code is ELT 118 .the
following course is Electrical Programmable Control W/S, the code is ELT 207. The
teaching unit before logic gates (XOR, XNOR) is Logic gates (NAND, NOR). The
teaching unit after logic gates (XOR, XNOR) is Boolean algebra. Every electronic
device requires logic gates in order to produce outputs from single or different
combinations of inputs.

This Module presents applied and experiment study for logic circuits and the
programmable logic controller. It also enables the trainees to draw the control circuits
and programs the PLC using the program required for industrial application. It also
trains the trainees to test and maintain control circuits.

1.2 Units:

A. Number system
The end of this unit trainees will be able to:
1. Understand different numbering systems.
2. Calculate number system.
3. Convert from a system to another system.
4. Understand the different operations in numbering systems.

B. Logic gate
The end of this unit trainees will be able to:
1. Understand the concepts of logic gates.
2. To write logic Boolean, truth table and symbol.
3. Understand How the logic gate works, according to the true table
4. Design simple logic circuits.
5. Apply of different gates according to their governed logic equation.
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C. Boolean algebra
In the end of this unit trainees will be able to:
1. Understanding the concepts of Boolean algebra.
2. Write rules of Boolean algebra.
3. Calculate the Boolean rules.
4. Simply Boolean lows.


D. Boolean analysis of logic circuit
In the end of this unit trainees will be able to:
1. Convert form Boolean to a logic circuit.
2. Simulate a logic circuit.







Department: Electrical Technology Specializations:
Electrical
Power
And
Electrical
machine
Module Name:
Programmable Control
Technology
Module code: ELT 205
Prerequisites: Electric Circuit 2 Semester 3
Following
Electrical Programmable
Control W/S
Semester 5
This unit two logic gate presents applied and
experiment study for logic circuits and the
programmable logic controller. It also enables the
student to draw the control circuits and programs
the PLC using the program required for industrial
application. It also trains the trainees to test and
maintain control circuits.
Credit
Hours
3
Contact
Hours
(h/w)
L 2
P 2
T
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2. Content Analysis:

2.1 General Goal:
The aim of this course is to promote understanding of different logic gate operations,
combinational logic circuits, simple sequential circuits and number systems to enable
trainees to deal with different complicated digital systems.
2.2 Lesson Objectives:
In addition to AND, OR, NOT, NAND and NOR gates, exclusive-OR (XOR) and
exclusive-NOR (XNOR) gates are also used in the design of digital circuits. These have
special functions and applications. These gates are particularly useful in arithmetic
operations as well as error-detection and correction circuits. XOR and XNOR gates are
usually found as 2-input gates. No multiple-input XOR/XNOR gates are available since
they are complex to fabricate with hardware. The objectives of this lesson are to learn
about:

1. XOR gates and XNOR gates
2. Their properties of operation and basic identities.
3. Odd function and Even function.
4. Parity generation and checking.
2.3The content by TVTC.
2.3.1 Resources:
Programmable Logic Controllers, J. w .Wabb and R. A. Reis, 1994.
Programmable Logic Controllers, C. Simpson, 1993.
Programmable Logic Controller and their Engineering Application, A. Crispin,
1990.
2.3.2 XOR Gate:
The exclusive-OR (XOR), operator uses the symbol , and it performs the following
logic operation:
X Y = X Y + X Y The graphic symbol and truth table of XOR gate is shown in the
figure 1.



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Figure 1
The result is 1 only when either X is equal to 1 or Y is equal to 1, but not when both X
and Y are equal to 1.
2.3.3 XNOR Gate:
The exclusive-NOR (XNOR), operator uses the symbol, and it performs the following
logic operation.
X Y = X Y + X Y = (X Y)
The graphic symbol and truth table of XNOR (Equivalence) gate is shown in the figure.
The result is 1 when either both X or Y are 0s or when both are 1s. That is why this
gate is often referred to as the Equivalencegate.The truth tables clearly show that the
exclusive-NOR operation is the complement of the exclusive-ORfigure 2.This can also
be shown by algebraic manipulation as follows:

(X Y) = (X Y + X Y)
= (X Y) (X Y) = (X + Y) (X + Y)
= (XY + XY)
= X Y

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Figure 2

2.3.4 Properties of XOR/XNOR Operations:
A. Commutativity
A B = B A, and
A B =B A

Figure 3


B. Associativity
A (B C) = (A B) C, and
A (B C) = (A B)C


Figure 4

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2.4 content by Dr. Jeff Jackson
2.4.1Resources:
Digital Logic by: Dr. Jeff Jackson, Online book, Lecture 11, page 4 to 6 Link of
resources online book

http://www.freebookcentre.net/electronics-ebooks-download/Digital-Logic.html
Link of online book:

http://jjackson.eng.ua.edu/courses/ece380/lectures/LECT11.pdf
2.4.2 Exclusive OR (XOR) gate
Another basic element, very useful in building circuits that perform arithmetic
operations, is the exclusive OR (XOR) gate. XOR function is denoted with thesymbol.
Output is 1 only if the inputs are different figure 5.







Figure 5
Example XOR usage
Recall the adder
circuit
Sum=xy+xy
Carry=xy



Figure 6

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XOR of three variables
What is the canonical form for the following expression?
F (a, b, c) = a b c
Exclusive NOR (XNOR) gate
Derived from the XOR function, XNOR is theComplement of XOR.
XNOR function is denoted with thesymbol.
Output is 1 only if the inputs are the same.
Also called an equivalence function.





Figure 7

XNOR of three variables
What is the canonical for thefollowing expression?
F (a,b,c) = a b c
2.5 Compare between lesson of TVTC and lesson ofDr. Jeff Jackson.
There are many differences between lesson of TVTC and lesson of Dr. Jeff Jackson.
Both lessons explain the logic gates (XOR, XNOR). First of all, unlike lesson of Dr. Jeff
Jackson, lesson of TVTC is simple way. Second, the lesson of Dr. Jeff Jackson use
three inputs for example wile lesson of TVTC use tow input for example. In conclusion,
all of those lessons explain the basis of logic gates. In my opinion, the lesson for TVTC
is more general and clear but the lesson for Dr. Jeff Jackson is more specific.


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2.6 The content of logic gates lesson of RCT.
2.6.1Resources
switching theory and logic design, A. Anand Kumar, 2010, page 92 to 103.
. 6.2 2 Introduction
The most basic NOT gates to more complex XNOR gate. We will discuss the logic
gate's function and as well, as provide different applications for each gate. Through
multiple different aids, we will provide tutorial that will teach you the basics of logic
gates. We will also explain some simple circuits made of logic gates that are practical
examples of how a logic gate can used to perform a particular function in a device.

To understand logic gates, you must know that logic gates can run on only numbers in
binary. Binary is a number system consisting of only ones and zeros. If the switch is on,
or true, the input/output is a one. If the switch is off, or false, the input/output is zero.
Logic gates take the binary inputs, does a command based on what kind of gate it is
and then it releases a binary output.

2.6.3XOR/XNOR Gates:
Exclusive-OR and Exclusive-NOR Gates the XOR and XNOR gates are frequently used
in Digital Logic. These two additional gates are used to detect dissimilar and similar
inputs respectively.

The XOR and XNOR gates perform opposite operations; they both can have two or
more inputs but only a single output.

2.6.3.1 XOR Gate:
The "X" in XOR stands for exclusive. This means that the XOR gate performs the
function of the OR gate but only if there is a single one and zero. If either input is,
true(1) then the other, input is false (0) then the output is true; if the inputs are both the
same then the output is false (0).

The Exclusive-OR Gate or XOR Gate performs a function that is equivalent to the
combination of NOT, AND and OR gates. XOR gates are extensively used in digital
applications; therefore XOR gates are available as basic components. Most commonly
used XOR Gates have two inputs. The XOR gate is represent by symbol shown in
figure 8.
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Figure 8: Symbolic representation of XOR Gate


The function performed by the XOR gate is represent by the Function Table for a two
input XOR Gate figure 9. The function table for a 3, 4 or multiple input XOR Gate is
similar. The output of an XOR gate is 1 when the inputs are dissimilar and a 0 when all
the inputs are the same.

Logical XOR Operation
Inputs Output
A B Q
0 0 0
0 1 1
1 0 1
1 1 0

Figure 9: Function Table of an XOR Gate
The expression describing the operation of the two inputs XOR Gate is F = A B. The
is an XOR operator and the expression for multiple input XOR Gates is F = A B
C ...N, where N is the total number of inputs.

The timing diagram of the two input XOR gate with the input varying over a period of 7
time intervals is shown in the diagram figure 10.
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Figure 10: Timing diagram of operation of a XOR gate.

2.6.3.2 XNOR Gate:
A XNOR gate, also known as an exclusive NOR gate, does the function of the XOR
gate and then negates it. This means that if the result were one it would change it to
zero and vice versa. A XNOR gate also has two or more inputs but only a single output.
This negated function is on the XOR gate by putting a small circle at the end of it. As
you can see to the right, the symbol is identical to the XOR gate but with a little circle.
The Exclusive-NOR Gate or XNOR Gate performs a function that is equivalent to the
combination of NOT, AND and OR gates. XNOR gate is extensively used in digital
applications; therefore XNOR gates are available as basic components. Most commonly
used XNOR Gates have two inputs. The XNOR gate is represent by symbol shown in
figure 11.




Figure 11: Symbolic representation of XNOR Gate
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The function performed by the XNOR Gate is represent by the Function Table for a two
input XNOR Gate figure 12. The function table for a 3, 4 or multiple input XNOR Gate is
similar. The output of an XNOR gate is 1 when the all the inputs are same and a 0 when
the inputs are dissimilar.
Logical XOR Operation
Inputs Output
A B Q
0 0 1
0 1 0
1 0 0
1 1 1

Figure 12: Function Table of an NXOR Gate
The expression describing the operation of the two inputs XNOR Gate is F = A B.
The expression for multiple input XNOR Gates is F = A B C ...N, where N is the
total number of inputs.
The timing diagram of the two input XNOR gate with the input varying over a period of 7
time intervals is shown in the diagram figure 13.









Figure 13: Timing diagram of operation of a XNOR gate.
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3.Didactic Analysis
3.1Environment
There have to be expected 25 trainees in the classroom. The range in age will be from
18 to 22.All trainees got a high school certificate.The grades range from 60% to 85% in
the college. All trainees from Riyadh.There have to be 27 chaises, two whiteboards,
projector, compute, test board and marker.The present of this lesson on Sunday 20
April at 10:40 am, in 19.F27.The Classroom in the Electrical building at Riyadh College
of Technology. First of all, will use whiteboard to explain types of gates. Then,
PowerPoint Program to present the time diagram and solution the task.
3.2 Methodology Analysis
Start the lesson choose example for real life to improve the trainees. Also to know some
information about the lesson. Then, there are different methods.
Lecture :
1. To explain the example for real life.
2. To explain the logic gates (XOR, XNOR), true table and time diagram.

Classroom conversation:
1. To make some confidence.
2. To answer the question.
3. Solve the task in whiteboard.

Group work:
1. To solve task.
Mind map:
1. In the summary. This is now method.








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4. Lesson Plan
4.1 General Information:
Topic: logic gates(XOR,XNOR).
Name and ID. Number: Abdulrahman Bokhari (202333325)
Module code: ELT 205
Date and Time:20.04.2014
4.2 Learning Objectives:
4.2.1 General Learning Objectives:
The trainees will be able to
1. help each other.
4.2.2 Specific Learning Objectives:
The traineeswill be able to
1. list types of Digital Gates.(Reproduction / Cognitive).
2. Write truth tables of Digital Gates on Whiteboard. (Reproduction/ Cognitive)
3. Explain the time diagram on whiteboard. ( Reorganization / Cognitive )
4. compare between XOR, XNOR digital Gates.( Transfer / Cognitive )











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4.3 Overview of the Intended Process:
Opening / Entrance / Motivation
Methodology
Media
Time
Expected
Trainer-action
Expected
Trainee-action
Welcomes the trainees
and takes the
attendance.
--
_
- 1
Trainer give the
example form real life
--
Inductive
approachClass
room
conversation
Test board 4

Body (Information / Elaboration)
Methodology
Media Time
Expected
Trainer-action
Expected
Trainee-action
Explain the symbol
and Booleanfor XOR
gate.
--

Lecture

Whiteboard

5
Explain the truth table
and time diagram.
--

Classroom
conversation

Power point
Slide 1
5
Explain the symbol
and Boolean for
XNOR gate.
--

Lecture

Whiteboard
5
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Explain the truth table
and time diagram for
XNOR gate
Explain truth table with
time diagram in the
whiteboard.

Classroom
Conversation

Power point
Slide 2

7
Give trainees task
about logic gate
--
Group work
Task 10
Correct result Present result
Classroom
Conversation
Whiteboard
Task in
Power point
7
Close (Reflection, Exercises, Homework,
Feedback)


Methodology

Media

Time
Expected
Trainer-action
Expected
Trainee-action
Write the mind map --
Classroom
Conversation


Whiteboard

3
Ask the trainees some
question
--
Classroom
Conversation
-- 3