Experiment 4
Experiment 4
Experiment IV
OBJECTIVES:
Examining the characteristics of XOR and XNOR gates.
Demonstrate applications of XOR and XNOR gates
Learn to use the VHDL approach to combinational logic design.
MATERIALS:
Quartus II sofrware 13.1 or higher.
IBM or compatible computer with Pentium III or higher, 128 M-byte RAM or more, and 8 G-
byte Or larger hard drive.
XC FPGA Board with Altera FPGA (Cyclone IV EP4CE6E22C8)
DISCUSSION:
So far we have studied five basic types of gates: AND, OR, NAND, NOR and NOT. In some
applications, it is convenient to use two other types of gates: XOR and XNOR. The XOR and XNOR
gates have their own symbols and unique characteristics. Common applications for XOR and XNOR
gates are: comparators, switchable inverter/buffers, parity generator/checkers and adder/subtractor.
They can also be used to simplify Boolean equations.
We will first discuss the properties of XOR and XNOR having two inputs.
Gate Characteristics:
1. The XOR Gate
For a 2-input XOR gate, the output is High when the inputs are unequal. The output is Low when the
inputs are equal. The Boolean equation for a 2-input XOR gate can be abbreviated as:
1
2. The XNOR Gate
The output of an XNOR gate is the complement of that of a XOR. For a 2-input XNOR gate, the output
is Low when the inputs are unequal but High when the inputs are equal. The Boolean equation for a 2-
input XNOR gate can be written as:
The number of inputs for the XOR and XNOR gates can be two or more. The characteristics of XOR and
XNOR gates can be extended to three or more inputs. We will examine the characteristics of 3-input XOR
and XNOR gates.
XC FPGA Board
PROCEDURE:
Section I. XOR and XNOR characteristics
1. Open Quartus II and create a new project.
2. Create a “.vhd” file and write the gates equivalent VHDL code for the XOR & XNOR gates.
3. Fill in the following truth tables for all the gates by observing the inputs/outputs on the programmed
board.
i. truth tables
2
AND Gate OR Gate
A B C Y1 A B C Y2
0 0 0 o 0 0 0 1
0 0 1 1 0 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 0 1 1 1
1 0 0 1 1 0 0 0
1 0 1 0 1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 1 1 1 1 0
ii. Symbol
AND Gate OR Gate
) ④ ⼀只 ⻥ ; 三 ⼀
Y =
1 3
A 0 1 ⽐ YEAEBEC
3
𨴴
3. Fill in the following truth tables for all the gates by observing the inputs/outputs on the programmed
board.
A B
X Y
A3 A2 A1 A0 B3 B2 B1 B0
0 1 1 0 1 0 0 1 o o
1 0 1 0 1 0 1 0 l l
0 0 1 1 1 1 0 0 o o
0 1 0 0 0 1 0 1 o o
0 0 0 0 0 0 0 0 1 1
1 1 1 1 1 1 1 0 0 0
1 0 1 1 0 0 1 1 0 0
Bau4-bitinputs.zfAandBaethesamenumbers.tt
Aand
rbitoutputsxandYaul.otherwiseitshouldbeo.no
r-ANDgatisequaltoaXOR-NORq.at
rding tthecodeuecanfindthatax.no
。
3. Fill in the following truth tables for all the gates by observing the inputs/outputs on the programmed
board
4
Outputs
Inputs
Control = 0 Control = 1
D3 D3 D1 D0 X3 X2 X1 X0 X3 X2 X1 X0
0 0 0 0 1 1 1 1 0 0 0 0
0 0 1 1 1 0 1
1 0 1 1 0
0 1 1 0 0 0 0 0 1 1 0
1
1 1 1 1
0 0
0 0 1 1 0 0
1 1 1 1 0 0 0 1 1 1
0
1
Using only AND, OR and inverter gates to implement the above Boolean equation, how many gates
are needed? Draw the logic diagram. Compare the savings of a single XOR gate implementation with
nvertercifinputsinverterureincludeditheneare6.si
the circuit you just drew.
ozinwrt.ws
) ,
compunedwiththesingkxugategit.sn/o-2=8gatesA'
_
※
,
上 fe-XCifimtiinuteraeincludediitsaresBgut.es
2. How can you use a 2-input XOR gate to function as a 1-bit buffer/inverter? Draw the logic diagram.
Show the logic connections for the control and data input lines.
isabufferwhenthecontno1isl.itisaimi@J-Y.in
uter
ntrol .co
-1
1
outputs
-" ⼀"
0 0 1
5
.ie