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Set-1 R05

This document contains four sets of questions for a Computer Organization examination. Each set contains eight questions with subparts that cover various topics in computer organization including types of computers, error detection codes, arithmetic shift instructions, addressing modes, microprogrammed control unit design, Booth's multiplication algorithm, cache memory performance, RAID technology, direct memory access, I/O interfaces, pipelining and hazards, vector processing, multiprocessors, and inter-processor arbitration. Students must answer any five questions by explaining or discussing the related topics in detail.

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36 views4 pages

Set-1 R05

This document contains four sets of questions for a Computer Organization examination. Each set contains eight questions with subparts that cover various topics in computer organization including types of computers, error detection codes, arithmetic shift instructions, addressing modes, microprogrammed control unit design, Booth's multiplication algorithm, cache memory performance, RAID technology, direct memory access, I/O interfaces, pipelining and hazards, vector processing, multiprocessors, and inter-processor arbitration. Students must answer any five questions by explaining or discussing the related topics in detail.

Uploaded by

adddata
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No: R05321405

SET-1 R05
B. Tech III Year II Semester Examinations, December-January, 2011-2012
COMPUTER ORGANIZATION
(MECHANICAL ENGINEERING (MECHATRONICS))
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
---

1.a) Discuss the various types of computers.
b) Explain the necessity of error detection codes and any one code in detail.
[8+8]
2.a) Discuss arithmetic shift instruction with suitable examples
b) List various addressing modes. [8+8]

3. Write about micro programmed control and discuss designing a control unit.
[16]

4. Explain in detail Booths multiplication algorithm with examples. [16]

5.a) What are the performance considerations for cache memory?
b) Give a note on RAID technology. [8+8]

6.a) Discuss direct memory access.
b) Explain standard input-output interfaces. [8+8]

7.a) What is pipelining? Discuss pipeline hazards.
b) Describe vector processing in RISC pipeline. [8+8]

8.a) List the characteristics of multiprocessors.
b) Discuss inter processor arbitration. [8+8]



--ooOoo--

Code No: R05321405
SET-2 R05
B. Tech III Year II Semester Examinations, December-January, 2011-2012
COMPUTER ORGANIZATION
(MECHANICAL ENGINEERING (MECHATRONICS))
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
---

1. Write about micro programmed control and discuss designing a control unit.
[16]

2. Explain in detail Booths multiplication algorithm with examples. [16]

3.a) What are the performance considerations for cache memory?
b) Give a note on RAID technology. [8+8]

4.a) Discuss direct memory access.
b) Explain standard input-output interfaces. [8+8]

5.a) What is pipelining? Discuss pipeline hazards.
b) Describe vector processing in RISC pipeline. [8+8]

6.a) List the characteristics of multiprocessors.
b) Discuss inter processor arbitration. [8+8]

7.a) Discuss the various types of computers.
b) Explain the necessity of error detection codes and any one code in detail.
[8+8]
8.a) Discuss arithmetic shift instruction with suitable examples
b) List various addressing modes. [8+8]





--ooOoo--


Code No: R05321405
SET-3 R05
B. Tech III Year II Semester Examinations, December-January, 2011-2012
COMPUTER ORGANIZATION
(MECHANICAL ENGINEERING (MECHATRONICS))
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
---

1.a) What are the performance considerations for cache memory?
b) Give a note on RAID technology. [8+8]

2.a) Discuss direct memory access.
b) Explain standard input-output interfaces. [8+8]

3.a) What is pipelining? Discuss pipeline hazards.
b) Describe vector processing in RISC pipeline. [8+8]

4.a) List the characteristics of multiprocessors.
b) Discuss inter processor arbitration. [8+8]

5.a) Discuss the various types of computers.
b) Explain the necessity of error detection codes and any one code in detail.
[8+8]
6.a) Discuss arithmetic shift instruction with suitable examples
b) List various addressing modes. [8+8]

7. Write about micro programmed control and discuss designing a control unit.
[16]

8. Explain in detail Booths multiplication algorithm with examples. [16]





--ooOoo--


Code No: R05321405
SET-4 R05
B. Tech III Year II Semester Examinations, December-January, 2011-2012
COMPUTER ORGANIZATION
(MECHANICAL ENGINEERING (MECHATRONICS))
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
---

1.a) What is pipelining? Discuss pipeline hazards.
b) Describe vector processing in RISC pipeline. [8+8]

2.a) List the characteristics of multiprocessors.
b) Discuss inter processor arbitration. [8+8]

3.a) Discuss the various types of computers.
b) Explain the necessity of error detection codes and any one code in detail.
[8+8]
4.a) Discuss arithmetic shift instruction with suitable examples
b) List various addressing modes. [8+8]

5. Write about micro programmed control and discuss designing a control unit.
[16]

6. Explain in detail Booths multiplication algorithm with examples. [16]

7.a) What are the performance considerations for cache memory?
b) Give a note on RAID technology. [8+8]

8.a) Discuss direct memory access.
b) Explain standard input-output interfaces. [8+8]





--ooOoo--

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