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B. TECH.
(SEM-III) THEORY EXAMINATION 2019-20
COMPUTER ORGANIZATION AND ARCHITECTURE
Time: 3 Hours Total Marks: 100
Note: 1. Attempt all Sections. If require any missing data; then choose suitably.

SECTION A

1. Attempt all questions in brief. 2 x 10 = 20

Qno. Question Marks C
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a. Define the term Computer Architecture. 2 1
b. Draw the basic functional units of a computer. 2 1
c. Perform the 2’s complement subtraction of smaller number (101011) from 2 2
larger number (111001).
d. What is the role of Multiplexer and Decoder? 2 2
e. Write the differences between RISC and CISC. 2 3

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f. What are the types of microinstructions available? 2 3
g. What is SRAM and DRAM? W 2 4
What is the difference between 2D and 21/2 D memory organization?
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h. 2 4

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i. What is I/O control method? 2 5
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j. What is bus arbitration? 2 5
SECTION B

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2. Attempt any three of the following:

Qno. Question 39 Marks C
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a. Convert the following arithmetic expressions from infix to reverse polish 5+5 1
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notation:
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i. A*B+C*D+E*F
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ii. A*[B+C*CD+E]/F*(G+H)
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b. Design a 4-bit Carry-Look ahead Adder and explain its operation with an 10 2
example.
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c. i. Draw the timing diagram for a instruction cycle and explain. 5+5 3
01

ii. Give a note on subroutine.

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d. What do you mean by virtual memory? Discuss how paging helps in 10 4

implementing virtual memory.
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e. 10 5
What is DMA? Describe how DMA is used to transfer data from peripherals.
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SECTION C
3. Attempt any one part of the following:
Qno. Question Marks C
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a. Describe in detail the different kinds of addressing modes with an example. 10 1
b. Discuss stack Organization. Explain the following in details- 10 1
(i) Register stack
(ii) Memory stack

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Printed Page 2 of 2 Sub Code:KCS302
Paper Id: 110322 Roll No: 0 0 0 0 0 0 0 0 0 0 0 0 0

4. Attempt any one part of the following:

Qno. Question Marks C
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a. Represent the following decimal number in IEEE standard floating-point 5+5 2
format in a single precision method (32-bit) representation method.
i. (65.175)10
ii. (-307.1875)10
b. Using Booth algorithm perform the multiplication on the following 6-bit 10 2
unsigned integer 10110011 * 11010101

5. Attempt any one part of the following:

Qno. Question Marks C
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a. What is parallelism and pipelining in computer Architecture? 10 3
b. Explain the organization of Microprogrammed control unit in detail. 10 3

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6. Attempt any one part of the following: W
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a. Discuss the different mapping techniques used in cache memories and their 10 4

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relative merits and demerits.

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b. RAM chip 4096 × 8 bits has two enable lines. How many pins are needed for 5+5 4

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the integrated circuits package? Draw a block diagram and label all input and
outputs of the RAM. What is main feature of random-access memory?
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7. Attempt any one part of the following:

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Qno. Question Marks C

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a. Write down the difference between isolated I/O and memory mapped I/O. Also 10 5
discuss advantages and disadvantages of isolated I/O and memory mapped I/O.
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b. i. Discuss the design of a typical input or output interface. 10 5

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ii. What are interrupts? How are they handled?

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RAJESH KUMAR TEWARI | 10-Dec-2019 09:02:00 | 139.5.198.30