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FPGA

The document discusses routing methodologies for three FPGA architectures: Xilinx, Actel, and Altera. Xilinx uses connection blocks and switches to connect logic blocks to wire segments. Actel has more horizontal than vertical wires and allows horizontal wires to switch to vertical wires. Altera uses a two-level hierarchy with logic blocks grouped into array blocks and global interconnect structures to connect array blocks.

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32 views3 pages

FPGA

The document discusses routing methodologies for three FPGA architectures: Xilinx, Actel, and Altera. Xilinx uses connection blocks and switches to connect logic blocks to wire segments. Actel has more horizontal than vertical wires and allows horizontal wires to switch to vertical wires. Altera uses a two-level hierarchy with logic blocks grouped into array blocks and global interconnect structures to connect array blocks.

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శ్యందీప్సహ
Copyright
© © All Rights Reserved
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FPGA ROUTING METHODOLOGY

Xilinx Routing methodology


In Xilinx routing, connections are made from logic block into the channel through a connection
block. As SRAM technology is used to implement Lookup Tables, connection sites are large. A
logic block is surrounded by connection blocks on all four sides. They connect logic block pins
to wire segments. Pass transistors are used to implement connection for output pins, while
use of multiplexers for input pins saves the number of SRAM cells required per pin. The logic
block pins connecting to connection blocks can then be connected to any number of wire
segments through switching blocks.

there are four types of wire segments available :

general purpose segments, the ones that pass through switches in the switch
block.
Direct interconnect : ones which connect logic block pins to four surrounding
connecting blocks
long line : high fan out uniform delay connections
clock lines : clock signal provider which runs all over the chip.

Actel routing methodology


Actel's design has more wire segments in horizontal direction than in vertical direction. The
input pins connect to all tracks of the channel that is on the same side as the pin. The output
pins extend across two channels above the logic block and two channels below it. Output pin
can be connected to all 4 channels that it crosses. The switch blocks are distributed
throughout the horizontal channels. All vertical tracks can make a connection with every
incidental horizontal track. This allows for the flexibility that a horizontal track can switch into a
vertical track, thus allowing for horizontal and vertical routing of same wire. The drawback is
more switches are required which add up to more capacitive load.

Altera routing methodology


Altera routing architecture has two level hierarchy. At the first level of the hierarchy, 16 or 32 of
the logic
blocks are grouped into a Logic Array Block, structure of the LAB is very similar to a traditional
PLD. the connection is formed using EPROM- like floating-gate transistors. The channel here
is set of wires that run vertically along the length of the FPGA. Tracks are used for four types
of connections :

connections from output of all logic blocks in LAB.

connection from logic expanders.


connections from output of logic blocks in other LABs
connections to and from Input output pads

all four types of tracks connect to every logic block in the array block. The connection block
makes sure that every such track can connect to every logic block pin. Any track can connect
to into any input which makes this routing simple. The intra-LAB routing consists of segmented
channel, where segments are as long as possible. Global interconnect structure called
programmable interconnect array(PIA) is used to make connections among LABs. Its internal
structure is similar to internal routing of a LAB. Advantage of this scheme is that regularity of
physical design of silicon allows it to be packed tightly and efficiently. The disadvantage is the
large number of switches required, which adds to capacitive load.

FPGA Advantages
Systems based on FPGAs (Field Programmable Gate Arrays) provide many advantages over
conventional implementations:

Long time availability


FPGAs (Field Programmable Gate Arrays) enable you to make yourself independent from
component manufacturers and distributors since the functionality is not given by the device
itself but in its configuration. The configuration can be programmed to be portable between
miscellaneous FPGAs without any adaptations.

Can be updated and upgraded at your customer's site


FPGAs in contrast to traditional computer chips are completely configurable. Updates and
feature enhancement can be carried out even after delivery at your customer's site.

Extremely short time to market


Through the use of FPGAs the development of hardware prototypes is significantly
accelerated since a big part of the hardware development process is shifted into ip core
design, which can take place in parallel. Additionally, because of the early availability of
hardware prototypes, time-consuming activities like the start-up and debugging of the
hardware are brought forward concurrently to the overall development.

Fast and efficient systems


Available standard components address a broad user group and consequently often
constitute a compromise between performance and compatibility. With FPGAs, systems can
be developed that are exactly customized for the designated task and for this reason works
highly efficient.

Performance gain for software applications


Complex tasks are often handled through software implementations in combination with
high-performance processors. In this case FPGAs provide a competitive alternative, which by

means of parallelization and customization for the specific task even establishes an
additional performance gain.

Real time applications


FPGAs are perfectly suitable for applications in time-critical systems. In contrast to software
based solutions with real time operating systems, FPGAs provide real deterministic behavior.
By means of the featured flexibility even complex computations can be executed in
extremely short periods.

Massively parallel data processing


The amount of data in contemporary systems is ever increasing which leads to the problem
that systems working sequential are no longer able to process the data on time. Especially
by means of parallelization, FPGAs provide a solution to this problem which in addition
scales excellently.

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