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Low Noise Amplifier: Project Report Cmos Rfic

This project report describes the design of a low noise amplifier (LNA) with the following specifications: operate at 5 GHz, voltage gain over 10dB within 50 MHz bandwidth, noise figure below 3dB, 1dB compression point above -6dBm, and input/output impedance matched to 50 ohms. A cascade topology is used consisting of common source, common gate, and common drain stages to meet the specs. Simulation results show the designed LNA meets all specifications, including a noise figure of 2.8dB and 1dB compression point of -19.577dBm.

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Nivin Paul
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0% found this document useful (0 votes)
34 views11 pages

Low Noise Amplifier: Project Report Cmos Rfic

This project report describes the design of a low noise amplifier (LNA) with the following specifications: operate at 5 GHz, voltage gain over 10dB within 50 MHz bandwidth, noise figure below 3dB, 1dB compression point above -6dBm, and input/output impedance matched to 50 ohms. A cascade topology is used consisting of common source, common gate, and common drain stages to meet the specs. Simulation results show the designed LNA meets all specifications, including a noise figure of 2.8dB and 1dB compression point of -19.577dBm.

Uploaded by

Nivin Paul
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Project Report

CMOS RFIC

LOW NOISE AMPLIFIER

Nivin Paul P V
M.Tech VLSI & CE
201541576

Introduction
The LNA is the first building block of any receiver. LNA becomes significant in an RF system
because it can control the overall Noise figure of the system. Noise figure of blocks following LNA
is divided by the power gain of LNA which implies more the power gain, less the noise figure of
the system. Noise figure of the LNA gets added to overall noise figure. Hence it becomes
important to minimize the noise figure of LNA. . The purpose of LNA is to provide sufficient gain
while preserving the input signal-to-noise ratio at output

Specifications:
Design a narrowband LNA for the following specs:
1. Frequency of operation f0 = 5 GHz
2. Voltage gain 10dB over at least 50 MHz BW
3. NF 3 dB;
4. IIP3 -6 dBm
5. Matched both input and output to 50 i.e. S11 & S22 -10 dB.
6. Minimize power consumption (Pdiss)

Choice of topology:
Single transistor circuits are preferred since more transistors means more noise into the
circuit. However a single transistor configuration is not sufficient to meet the above
specifications. Common source amplifier has good gain but has poor isolation due to the Cgd
capacitance. This also reduces the bandwidth of the amplifier. Inorder to improve the behavior,
a cascade structure is used which is a combination of common source and common gate. This
isolates the capacitance Cgd from output, hence improves output isolation and bandwidth. But
the drawback is output impedance increases. In order to make output impedance about 50 ohms
a common drain stage is used at output. Common drain stage has voltage gain unity but has low
output impedance.

Design

Schematic

Component
M1
M2
M3
Ls
Lg
Ld
Cd
Vbias
Ibias

Values
W=60u L=320nm f=1
W=120u L=180n f=3
W=50u L=240n f=1
567 pH
4 nH
1.5n
400f
M1 =450mV M2=2 V
M3 = 1uA

Simulation Results
S11 input reflection coefficent

S22 Output reflection coefficient

S21 Forward Gain

S12 Reverse isolation

Z11 and Z22 Input and Output Impedance

Noise figure

1 dB compression point

Input and Output IIP3

Results
At 5 GHz
Parameter
S11
S22
S21
S12
Z11
Z22
Noise figure
I dB compression point
Input referred IIP3
Output referred IIP3

Value
-15.5 dB
-13dB
23dB
-52dB
52 ohms
49 ohms
2.8 dB
-19.577 dBm
3.43 dBm
41.88 dBm

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