Experiment VHDL
Experiment VHDL
Experiment No :-7(A)
Apparatus Required :-
i. Xilinx Software 9.2i
ii. Computer System
iii. Power Supply
Theory :-
Mealy machine is a finite-state machine whose output values are determined both by its
current state and the current inputs. (This is in contrast to a Moore machine,whose output
values are determined solely by its current state.) A Mealy machine is a deterministic finite-
state transducer:- for each state and input, at most one transition is possible.
The state diagram for a Mealy machine associates an output value with each transition edge
(in contrast to the state diagram for a Moore machine, which associates an output value with
each state).
Program :-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entitymelay is
Resetn : in STD_LOGIC;
z : out STD_LOGIC);
endmelay;
SIGNAL y :State_type ;
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BEGIN
BEGIN
y <= A ;
CASE y IS
WHEN A =>
ELSE y <= B ;
END IF ;
WHEN B =>
ELSE y <= B ;
END IF ;
END CASE ;
END IF ;
END PROCESS ;
PROCESS ( y, w )
BEGIN
CASE y IS
WHEN A =>
z <= '0' ;
WHEN B =>
z <= w ;
END CASE ;
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END PROCESS ;
end Behavioral;
Block Diagarm
RTL View
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Technology View
Waveform
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Date :- - - 2017
Experiment No :-7(B)
Apparatus Required :-
i. Xilinx Software 9.2i
ii. Computer System
iii. Power Supply
Theory :-
Moore machine is a finite-state machine whose output values are determined only by its
current state. This is in contrast to a Mealy machine, whose output values are determined
both by its current state and by the values of its inputs. The Moore machine is named
after Edward F. Moore, who presented the concept in a 1956 paper, “Gedanken-
experiments on Sequential Machines.
Program :-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entitymoore is
resetn : in STD_LOGIC;
w : in STD_LOGIC;
z : out STD_LOGIC);
endmoore;
SIGNAL y :State_type ;
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begin
begin
y <= A ;
CASE y IS
WHEN A =>
IF w = '0' THEN
y <= A ;
ELSE
y <= B ;
END IF ;
WHEN B =>
IF w = '0' THEN
y <= A ;
ELSE
y <= C ;
END IF ;
WHEN C =>
IF w = '0' THEN
y <= A ;
ELSE
y <= C ;
END IF ;
END CASE ;
END IF ;
END PROCESS ;
end Behavioral;
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RTL View
70
Technology View
Waveform
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Date :- - - 2017
Experiment No :-8
Apparatus Required :-
i. Xilinx Software 9.2i
ii. Computer System
iii. Power Supply
Theory :-
A vending machine is an automated machine that provides items such
as snacks, beverages, alcohol, cigarettes and lottery tickets to consumers after money or
a credit card is inserted into the machine. The first modern vending machines were developed
in England in the early 1880s that dispensed postcards. Vending machines exist in many
countries, and in more recent times, specialized vending machines that provide less common
products compared to traditional vending machine items have been created and provided to
consumers.
Program :-
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
ENTITY VM_AV IS
z : OUT std_logic) ;
END ;
BEGIN
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PROCESS (CLK, next_S1 , next_S2 , next_S3 , next_S4 , next_S5 , next_S6
, next_S7 ,
BEGIN
S1 < = next_S1 ;
S2 < = next_S2 ;
S3 < = next_S3 ;
S4 < = next_S4 ;
S5 < = next_S5 ;
S6 < = next_S6 ;
S7 < = next_S7 ;
S8 < = next_S8 ;
S9 < = next_S9 ;
z < = next_z ;
END IF ;
END PROCESS ;
BEGIN
IF ( ( D = '1' AND N = '1' AND (S1 = '1') ) OR ( D = '0' AND N = '0' AND
(S1 = '1') ) OR
( D = '0' AND N = '0' AND (S4 = '1') ) OR ( D = '0' AND N = '0' AND (S7 =
'1') ) OR ( (
END IF ;
IF ( ( RESET= '0' AND D = '1' AND N = '0' AND (S1 = '1') ) OR ( D = '1'
AND N = '1' AND
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RESET= '0' AND (S2 = '1') ) OR ( N = '0' AND D = '0' AND RESET= '0'
AND (S2 = '1') ) )
END IF ;
IF ( ( RESET= '0' AND D = '0' AND N = '1' AND (S1 = '1') ) OR ( D = '0'
AND N = '0' AND
RESET= '0' AND (S3 = '1') ) OR ( N = '1' AND D = '1' AND RESET= '0'
AND (S3 = '1') )
OR ( RESET= '0' AND D = '0' AND N = '1' AND (S5 = '1') ) OR ( RESET=
'0' AND D = '0'
END IF ;
IF ( ( RESET= '0' AND D = '0' AND N = '1' AND (S2 = '1') ) OR ( D = '1'
AND RESET= '0'
AND (S4 = '1') ) OR ( N = '1' AND RESET= '0' AND (S4 = '1') ) ) THEN
next_S4 < = '1' ;
END IF ;
AND (S5 = '1') ) OR ( N = '0' AND RESET= '0' AND (S5 = '1') ) ) THEN
next_S5 < = '1' ;
END IF ;
IF ( ( RESET= '0' AND D = '0' AND N = '1' AND (S3 = '1') ) OR ( D = '1'
AND N = '1' AND
RESET= '0' AND (S6 = '1') ) OR ( N = '0' AND D = '0' AND RESET= '0'
AND (S6 = '1') ) )
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END IF ;
IF ( ( RESET= '0' AND D = '1' AND N = '0' AND (S3 = '1') ) OR ( D = '1'
AND RESET= '0'
AND (S7 = '1') ) OR ( N = '1' AND RESET= '0' AND (S7 = '1') ) ) THEN
next_S7 < = '1' ;
END IF ;
IF ( ( RESET= '0' AND D = '0' AND N = '1' AND (S6 = '1') ) ) THEN
next_S8 < = '1' ;
END IF ;
IF ( ( RESET= '0' AND D = '1' AND N = '0' AND (S6 = '1') ) OR ( D = '1'
AND RESET= '0'
AND (S9 = '1') ) OR ( N = '0' AND RESET= '0' AND (S9 = '1') ) ) THEN
next_S9 < = '1' ;
END IF ;
IF ( ( RESET= '0' AND D = '0' AND N = '1' AND (S2 = '1') ) OR ( D = '1'
AND RESET= '0'
AND (S4 = '1') ) OR ( N = '1' AND RESET= '0' AND (S4 = '1') ) OR (
RESET= '0' AND
D = '1' AND N = '0' AND (S2 = '1') ) OR ( D = '1' AND RESET= '0' AND
(S5 = '1') ) OR (
N = '0' AND RESET= '0' AND (S5 = '1') ) OR ( RESET= '0' AND D = '1'
AND N = '0' AND (
S3 = '1') ) OR ( D = '1' AND RESET= '0' AND (S7 = '1') ) OR ( N = '1' AND
RESET= '0' AND
(S7 = '1') ) OR ( RESET= '0' AND D = '0' AND N = '1' AND (S6 = '1') ) OR
( RESET= '0'
AND D = '1' AND N = '0' AND (S6 = '1') ) OR ( D = '1' AND RESET= '0'
AND (S9 = '1') ) OR
( N = '0' AND RESET= '0' AND (S9 = '1') ) ) THEN next_z< = '1' ;
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ELSE next_z< = '0' ;
END IF ;
END PROCESS ;
END BEHAVIOR ;
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