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CSE 240 Autumn 2005 DUE: Fri. 23 September 2005 Intro. To Computer Architecture Homework 2

This document contains instructions for a homework assignment on computer architecture. It includes 5 problems related to transistors and combinational logic circuits. Students are asked to complete truth tables, draw circuit diagrams, and determine the number of transistors required for different logic functions. The problems cover topics like transistors, NOT, OR, AND, NAND, XOR gates and DeMorgan's laws. Students are to show their work and attach additional pages if needed to fully answer the questions.

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141 views7 pages

CSE 240 Autumn 2005 DUE: Fri. 23 September 2005 Intro. To Computer Architecture Homework 2

This document contains instructions for a homework assignment on computer architecture. It includes 5 problems related to transistors and combinational logic circuits. Students are asked to complete truth tables, draw circuit diagrams, and determine the number of transistors required for different logic functions. The problems cover topics like transistors, NOT, OR, AND, NAND, XOR gates and DeMorgan's laws. Students are to show their work and attach additional pages if needed to fully answer the questions.

Uploaded by

Răzvan Ionuț
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Name: 1

Intro. to Computer Architecture Homework 2


CSE 240 Autumn 2005 DUE: Fri. 23 September 2005

Write your name at the top of each page, and write your answers on these pages. Additional pages may be attached
(with staple) if necessary. Please ensure that your answers are legible. Please show your work. Due at the beginning
of class. Total points: 77.

1. [10 Points] Transistors. In this problem you will determine for all possible inputs, A and B, whether or not each
of the transistors in the circuit, below, conduct or not.

1
3 4
A

B 6

(a) For all inputs A and B indicate in the table below whether each transistor (labeled 1-6) conducts (i.e., act
like a piece of wire, denoted “1”) or does not conduct (i.e., acts like an open circuit, denoted “0”). Also
indicate the value (0 or 1) of the output Z.

A B 1 2 3 4 5 6 Z
0 0
0 1
1 0
1 1

(b) Give the logical expression that describes Z in terms of A and B. You are better off basing your answer on
the circuit instead of the truth table.
2

2. [5 Points] Transistors. The transistor-level circuit given below has a problem: with certain inputs it catches on
fire!! Why is this? Be precise in describing when and why the problem arises. Hint: You may find it useful to
determine whether each transistor in the circuit conducts and the value of the output Z for each possible input.

A Ap
Cp C
B Bp

A An
Bn B

C Cn
Name: 3

3. [8 Points] Transistors Build a transistor-level circuit implementing a 3-input AND gate. The output (Z) of the
circuit should be true only when all inputs (A, B, and C) are true. Be sure to label A, B, C, and Z in your circuit.
Hint: If you are using more than 8 transistors, you’re on the wrong track.
4

4. [12 Points] Combinational Logic Circuits. NOR is logically complete (i.e., any logic function can be built
using only NOR gates). Using only NOR gates, construct gate-level circuits that compute each of the following.
You might find it helpful to use DeMorgan’s Law.

(a) NOT

(b) OR
Name: 5

(c) AND

(d) NAND
6

5. [20 Points] Combinational Logic Circuits. The exclusive-or function (XOR) is defined to be true when exactly
one of its two inputs is true.
(a) Confirm that Z = (A OR B) AND NOT (A AND B) computes XOR by completing the following truth
table.

A B A OR B A AND B NOT (A AND B) Z = (A OR B) AND NOT (A AND B)


0 0
0 1
1 0
1 1

(b) Construct the gate-level logic circuit for Z (above) using only AND, OR, and NAND gates (no other gates
may be used). Be sure to label A, B, and Z.

(c) How many MOS transistors does your circuit require if AND, OR and NAND gates are implemented as
given in Figures 3.6 and 3.7 of the textbook (pages 56 and 57).
Name: 7

(d) Now confirm that Z ′ = NOT ( NOT (A OR B) OR (A AND B)) also represents XOR by completing the
following truth table. (If you like, you can also symbolically show Z = Z ′ via DeMorgan’s Law.)

A B A OR B NOT (A OR B) A AND B Z ′ = NOT ( NOT (A OR B) OR (A AND B))


0 0
0 1
1 0
1 1

(e) Construct the gate-level logic circuit for Z ′ (above) using only AND and NOR gates.

(f) How many MOS transistors does your circuit require if AND and NOR gates are implemented as given in
Figures 3.5 and 3.7 of the textbook (pages 55 and 57).

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