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Microcomputer and Interfacing Course Outline

coure outline 4th 1st semister

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0% found this document useful (0 votes)
196 views

Microcomputer and Interfacing Course Outline

coure outline 4th 1st semister

Uploaded by

kibrom atsbha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ADIGRATUNIVERSITY COLLEGE OF ENGINEERING & TECHNOLOGY DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING COURSE OUTLINE INSTRUCTORS’ NAME: ESUBALEW A.(M.SC), ACADEMIC RANK: LECTURERS 1. IDENTIFYING INFORMATION urse tit Microcomputer and Interfacing ¢ 0 ECE R416} ‘ourse offered IV, semester I Prerequis g3143- Computer Architecture and Organization se Team L Esubalew COURSE CONTENT AND SCHEDULE OF ACTIVITIES c 1. INTRODUCTION TO c ay MICROPROCESSORS & COMPUTERS z a) + History of Microprocessors : ‘ ‘= Evolution of the Intel processo - 2, THE 8086 MICROCONTROLLER . ARCHITECTURE structions a 8086 «Arithmetic and Logic Instructio Architecture of 8086 Addition © Bus Interface Unit (BIU} Subtraction : E n Unit (EU) 9 Comparison ny + Register Organization ultiplication ‘General purpose regist > Division af) 0d. MICKOPROCESSOR PROGRAMING oni © Program Memory Addressing Instruction Modes © Stack Memory Addressing Modes + CALL and RET Instructions + Instruction Set of 8085 IMP Instruction ‘Data Movement Instructions Conditional jump eration Control instructions Programmed 1/0 Process Control struction (yo Fort Addin Dastdiag sternal Programmable Peripheral Interface HardwareSynchrontzation ry ee eae Instructions veghsiadag le ¢ Interrupt instruction prod 8 Operation Modes ofthe 8285 Assembly Language Programming Then Santee Assembly Lar a The 8254 Programmable Interval rial 1/0 Inter nings and De Interface UART 8251 ‘Tener Dey pt Time Delay using COUNTERS Software and Hardware lterrupts Timer delays using NESTED Loop Interrupts vectors and Vector {8086 System Configuration table ‘Signal Description of 8086 The 8259A Programmable Minimum Mode of Operation Interrupt Controller (PIC Maximum Mode of Operation 4 Memory Access (D) 4. INTERFACING ‘0 Basle DMA Operations © DMAControlied 1/0 ‘+ Basic 10 Interfacing 9 The 8237 DMA Controll 3, ASSESSMENT Continuous assessment 60% Final Exam 40%: 4, TEXTS AND SUPPORTING MATERIALS Text Book: Fert papas V Hall, Micraprocessors and Interfacing Programming and Hardware’, 2nd Edition, Pets McGraw-Hill Publishing Company Limited, NewDethi-2002 References: Referemmesh S Gaonkar, ‘Microprocessor Programming and Interfacing using 8085), Penram Publications. 4th Edition, 2003 Ax Ray, KM Bhurchandy, Intel Microprocessors-Architecture, Programming and Interfacing’, McGraw-Hill International Edition, 2004 Microprocessors and interfacing first Edition, 2009. AP Douglas and D.A Douglas

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