Finite State Machines

(FSM) Design
Finite State Machines Design
1. Describe the intended circuit in term of
sequence, inputs and outputs (for eg, Block
Diagrams)
2. Develop State Diagram
3. Develop next state table
4. Determine type of FF to use. Then, construct
FF transition table
5. Derive FF’s input excitation function. May use
K-map
6. Derive next state’s variables/equations
7. Draw Logic Diagram
3-bit Gray Code Counter Design
 Step 1: Describe the intended circuit in term of
sequence, inputs and outputs (for eg, Block
Diagrams)

Q0

Q1

Q2

CLOCK
3-bit Gray Code Counter Design
(cont.)
 Step 2: Develop State Diagram

000
100 001

101 011

111 010
110
3-bit Gray Code Counter Design
(cont.)
 Step 3: Develop next state table
Present State Next State
Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1
0 0 1 0 1 1
0 1 1 0 1 0
0 1 0 1 1 0
1 1 0 1 1 1
1 1 1 1 0 1
1 0 1 1 0 0
1 0 0 0 0 0
3-bit Gray Code Counter Design
(cont.)
 Step 4: Determine type of FF to use. Then,
construct FF transition table
Output Transition Flip Flop Inputs Output Transition Flip Flop Inputs
Q  Q+ J K Q  Q+ D
00 0 X 00 0
0 1 1 X 0 1 1
10 X 1 10 0
11 X 0 11 1
Transition Table for JK FF Transition Table for D FF

Output Transition Flip Flop Inputs

Q  Q+ T
00 0
0 1 1
10 1
11 0
Transition Table for T FF
3-bit Gray Code Counter Design
(cont.)
 Step 5: Derive FF’s input excitation function.
May use K-map Present State Next State FF0
Q2Q1Q0 Q2Q1Q0 J0 K0
000 001 1 X
001 011 X 0
011 010 X 1
010 110 0 X
110 111 1 X
111 101 X 0
101 100 X 1
100 000 0 X

J0 Q2\Q1Q0 00 01 11 10 K0 Q2\Q1Q0 00 01 11 10
0 1 X X 0 0 X 0 1 X
1 0 X X 1 1 X 1 0 X
 3-bit Gray Code Counter Design
(cont.)
 Step 6: Derive next state’s variable/equation
J0 Q2\Q1Q0 00 01 11 10 K0 Q2\Q1Q0 00 01 11 10
0 1 X X 0 0 X 0 1 X
1 0 X X 1 1 X 1 0 X

J0=Q2Q1+Q2Q1 K0=Q2Q1+Q2Q1
=Q2 XNOR Q1 =Q2 XOR Q1

 Repeat for J1, K1, J2, K2

J1= Q2Q0 K1=Q2Q0

J2=Q1Q0 K2=Q1Q0
3-bit Gray Code Counter Design
(cont.)
 Step 7: Draw Logic Diagram
 Design Irregular Counter? Example 8-5
 Design 3-bits UP/DOWN Gray Code Counter???
Example 8-6
 Use JK FF?
 Use T FF?
 Use D FF?
Example
 Design a 2-bit binary counter that will only
proceed to the next count when input is 1. The
counter will output a 1 when odd number (1 and
3) occurs and will recycle back to zero upon
reaching the final number.
Example (cont.)
 Step 1:

x Q0

Q1

CLOCK
Example (cont.)
 Step 2: Mealy or Moore?
0/0

00
1/0 1/1

0/1 11 01 0/1

1/1 1/0
10

0/0
Example (cont.)
 Step 3:

x Present State Next State z

Q1Q0 Q1Q0
0 00 00 0
1 00 01 1
0 01 01 1
1 01 10 0
0 10 10 0
1 10 11 1
0 11 11 1
1 11 00 0
Example (cont.)
 Step 4: D FF

Output Transition Flip Flop Inputs

Q  Q+ D
00 0
0 1 1
10 0
11 1
Example (cont.)
 Step 5: Output Flip Flop
Transition Inputs
Q  Q+
D
Present Next
00 0
x State State z D1 D0
0 1 1
Q1 Q0 Q1+Q0+
10 0
0 00 00 0 0 0 11 1

1 00 01 1 0 1
0 01 01 1 0 1
1 01 10 0 1 0
0 10 10 0 1 0
1 10 11 1 1 1
0 11 11 1 1 1
1 11 00 0 0 0
Example (cont.)
x Present Next z D1 D0
 Step 5 (cont.): State State
0 00 00 0 0 0
1 00 01 1 0 1
z x\Q1 Q0 00 01 11 10 0 01 01 1 0 1

0 0 1 1 0 1 01 10 0 1 0
0 10 10 0 1 0
1 1 0 0 1 1 10 11 1 1 1

D1 x\Q1 Q0 0 11 11 1 1 1
00 01 11 10
1 11 00 0 0 0
0 0 1 1 1
1 0 1 0 1
z = x’Q0 + x(Q0)’ = x XOR Q0
D0 x\Q1 Q0 00 01 11 10 D1 = (Q1)’Q0 + Q1(Q0)’ + x’Q0 + x’Q1
= Q1 XOR Q0 + x’ (Q0 +Q1)
0 0 1 1 0 D0 = x’Q0 + x(Q0)’ = x XOR Q0
1 1 0 0 1
Example (cont.)