Vishal Devastani is seeking a position that allows him to enhance his knowledge and utilize his skills to grow an organization. He has a B.Tech in ECE from VFSTR University with an 8.2 CGPA. His skills include C, Python, basic networking concepts, digital electronics, microprocessors and communication protocols. He has experience with academic and internship projects involving gesture controlled robots using the MYO armband and designing/verifying a UART module in Verilog.
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Devasani Vishal: Bagged
Vishal Devastani is seeking a position that allows him to enhance his knowledge and utilize his skills to grow an organization. He has a B.Tech in ECE from VFSTR University with an 8.2 CGPA. His skills include C, Python, basic networking concepts, digital electronics, microprocessors and communication protocols. He has experience with academic and internship projects involving gesture controlled robots using the MYO armband and designing/verifying a UART module in Verilog.
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DEVASANI VISHAL
Mobile: Career Objective
+91 8555906723 To be a part of an organization that gives a scope to enhance Email: devasanivishal964@gmail.com my knowledge and utilize my skills for the growth of organization. Education Profile: Date of Birth: 22-10-1996 Course Institution Year CGPA Technical Skills: B. Tech VFSTR University Knowledge on C ,Python 2019 8.2 ECE Vadlamudi Basic Networking Concepts Basic Electronics Intermediate SR Junior College, 2015 8.3 Digital Electronics MPC Hyderabad Microprocessor-8085 SR Digi School, UART,SPI,I2C. SSC 2013 9.0 Hyderabad Languages Known: Telugu and English Exposure: Hobbies: Playing Kabaddi , Cricket Academic Project : Title : Gesture Controlled Robot using MYO ARMBAND Permanent Address: Software : Arduino H.NO:7-84/10/8, Ambedkar nagar ,Boduppal Description : It is gesture controller that triggers variety of actions Hyderabad, Pin: 500092. on computer based on your muscle & movement of arm. myo Professional Training: armband captures the muscle moments for different gestures made Bagged Internship Certificate on by our arm and converts those into electric signals. RTL design and Verification at Sion Semiconductors, Bangalore Internship Project : Accomplishments: Title : Design and verification of UART Qualified Preliminary English Software : Modelsim Simulator Test conducted by Cambridge University Description: UART is a computer hardware device for Workshops Attended: asynchronous serial communication in which the data format and Participated in “Programming in python” conducted in Vignan’s transmission speeds are configurable Responsibilities. The electric University. signaling levels and methods are handled by a driver circuit external Extra-Curricular Activities: to the UART, Verified the RTL module using Verilog. Bagged South Zone Merit Certificate in KABADDI Tournament held at Veltech University Chennai
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