Lab# 08

Design and Implementation of BCD to Excess-3

Objective:
 Understanding how ICs can be implemented to convert bcd to excess-3.
 Use of truth table and Logic Diagram to construct circuit.

Equipment:

2.1 Breadboard

2.2 ICs

2.2.1 IC 7408
2.2.2 IC 7432
2.2.3 IC 7404
2.2.4 IC 7486

2.3 Wires

Theory:
Excess-3 binary code is an unweighted self-complementary BCD code. Self-Complementary
property means that the 1’s complement of an excess-3 number is the excess-3 code of the 9’s
complement of the corresponding decimal number. This property is useful since a decimal
number can be nines complemented (for subtraction) as easily as a binary number can be ones
complemented; just by inverting all bits. For example, the excess-3 code for 3(0011) is 0110 and
to find the excess-3 code of the complement of 3, we just need to find the 1’s complement of
0110 -> 1001, which is also the excess-3 code for the 9’s complement of 3 -> (9-3) = 6.
Truth Table:

BCD Input Excess-3 Output

0 0 0 1 0 1 0 0

0 0 1 0 0 1 0 1

0 0 1 1 0 1 1 0

0 1 0 0 0 1 1 1

0 1 0 1 1 0 0 0

0 1 1 0 1 0 0 1

0 1 1 1 1 0 1 0

1 0 0 0 1 0 1 1

1 0 0 1 1 1 0 0

1 0 1 0 X X X X

1 0 1 1 X X X X

1 1 0 0 X X X X

1 1 0 1 X X X X

1 1 1 0 X X X X
 1 1 1 1 X X X X

K- Map:
Equations:

i. E1= A + BC + BD
ii. E2= B’C + B’D + BC’D’
iii. E3= CD + C’D’ = C XOR D
iv. E4= D’

Circuit Diagram:
 Lab # 10
 Statement: Design and implementation of BCD to Decimal
Decoder
 Objective:
 1. Understanding how ICs can be implemented to convert bcd to decimal decoder.
2. Using Truth table and logic diagrams to construct circuit.
 Equipments:
1. Breadboard.
2. IC 74145
3. Wires.
 Theory:
In computing and electronic systems, a binary-coded decimal (BCD) is a digital encoding
method for decimal numbers in which each digit is represented by its own binary sequence.
BCD is different from converting a decimal number to binary. For example, 45, when converted
to binary, is 101101, and when represented in BCD is 01000101.

 Pin diagram

 Truth table:
Inputs Outputs
A B C D 0 1 2 3 4 5 6 7 8 9
0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 1 0 1 0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0 0 0 0 0 0 0
0 0 1 1 0 0 0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 0 1 0 0 0 0 0
0 1 0 1 0 0 0 0 0 1 0 0 0 0
0 1 1 0 0 0 0 0 0 0 1 0 0 0
0 1 1 1 0 0 0 0 0 0 0 1 0 0
1 0 0 0 0 0 0 0 0 0 0 0 1 0
1 0 0 1 0 0 0 0 0 0 0 0 0 1
1 0 1 0 0 0 0 0 0 0 0 0 1 0*
1 0 1 1 0 0 0 0 0 0 0 0 0 1*
1 1 0 0 0 0 0 0 0 0 0 0 1 0*
1 1 0 1 0 0 0 0 0 0 0 0 0 1*
1 1 1 0 0 0 0 0 0 0 0 0 1 0*
1 1 1 1 0 0 0 0 0 0 0 0 0 1*

 Circuit diagram:
 Lab # 11
Statement: Design and implementation of magnitude comparator:
 Objective:
1. Understanding how ICs can be implemented for magnitude comparator.
2. Using Truth table and logic diagrams to construct circuit.
 Equipments:
1. Breadboard.
2. IC 7485
3. Wires.
 Theory:
A magnitude digital comparator is a combinational circuit that compares two digital or
binary numbers (consider A and B) and determines their relative magnitudes in order to
find out whether one number is equal, less than or greater than the other digital
number.
Three binary variables are used to indicate the outcome of the comparison as A>B, A<B,
or A=B. The below figure shows the block diagram of a n-bit comparator which
compares the two numbers of n-bit length and generates their relation between
themselves.
 Pin diagram
 Truth table:
A1 A0 B1 B0 A>B A=B A<B
0 0 0 0 0 1 0
0 0 0 1 0 0 1
0 0 1 0 0 0 1
0 0 1 1 0 0 1
0 1 0 0 1 0 0
0 1 0 1 0 1 0
0 1 1 0 0 0 1
0 1 1 1 0 0 1
1 0 0 0 1 0 0
1 0 0 1 1 0 0
1 0 1 0 0 1 0
1 0 1 1 0 0 1
1 1 0 0 1 0 0
1 1 0 1 1 0 0
1 1 1 0 1 0 0
1 1 1 1 0 1 0

 Circuit diagram: