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So Sanh 8086 Va ARM

The 8086 and ARM Cortex M processors share some similarities like using registers for data transfer and a stack structure. However, they differ in key ways. The 8086 uses memory segmentation and 16-bit registers while the ARM Cortex M does not segment memory and uses 32-bit registers. The 8086 also uses physical addresses while the ARM uses an aliased addressing formula. Additionally, the ARM's instructions are halfword aligned while the 8086's vary by instruction, and the ARM has separate status registers while the 8086 combines status and control flags.

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170 views2 pages

So Sanh 8086 Va ARM

The 8086 and ARM Cortex M processors share some similarities like using registers for data transfer and a stack structure. However, they differ in key ways. The 8086 uses memory segmentation and 16-bit registers while the ARM Cortex M does not segment memory and uses 32-bit registers. The 8086 also uses physical addresses while the ARM uses an aliased addressing formula. Additionally, the ARM's instructions are halfword aligned while the 8086's vary by instruction, and the ARM has separate status registers while the 8086 combines status and control flags.

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Duy Hùng Nguyễn
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Sự giống và khác nhau giữa vi xử lý 8086 và CPU của vi xử lý ARM Cortex M

Similarities:
 Both of them use registers to transfer data
 Registers:
- ARM: R13 (Stack Pointer –> SP in 8086)
- ARM: R15, Program Counter (PC) -> points to the next instruction to
be fetched from memory (like the IP (Instruction Pointer) register of
8086)
- ARM and 8086 have registers to show status (Flag registers in 8086
and Status registers in ARM)
 Use stack structure and little endian

Differences:

8086 microprocessors ARM Cortex-M CPUs


- Memory Segmentation: - No memory segmentation structure
 4 segments, each segment has 64
KB memory
 Using 20 bit address (= 1MB
address)
 2 units: Bus Interface Unit and
Execution Unit

- Registers: (16 bit) - Registers: (32 bit)


 4 general-purpose registers: AX,  R0 -> R12: General-purpose
BX, CX, DX (all pertain to the EU registers (13 registers)
block)  R13: Stack Pointer (SP) divided
 CS (Code Segment), DS (Data into Main Stack Pointer (MSP – for
Segment), SS (Stack Segment), ES OS software) and Process Stack
(Extra Segment) (pertain to the Pointer (PSP – for user software).
BIU) Only 1 register active at a time
 SI (Source Index), DI (Destination (The software considering is in a
Index), BS (Base Pointer) high-reliability OS)
 R14: Link Register (LR) -> Store
return location for functions
 R15: Program Counter (PC) ->
points to the next
- Physical Address: (20 bit) - Aliased-address using bit-banding
 Physical address = Segment formula:
address (16 bit) * 10h + Offset  To access bit b of the byte in RAM:
address (16 bit) 0x2200.0000 + 32*n + 4*b
n means address 0x2000.0000 + n
 To access bit b of the byte in I/O
space: 0x4200.0000 + 32*n + 4*b
n means address 0x4000.0000 + n

- Data: - Data:
 A word = 16 bit data  A halfword = 16 bit data
 A word = 32 bit data

- Instructions: - Instructions:
 Depend on each instruction  All are halfword aligned (16 bit)

- Flag Registers: - Status Registers:


 6 status flags: CF (Carry Flag), PF  3 status registers: APSR
(Parity Flag), AF (Auxiliary Flag), (Application Program Status
ZF (Zero Flag), SF (Sign Flag), OF Register), IPSR (Interrupts
(Overflow Flag) Program Status Register), EPSR
 3 control flags: TF (Trap Flag), IF (Execution Program Status
(Interrupt Flag), DF (Direction Register)
Flag)  Special bits: N (Negative?), Z (the
result is zero?), C (carry is set on
an unsigned overflow), V (signed
overflow), Q (saturation flag), T
(always be 1)

- Stack: - Stack:
 Only 1 stack  Divided into 2 stacks: The Main
Stack and The Process Stack

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