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AND GATE (7408) : A Y B Truth Table

Here are the key points about NAND gates with 3 or more inputs: - A 3-input NAND gate behaves like a 2-input NAND gate with the first two inputs, and a final NAND between the output of that and the third input. - For a 3-input NAND, the output is 1 only if all three inputs are 0. If any input is 1, the output is 0. - A 4-input NAND gate can be viewed as having two 2-input NAND gates, with the output of the first fed into the second along with the fourth input. - In general, an n-input NAND gate can be constructed by "chaining" 2

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0% found this document useful (0 votes)
2K views

AND GATE (7408) : A Y B Truth Table

Here are the key points about NAND gates with 3 or more inputs: - A 3-input NAND gate behaves like a 2-input NAND gate with the first two inputs, and a final NAND between the output of that and the third input. - For a 3-input NAND, the output is 1 only if all three inputs are 0. If any input is 1, the output is 0. - A 4-input NAND gate can be viewed as having two 2-input NAND gates, with the output of the first fed into the second along with the fourth input. - In general, an n-input NAND gate can be constructed by "chaining" 2

Uploaded by

pankajmadhu
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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AND GATE (7408) 1 VCC 14

13

A Y 2
12

Truth Table
3
11
A B Y=A.B 4
7408
10

0 0 0 5
9

0 1 0

1 0 0 6

7GND 8
1 1 1
OR GATE (7432)
A 1 VCC 14
Y 2
13

12
B

Truth Table
3
11
A B Y=A+B 4
7432
10
0 0 0 5
9

0 1 1

1 0 1 6

1 1 1

NOT GATE (7404)

Truth Table

A Y=Ā

0 1

1 0

7 GND 8
NAND GATE (7400)

A
Y

Truth Table

A B

0 0 1

0 1 1

1 0 1

1 1 0

NOR GATE (7402)

A
Y
1 VCC 14
13
B

Truth Table 2
3 12
A B 7402 11
4

0 0 1 10

0 1 0
5

1 0 0 6
9
7 GND
8
1 1 0

8
EX-OR GATE (7486)
A 1 VCC 14
Y 13
2
12
B

Truth Table
3
11
A B Y=AB 4
7486
10

0 0 0 5
9

0 1 1
1 0 1 6

7GND 8
1 1 0

9
DEMORGAN’S THEOREM:

a) AB‟=A‟+B‟

TRUTH TABLE:

A B
0 0 1 1
0 1 1 1
1 0 1 1
1 1 0 0

CIRCUIT DIAGRAM:

b) (A+B)‟=A‟.B‟

TRUTH TABLE:

A B
0 0 1 1
0 1 0 0
1 0 0 0
1 1 0 0

CIRCUIT DIAGRAM:
b) Realization SOP & POS Expressions:
TRUTH TABLE:

Full adder:

INPUT OUTPUTS
A B CIN S (Sum) COUT (Carry)
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

LOGIC DIAGRAM:

Realization of full adder using Basic and EXOR gates

S = A xor B xor C
C = A.B +C(A xor B)
TRUTH TABLE:
Full Subtractor:

INPUTS OUTPUTS
A B BIN D (Difference) BOUT (Borrow)
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

LOGIC DIAGRAM:
LOGIC DIAGRAM:

SR Flip Flop

TRUTH TABLE FOR CLOCKED SR FLIP-FLOP

Inputs Output
Operation
CLK S R Qn+ 1

0 X X Qn No change
0 0 Qn No change
0 1 0 Reset
1 0 1 Set
-
1 1 Indeterminate
JK FLIP FLOP

TRUTH TABLE FOR JK - FF:

Inputs Output
Operation
CLK J K Qn+ 1

0 X X Qn No change
0 0 Qn No change
0 1 0 Reset
1 0 1 Set

1 1 Qn„ Toggles
VIVA QUESTIONS

1. Write down the truth table of all logic gates?


2. What do you mean by universal gate?
3. Write truth table for 2 I/P OR, NOR, AND and NAND gate?
4. Implement all logic gate by using Universal gate?
5. Why is they called Universal Gates?
6. Give the name of universal gate?
7. Draw circuit diagram of Half Adder circuit?
8. Draw circuit diagram of Full Adder circuit?
9. Draw Full Adder circuit by using Half Adder circuit and minimum no. of logic gate?
10. Write Boolean function for half adder? Q.5 Write Boolean function for Full adder?
11. Design the half Adder & Full Adder using NAND-NAND Logic.
12. Draw circuit diagram of Half Subtractor circuit?
13. Draw circuit diagram of Full Subtractor circuit?
14. Draw Full Subtractor circuit by using Half Subtractor circuit and minimum no. of logic
gate?
15. Write Boolean function for half Subtractor?
16. Write Boolean function for Full Subtractor?
17. What is Excess-3 code? Why it is called Excess-3 code?
18. What is the application of Excess-3 Code?
19. What is ASCII code?
20. Excess-3 code is Weighted or Unweighted?
21. Out of the possible 16 code combination? How many numbers used in Excess-3
code?
22. What is Demorgan’s Law?
23. Show the truth table for Demorgan’s Theorem?
24. What is Minterm & Maxterm?
25. How Minterm can be converted in Max term?

47
30. What is Hybrid function?
31. What is Flip-Flop?
32. What is Latch circuit?
33. Draw a truth –tables of S-R, J-K, D and T?
34. What is the disadvantages of S-R Flip-Flop?
35. How can you remove the problem of S-R Flip –Flop?
36. Make circuit diagram of S-R, J-K, D and T Flip-Flop?
37. What do you understand by Race Aground condition? How it is over come in J-K Flip
Flop?
38. Explain the principle of Multiplexer?
39. Draw a circuit diagram of 4: 1 Multiplexer?
40. What are the advantages of Multiplexer?
41. What are the disadvantages of Multiplexer?
42. Make the Truth-table of Multiplexer?
43. Explain about Demultiplexer?
44. Draw a circuit diagram of 1: 4 Demultiplexer?
45. Make a logic diagram of 1: 4 Demultiplexer?
46. What is the application of Demultiplexer?
47. What is the difference between Multiplexer and Demultiplexer?

48
NAND Gate (Three Input)

NAND Gate (Four Input)

NAND Gate (Three Input)

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