bq27542-G1 Single Cell Li-Ion Battery Fuel Gauge For Battery Pack Integration
bq27542-G1 Single Cell Li-Ion Battery Fuel Gauge For Battery Pack Integration
bq27542-G1
SLUSC33 – APRIL 2015
bq27542-G1 Single Cell Li-Ion Battery Fuel Gauge for Battery Pack Integration
1 Features 2 Applications
1• Battery Fuel Gauge for 1-Series (1sXp) Li-Ion • Smartphones
Applications up to 14,500-mAh Capacity • Tablets
• Microcontroller Peripheral Provides: • Digital Still and Video Cameras
– Accurate Battery Fuel Gauging Supports up to • Handheld Terminals
14,500 mAh • MP3 or Multimedia Players
– Internal or External Temperature Sensor for
Battery Temperature Reporting 3 Description
– SHA-1/HMAC Authentication The Texas Instruments bq27542-G1 Li-Ion battery
– Lifetime Data Logging fuel gauge is a microcontroller peripheral that
provides fuel gauging for single-cell Li-Ion battery
– 64 Bytes of Non-Volatile Scratch Pad FLASH packs. The device requires little system
• Battery Fuel Gauging Based on Patented microcontroller firmware development for accurate
Impedance Track™ Technology battery fuel gauging. The fuel gauge resides within
– Models Battery Discharge Curve for Accurate the battery pack or on the main board of the system
Time-To-Empty Predictions with an embedded battery (non-removable).
– Automatically Adjusts for Battery Aging, The fuel gauge uses the patented Impedance
Battery Self-Discharge, and Temperature/Rate Track™ algorithm for fuel gauging, and provides
Inefficiencies information such as remaining battery capacity
(mAh), state-of-charge (%), run-time to empty
– Low-Value Sense Resistor (5 mΩ to 20 mΩ) (minimum), battery voltage (mV), and temperature
• Advanced Fuel Gauging Features (°C). It also provides detections for internal short or
– Internal Short Detection tab disconnection events.
– Tab Disconnection Detection The fuel gauge also features integrated support for
• HDQ and I2C Interface Formats for secure battery pack authentication, using theSHA-
Communication with Host System 1/HMAC authentication algorithm.
• Small 12-pin 2.50 mm × 4.00 mm SON Package Device Information (1)
• Complies with Battery Trip Point (BTP) PART NUMBER PACKAGE BODY SIZE (NOM)
Requirements bq27542-G1 SON (12) 2.50 mm x 4.00 mm
4 Simplified Schematic
Battery Pack
PACK+
VCC
BAT
SE SE
HDQ HDQ
TS
SDA SDA
SCL SCL
SRP
PROTECTION SRN
IC VSS
PACK–
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27542-G1
SLUSC33 – APRIL 2015 www.ti.com
Table of Contents
1 Features .................................................................. 1 9 Detailed Description ............................................ 10
2 Applications ........................................................... 1 9.1 Overview ................................................................. 10
3 Description ............................................................. 1 9.2 Functional Block Diagram ....................................... 11
4 Simplified Schematic............................................. 1 9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 14
5 Revision History..................................................... 2
9.5 Programming........................................................... 16
6 Device Comparison Table..................................... 3
9.6 Power Control ......................................................... 17
7 Pin Configurations and Functions ....................... 3
9.7 Autocalibration ........................................................ 18
8 Specifications......................................................... 4 9.8 Communications ..................................................... 18
8.1 Absolute Maximum Ratings ...................................... 4
10 Application and Implementation........................ 22
8.2 ESD Ratings ............................................................ 4
10.1 Application Information.......................................... 22
8.3 Recommended Operating Conditions....................... 4
10.2 Typical Application ................................................ 22
8.4 Thermal Information .................................................. 5
10.3 Application Curves ............................................... 27
8.5 Electrical Characteristics: Power-On Reset .............. 5
11 Power Supply Recommendations ..................... 28
8.6 2.5-V LDO Regulator ............................................... 5
8.7 Internal Temperature Sensor Characteristics ........... 5 12 Layout................................................................... 28
12.1 Layout Guidelines ................................................ 28
8.8 Internal Clock Oscillators .......................................... 5
12.2 Layout Example .................................................... 29
8.9 Integrating ADC (Coulomb Counter) Characteristics 6
8.10 ADC (Temperature and Cell Voltage) 13 Device and Documentation Support ................. 30
Characteristics ........................................................... 6 13.1 Documentation Support ........................................ 30
8.11 Data Flash Memory Characteristics........................ 6 13.2 Community Resources.......................................... 30
8.12 Timing Requirements .............................................. 6 13.3 Trademarks ........................................................... 30
8.13 Timing Requirements: HDQ Communication ......... 7 13.4 Electrostatic Discharge Caution ............................ 30
8.14 Timing Requirements: I2C-Compatible Interface .... 8 13.5 Glossary ................................................................ 30
8.15 Typical Characteristics ............................................ 9 14 Mechanical, Packaging, and Orderable
Information ........................................................... 30
5 Revision History
DATE REVISION NOTES
April 2015 * Initial Release
SE 1 12 HDQ
REG25 2 11 SCL
REGIN 3 10 SDA
BAT 4 9 TS
VCC 5 8 SRN
VSS 6 7 SRP
Pin Functions
PIN
TYPE (1) DESCRIPTION
NAME NUMBER
BAT 4 I Cell-voltage measurement input. ADC input. Decouple with 0.1-μF capacitor.
HDQ serial communications line (Slave). Open-drain. Use with 10-kΩ pullup resistor (typical) or leave
HDQ 12 I/O
floating when it is not used.
REG25 2 P 2.5-V output voltage of the internal integrated LDO. Connect a minimum 0.47-μF ceramic capacitor.
REGIN 3 P The input voltage for the internal integrated LDO. Connect a 0.1-μF ceramic capacitor.
Slave I2C serial communications clock input line for communication with the system (slave). Open-drain
SCL 11 I
I/O. Use with a 10-kΩ pullup resistor (typical).
Slave I2C serial communications data line for communication with the system (slave). Open-drain I/O.
SDA 10 I/O
Use with a 10-kΩ pullup resistor (typical).
SE 1 O Shutdown Enable output. Push-pull output. Leave floating when it is not used.
Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRN is
SRN 8 IA
nearest the PACK– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRP is
SRP 7 IA
nearest the CELL– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
TS 9 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input
VCC 5 P Processor power input. The minimum 0.47-μF capacitor connected to REG25 should be close to VCC.
VSS 6 P Device ground
8 Specifications
8.1 Absolute Maximum Ratings
Over-operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VI Regulator input, REGIN –0.3 24 V
VCC Supply voltage range –0.3 2.75 V
VIOD Open-drain I/O pins (SDA, SCL, HDQ) –0.3 6 V
VBAT BAT input (pin 4) –0.3 6 V
VI Input voltage range to all others (pins 1, 7, 8, 9) –0.3 VCC + 0.3 V
TF Functional temperature range –40 100 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1) LDO output current, IOUT, is the total load current. LDO regulator should be used to power internal fuel gauge only.
(2) Specified by design. Not production tested.
1.2V
t(B) t(BR) t(RISE)
(a) Break and Break Recovery (b) HDQ line rise time
t(HW1) t(DW1)
t(HW0) t(DW0)
t(CYCH) t(CYCD)
1-bit
Break 7-bit address 8-bit data
R/W
t(RSPS)
(e) Gauge to Host Response
SCL
SDA
td(STA) tf tsu(STOP)
tr
th(DAT) tsu(DAT)
2.58 32.8
2.56 32.75
2.54 32.7
R E G 2 5 O u tp u t (V )
L F O (kH Z )
2.52 32.65
2.5 32.6
2.48 32.55
2.46 32.5
I OUT = 16 mA, REGIN = 5 V
I OUT = 3 mA, REGIN = 2.7 V
2.44 32.45
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (qC) Temperature (qC)
D001 D002
Figure 3. REG25 vs. Temperature Figure 4. Low Frequency Oscillator vs. Temperature
8.4
8.395
8.39
H F O (M H Z )
8.385
8.38
8.375
8.37
8.365
-40 -20 0 20 40 60 80 100
Temperature (qC)
D003
9 Detailed Description
9.1 Overview
The bq27542-G1 fuel gauge accurately predicts the battery capacity and other operational characteristics of a
single Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information, such
as state-of-charge (SOC), time-to-empty (TTE), and time-to-full (TTF).
To minimize power consumption, the fuel gauge has different power modes: NORMAL, SLEEP, FULLSLEEP,
and HIBERNATE. The fuel gauge passes automatically between these modes, depending upon the occurrence
of specific events, though a system processor can initiate some of these modes directly. More details can be
found in Device Functional Modes.
NOTE
REGIN LDO
POR
REG25
VCC
HFO
BAT SRN
CC
HFO LFO
HFO/128
4R
HFO/128
SRP
MUX
ADC
R
Wake
Comparator
TS
Internal
VCC Temp
Sensor
5k
HFO/4
SE SDA
22
Instruction I2C Slave
ROM Engine
22
CPU
VSS SCL
I/O Instruction
Controller FLASH
HDQ Slave
Engine HDQ
8 8
Wake
GP Timer
and Data Data
and
Watchdog SRAM FLASH
PWM
Timer
(1) [SE_EN] bit in Pack Configuration can be enabled to use [SE] and [SHUTDWN] bits in
CONTROL_STATUS() function. The SE pin shutdown function is disabled.
(2) HDQ pin is used for communication and HDQ Host Interrupt Feature is available.
9.3.3.1 SHUTDOWN Mode
In SHUTDOWN mode, the SE pin is used to signal external circuit to power-off the fuel gauge. This feature is
useful to shut down the fuel gauge in a deeply discharged battery to protect the battery. By default, SHUTDOWN
mode is in NORMAL state. By sending the SET_SHUTDOWN subcommand or setting the [SE_EN] bit in the
Pack Configuration register, the [SHUTDWN] bit is set and enables the shutdown feature. When this feature is
enabled and [INTSEL] is set, the SE pin can be in NORMAL state or SHUTDOWN state. The SHUTDOWN state
can be entered in HIBERNATE mode (only if HIBERNATE mode is enabled due to low cell voltage). All other
power modes will default the SE pin to NORMAL state. Table 2 shows the SE pin state in NORMAL or
SHUTDOWN mode. The CLEAR_SHUTDOWN subcommand or clearing [SE_EN] bit in the Pack Configuration
register can be used to disable SHUTDOWN mode.
The SE pin will be high impedance at power-on reset (POR); the [SE_POL] does not affect the state of SE pin at
POR. Also, [SE_PU] configuration changes will only take effect after POR. In addition, the [INTSEL] only controls
the behavior of the SE pin; it does not affect the function of [SE] and [SHUTDWN] bits.
12 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
POR
Entry to SLEEP
Pack Configuration [SLEEP] = 1
AND SLEEP
| AverageCurrent( ) |≤ Sleep Current
Fuel gauging and data
HIBERNATE
Wakeup From HIBERNATE updated every 20 seconds
Communication Activity
AND
Disable all bq27541 Comm address is NOT for bq27541
subcircuits except GPIO. Entry to WAITFULLSLEEP
Entry to FULLSLEEP If Full Sleep Wait Time > 0, Exit From WAITFULLSLEEP
Guage ignores Control Status Any Communication Cmd
If Full Sleep Wait Time = 0, [FULLSLEEP]
Host must set Control Status
[FULLSLEEP]=1
Exit From WAIT_HIBERNATE
Cell not relaxed
WAITFULLSLEEP
OR
| AverageCurrent() | =>Hibernate Current
FULLSLEEP Count Down
OR FULLSLEEP
Exit From SLEEP
Host has set Control Status
Cell relaxed
[HIBERNATE] = 1
Fuel gauging and data AND In low power state of SLEEP
| AverageCurrent() | < Hibernate Current
updated every 20 seconds mode. Gas gauging and data
updated every 20 seconds
9.5 Programming
9.5.1 Standard Data Commands
The fuel gauge uses a series of 2-byte standard commands to enable system reading and writing of battery
information. Each standard command has an associated command-code pair, as indicated in Table 6. Each
protocol has specific means to access the data at each Command Code. DataRAM is updated and read by the
gauge only once per second. Standard commands are accessible in NORMAL operation mode.
Programming (continued)
Table 6. Standard Commands (continued)
COMMAND NAME COMMAND CODE UNIT SEALED ACCESS
PassedCharge() 0x34 and 0x35 mAh R
DOD0() 0x36 and 0x37 hex R
SelfDischargeCurrent() 0x34 and 0x35 mA R
(1) The actual resistance value vs. the setting of the sense resistor is not important just the actual voltage
threshold when calculating the configuration. The voltage thresholds are typical values under room
temperature.
9.7 Autocalibration
The fuel gauge provides an autocalibration feature that will measure the voltage offset error across SRP and
SRN from time-to-time as operating conditions change. It subtracts the resulting offset error from normal sense
resistor voltage, VSR, for maximum measurement accuracy.
Autocalibration of the ADC begins on entry to SLEEP mode, except if Temperature() is ≤ 5°C or Temperature() ≥
45°C.
The fuel gauge also performs a single offset calibration when: (1) the condition of AverageCurrent() ≤ 100 mA
and (2) {voltage change since last offset calibration ≥ 256 mV} or {temperature change since last offset
calibration is greater than 8°C for ≥ 60 seconds}.
Capacity and current measurements will continue at the last measured rate during the offset calibration when
these measurements cannot be performed. If the battery voltage drops more than 32 mV during the offset
calibration, the load current has likely increased considerably; hence, the offset calibration will be aborted.
9.8 Communications
9.8.1 HDQ Single-Pin Serial Interface
The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to
the fuel gauge. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted
first. Note that the DATA signal on pin 12 is open-drain and requires an external pullup resistor. The 8-bit
command code consists of two fields: the 7-bit HDQ command code (bits 0:6) and the 1-bit RW field (MSB bit 7).
The RW field directs the fuel gauge either to:
• Store the next 8 or 16 bits of data to a specified register, or
• Output 8 bits of data from the specified register
The HDQ peripheral can transmit and receive data as either an HDQ master or slave.
Communications (continued)
HDQ serial communication is normally initiated by the host processor sending a break command to the fuel
gauge. A break is detected when the DATA pin is driven to a logic-low state for a time t(B) or greater. The DATA
pin should then be returned to its normal ready high logic state for a time t(BR). The fuel gauge is now ready to
receive information from the host processor.
The fuel gauge is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral. The SLUA408
application report provides details of HDQ communication basics.
9.8.2.2 Temperature
This feature will trigger an interrupt based on the OTC (Over-Temperature in Charge) or OTD (Over-Temperature
in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and will trigger interrupts
as long as either the OTD or OTC condition is met and HDQIntEN = 1.
Communications (continued)
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. The quick writes function in the same manner and are a convenient means of sending multiple bytes
to consecutive command locations (such as two-byte commands that require two bytes of data).
Attempt to write a read-only address (NACK after data sent by master):
S ADDR[6:0] 0 A CMD[7:0] N P
The I2C engine releases both SDA and SCL if the I2C bus is held low for t(BUSERR). If the fuel gauge was holding
the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines
low, the I2C engine enters the low-power sleep mode.
Communications (continued)
9.8.3.3 I2C Clock Stretching
I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a
short clock stretch will occur on all I2C traffic as the device must wake-up to process the packet. In NORMAL and
SLEEP+ modes, clock stretching will only occur for packets addressed for the fuel gauge. The timing of stretches
will vary as interactions between the communicating host and the gauge are asynchronous. The I2C clock
stretches may occur after start bits, the ACK/NAK bit and first data bit transmit on a host read cycle. The majority
of clock stretch periods are small (≤ 4 ms) as the I2C interface peripheral and CPU firmware perform normal data
flow control. However, less frequent but more significant clock stretch periods may occur when data flash (DF) is
being written by the CPU to update the resistance (Ra) tables and other DF parameters such as Qmax. Due to
the organization of DF, updates need to be written in data blocks consisting of multiple data bytes.
An Ra table update requires erasing a single page of DF, programming the updated Ra table and a flag. The
potential I2C clock stretching time is 24 ms maximum. This includes 20-ms page erase and 2-ms row
programming time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance
grid points that occur during the discharge cycle.
A DF block write typically requires a maximum of 72 ms. This includes copying data to a temporary buffer and
updating DF. This temporary buffer mechanism is used to protect from power failure during a DF update. The
first part of the update requires 20 ms to erase the copy buffer page, 6 ms to write the data into the copy buffer
and the program progress indicator (2 ms for each individual write). The second part of the update is writing to
the DF and requires 44 ms for DF block update. This includes a 20-ms each page erase for two pages and 2-ms
each row write for two rows.
In the event that a previous DF write was interrupted by a power failure or reset during the DF write, an
additional 44-ms maximum DF restore time is required to recover the data from a previously interrupted DF write.
In this power failure recovery case, the total I2C clock stretching is 116 ms maximum.
Another case where I2C clock stretches is at the end of discharge. The update to the last discharge data will go
through the DF block update twice because two pages are used for the data storage. The clock stretching in this
case is 144 ms maximum. This occurs if there has been a Ra table update during the discharge.
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
J10
R20
4.7k
MM3511
3 6
5 2
4 1
R7, R8, and R9 are optional pulldown resistors if pullup resistors are applied.
2.58 32.8
2.56 32.75
2.54 32.7
R E G 2 5 O u tp u t (V )
L F O (kH Z )
2.52 32.65
2.5 32.6
2.48 32.55
2.46 32.5
I OUT = 16 mA, REGIN = 5 V
I OUT = 3 mA, REGIN = 2.7 V
2.44 32.45
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (qC) Temperature (qC)
D001 D002
Figure 9. REG25 vs. Temperature Figure 10. Low Frequency Oscillator vs. Temperature
8.4
8.395
8.39
H F O (M H Z )
8.385
8.38
8.375
8.37
8.365
-40 -20 0 20 40 60 80 100
Temperature (qC)
D003
12 Layout
RTHERM
losses
RESD1 RESD2
Place capacitors SE HDQ HDQ
close to gauge
IC. Trace to pin
Kelvin connect and VSS should RESD3 RESD4
BAT sense line be short REG25 SCL SCL
right at positive
battery terminal RESD5 RESD4
REGIN SDA SDA
PACKN
BAT TS
CREGIN
CBAT
Li-Ion CVCC
VCC SRN Use short and wide
Cell traces to minimize
inductance
VSS SRP
Protection
Star ground right at PACK-
IC
for ESD return path
10m1%
NFET NFET
13.3 Trademarks
Impedance Track, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 12-May-2015
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
BQ27542DRZR-G1 ACTIVE SON DRZ 12 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ
& no Sb/Br) 7542
BQ27542DRZT-G1 ACTIVE SON DRZ 12 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ
& no Sb/Br) 7542
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 2
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