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High speed polyphase CIC decimation filters

Conference Paper · June 1996

DOI: 10.1109/ISCAS.1996.540394 · Source: IEEE Xplore

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 High Speed Polyphase CIC Decimation Filters
Hong-Kui Yangl W. Martin Snelgrove
Dept. of Electronics, Carleton University, Ottawa, ON, Canada KIS 5B6
lAIso with BNR, Ottawa, Canada
Email: hkyang@bnr.ca snelga@doe.carleton .ca

ABSTRACT
Polyphase structures for CIC (cascaded-integrator-comb)
decimation filters are proposed in this paper. With the
new structures, the proposed filters can operate at much
lower sampling rate yet achieve almost the same
performance as Hogenaueis CIC filters. They have
$+lfN..
.n)j!i:jl
Fig. 1 A CIC decimationfilter
advantages in high speed operation and low power
consumption. Issues such as high speed commutator l–z-’
design, polyphase components, finite word length,
truncation, and rounding have been discussed. Some
important applications are also given in this paper.
H(z) = ~

which
(1
is an ~-stage sine function. This kind of
(1)

decimation filter is very efficient in these senses: 1) no

multiplier~ 2) no storage elements; 3) regular structure;
1. INTRODUCTION 4) wide range of rate changq etc. Due to the droop around
In digital radio receivers, the trend is to push DSP as close the cutoff frequency and aliasing within the band of
to the antenna as possible due to the many advantages of interest, the choices of N and R are made to provide
digital technology [1]. This means that we prefer either acceptable passband characteristics over the range from
digitizing IF signals at the highest frequencies practical or zero to the cutoff frequency. Generally speaking, the
even directty digitizing RF signals [2]. With the feasibility higher the fwst downconversion rate, ~~ /R, relative to
of a 3.2 GHz AZ modulator [3], the DSP is pushing the Nyquist rate, fN, the smaller the droop and the higher
towards GHz rate for decimation. However, CMOS tdiasing attenuation. However, this leaves more filtering to
implementation of digital downconversion (or decimation) be done with a less efficient transversal or IIR decimator.
at such a high fkquency could be a problem, Another Hogenauer [5] gave two tables for the design trade-off,
challenge in wireless communications, especially in For nth-order Iowpass (or 2nth-order bandpass) AZ
cellular handset devices, is low power consumption. To modulators, the compromise is to take the first
reduce the power, we can lower either the voltage supply downconversion rate to be four times the Nyquist rate [6].
or clock rate [4]. Lowering the voltage supply, however, In doing so, one has to compensate only small droop later
will increase circuit delays and therefore put a bound on in the low frequency stage.
operation frequency. One solution to the above two The applications of CIC decimation filters seem to be in
problems is to use parallel processing. areas where high sampling rates make multipliers an
Polyphase decomposition has been traditionally used to uneconomical choice, such as in AX modulation data
implement parallel structures in DSP. In this paper, two conversion. A key application could be digital IF/RF
versions of polyphase decimation filters intended for high signal processing (both down and up conversion) for
speed data stream are proposed. The polyphase decimators wireless communications (both handset and basestation).
were derived from Hogenauer’s structure [5] which has
been proven to be very efficient. 3. POLYPHASE CIC DECIMATION FILTERS
A decimation filter at hundreds of MHz or even GHz rates
2. CIC DECIMATION FILTERS is a must in the aforementioned examples. Parrdlel
Hogenauer’s CIC decimation filter [5], shown in Fig. 1, processing is a wise way to accommodate high speed and
consists of N cascaded digital integrators operating at a lower power consumption [4]. It also allows FPGAs to
high input sampling rate, f$, and N cascaded implement high speed decimation. In this section,
differentiators at a low rate, f~/R, where R is the polyphase decomposition will be used to implement
integer downconversion factor, Its transfer function is parallel processing for decimation.

Copyright (C) 1996 IEEE. All Rights Reserved.

 TABLE 1.Polyphase components

N1 I 2 I 3
RI 2 4 8 2 4 8

‘-%-d-l Fn(z)
Fl(z)
(1,1)
(2,0)
(1,3)
(2,2)
(1,7)
(2,6)
(1,3)
(3,1)
(1,12,3)
(3,12,1)
(1,42,21)
(3,46,15)
Fig. 2 Polyphasestructureof the CIC decimationfilter F,(z) (3,1) (3,5) (6,10,0) (6,48,10)
F3(z) (4,0) (4,4) (10,6,0) (10,48,6)
140 I F4(z) (5,3) (15,46,3)
130- .-’ -
120- --’ -----”-- -’-’-J-’-J-
F~(z) (6,2) (21,42,1)
,, 00,4
!gllo- - F6(Z) (7,1) (28,36,0)
~ 100 - ,--1- F, (Z) (8,0) (36,28,0)

where Fi (z ) are polyphase components, operating at the

-\ ,
n,=% ,- -, -,--,-
‘: V-’; ,- ,- -i-,-1-
rate of f~/RI.Thus the polyphase structure for CIC
5ov/-r-l -*-o~’:~ -l-l--l- 1-1-1--1-1-1- 1

40 ~ decimation filters can be built as shown in Fig. 2. H,(z)

8 24 104 120 is simply a CIC decimation filter. To see how complex
I%rme%iate &R, @8~R
HI(z) is, we have to derive each pdyphase component in
Fig. 3 Aliasing attenuation versus IOSR (4) from (3a) for certain N, and RI. Table 1 lists the most
frequently used polyphase components. Note that the
notation (a. ,al,... ) represents a polyphase component
RF2””
o- - -- -,. RF4 -B- . --, ---+--- b--- (a. + alz-l+... ). It can be seen that the polyphase
~ -0.05 -.-!- --J- --c- -- components can be realized with the help of a small
~ number of adders and shifters only.
The choice of iV1 is important for the pdyphase CIC
n -0.15- filter design. Smaller N1 will result in larger aliasing.
Look at the plot shown in Fig. 3 for the aliasing
1 , I I o
attenuation versus intermediate oversampling ratio,
-0.25 I IOSR=(f~ /R1)/ f~, onecan see that N1 can betakento
8 12 16 20 24 28 32
Intermediate OSR, /OSR
be N1 s 3 for most cases m meet ~ aliasing attenuation
requirement. Also note that the aliasing depends slightly
Fig. 4 Droop at cutoff frequency versus IOSR
on RI. The larger the RI, the smaller the aliasing. This
figure can be used as a guideline to choose the appropriate
Instead of using one CIC filter to decimate the high
value for N1 and RI.
speed digital signal, here we use two (one N@age and
one I%tage). The downconversion factors for them are Fig. 4 shows the droop at the cutoff frequency. Because
Z/l and R2, respectively. Here we assume that R can be the IOSR is large in a practical system, the drcmp is very
small and can be compensated easily together with the
factored as RI oR2. Thus the transfer function is
droop introduced by the following CIC filter, For

‘(Z)=(-JI-J’=H1(Z)HJZR1’
Therefore
‘2)
example, suppose a system needs over 70 dB aliasing
attenuation. We can choose N1 = 2 for IOSR >50 and
N1 = 3 for IOSR 216. The droop due to the polyphase
HI(Z)= (1+ z-l+...+@l@l))NIN1 (3a) decomposition is close to O dB and -0.05 dB, respectively.
~_z-R2 2
It is noted from Table 1 that the polyphase components
H,(z)=
(J p

Performing polyphase decomposition [7] in (3a), we have

(3b) are simple for the cases of N1 <3.

4. DESIGN ISSUES
In the design of a polyphase CIC filter, apart from the
R1-1
choices of N1, N,, RI and R2 (see previous sections and
H,(z)= ~z-k’,(zy (4)
j=o [5]), there are some other issues to be clarified.

Copyright (C) 1996 IEEE. All Rights Reserved.

 An important issue in designing a polyphase filter is to Suppose that the output word length required is
align the polyphase signals of a data converter. This can Bat +1< Bm2+ 1. Since the polyphase CIC consists of two
be accomplished by a commutator which can be cascaded CIC decimation filters, one can retain only BOW
constructed with D flip-flops controlled by different bits in the output of the fiist CIC filter without losing
clocks. This part is critical in terms of speed. Fast D flip- accuracy. The number of lower bits discarded at the output
flops can be implemented with dynamic circuits. of the fwst CIC filter is
How to implement the polyphase components is another BA –BOW+ 1, Bd > B.u
important issue. It is advantageous to get rid of multipliers (lo)
{ (), B&< Boti
in implementing these components since they still work at
a high speed which is equal to $~ /RI. For AX After truncation or rounding, the woni length of the input
modulators, we can have simpler implementation of data to the second CIC filter, Bk2, becomes
polyphase components. Since there are finite Bi.z = A41N(Bti ,BOU). For the truncation and rounding of
combinations for the polyphase components’ output, a the second CIC filter, see [5].
look-up table ROM can be used to store all the possible
results which will be addressed by bandpass AZ 5. SOME IMPORTANT APPLICATIONS
modulator’s outputs. An even more efficient way to The polyphase CIC decimation filters proposed above
implement polyphase components may be to replace the have many applications. These include digital quadrature
ROM by combinational logic circuits. Since the output of demodulation, decimation for double sampling and time-
a single-bit bandpass AX is either “1” representing +1 or interleaved AZ modulators.
“O”representing -1, we can have simple logic circuits to
realize polyphase components. 5.1. Digital Quadrature Demodulation
The ultimate goal in radio receiver design is to directly
4.1. Word Length in Polyphase CIC Filters digitize the RF signal after the antenna and to digitally
Here we consider two’s complement number realize the whole radio system [1]. Fig. 5 illustrates the
representation, such as aOAal... a~, where the word length digital quadrature demodulation. The input signal is an
is (B+ 1). If the word length in the input data stream is IF/RI? signal and the sampling rate, f~, isset tobefo~
(l?i~l+ 1), the word length at the first CIC filter’s output, times the IF center frequency. In doing so, the sine and
(Bd + 1), is [5] cosine signals used to demodulate the IF signal become
Bd =[N1 logz RI 1+Biml (6) simple sequences of (1, O, -1, 0, ...) and (O, 1, 0, -1, ...).
respectively [9]. The data converter could be either a
where rxl is the smallest integer not less than X. Since
conventional A/D converter or a bandpass AZ modulator.
the output of the fust polyphase CIC filter is the input of
The very economical CIC decimation filters can be used to
the second one’s output, the input data words to the second
downconvert the sampling rate for I/Q channels. A good
CIC filter are (BA + 1) bits long. As a result, the word
solution for a bandpass AZ modulator is that the CIC
length at the second CIC filter’s output, (Bm2+ 1), is filters downconvert I/Q signals to four times Nyquist rate.
Bm2=[N1 log2 R2 1+Bd (7) Low frequency decimators are used to further
Since R,. = RI RI, the above expression becomes downconvert the sampling rate and general purpose DSP
processors follow to process the baseband digital signals.
Bm2=[N2 log2 RI+ Binl- (N2 logz RI 1-[N, log,Rd
The operating frequency in the digital demodulation is
(8) f,which is the data converter’s sampling rate, and can
Mainly due to the two-stage structure, the final word substantially be reduced by using the aforementioned
length for a polyphase CIC filter is shorter than that of
polyphase CIC. The frequency reduction for a digital
Hogenauer’s by (NZ log ~RI l-[N1 log2R1] bits. If, for quadrature receiver is shown in Fig. 6, where the
instance, N1 = 2, Nz = 4 and RI =4, we can save as downconversion factors of 2 and 4 are achieved in Fig.
many as 4 bits in the register word length. It has been 6(a) and (b); respectively.
proven in [5] that Bm2 is both the upper and lower bound Another advantage of the polyphase CIC filter is that it
overcomes the timing misalignment in digital qudrature
for each filter stage of the second CIC filter.
demodulation. The timing misalignment occurs when a
frequency decimation by two is performed in each of the I
4.2. Truncation and Rounding
and Q channels by the removal of the zero-valued samples
The register word length in the output of the M phase [8]. The timing misalignment introduces undesired tones
signal, where i = ~2,...,(R1 – 1), in Fig. 2 is in the output’s spectrum.
Bi = Fi(l) +Biml (9)

Copyright (C) 1996 IEEE. All Rights Reserved.

 The time-interleaved AZ modulators were presented in
1,0, -1,0 [11] and were intended for very high frequency
applications. The idea is to interconnect several
moduktors (say RI) in a speeific way to increase the
effective oversampling ratio by a factor of RI. The outputs
of the RI modulators are interleaved to form the final
0,1,0, -1
output. Again, the polyphase CIC decimation filter is
useful for its decimation, shown in Fig. 7(b), where the
Fig. 5 Quadrature demodulation by digitizing artIP signal interleaving of the outputs is not needed for decimation.
The advantages of doing this are to reduce the operating
1,-1
frequency in decimation and eliminate the hardware for
interleaving.
.

6. CONCLUSION
(a) 1,’-1 In this paper, polyphase CIC decimation filters which
need no multiplier have been proposed. The polyphase
structures have advantages in high speed operation such
--@h as digital RF/IF signal processing and low power
consumption. The important applications discussed here
include digital quadrature demodulation, decimation for
double sampling and time-interleaved AZ modulation.
—
ACKNOWLEDGMENTS
Fig. 6 Polyphaae structures in digital quadrature demodulation
fo;the cases-of(a) two phases and-(b) four phases
This work was funded by an NSERC Chair and by the
Micronet program in Canada.

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