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Xilinx SDK

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133 views11 pages

Xilinx SDK

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skarthikpriya
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© © All Rights Reserved
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The Xilinx Software Development Kit (XSDK) is the Integrated Design Environment for
creating embedded applications on any of Xilinx's award winning microprocessors: Zynq®
UltraScale+ MPSoC, Zynq-7000 All Programmable SoCs, and the industry-
leading MicroBlaze™ soft-core microprocessor. The SDK is the first application IDE to
deliver true homogenous and heterogeneous multi-processor design, debug, and performance
analysis.  Benefits include:

 Zynq UltraScale+ MPSoC, Zynq-7000 AP SoCs, and MicroBlaze support

 Included with the Vivado Design Suite or available as a separate free download for
embedded software developers

 Based on Eclipse 4.5.0 and CDT 8.8.0 (as of the 2016.3 release)

 Complete Integrated Design Environment (IDE) that directly interfaces to the Vivado
embedded hardware design environment

 Complete software design and debug flows supported, including multi-processor and
hardware/software co-debug capabilities

 Editor, compilers, build tools, flash memory management, and JTAG debug
integration

 Full suite of libraries and device drivers

 FreeRTOS integrated as RTOS available for all platforms

 Xilinx Software Command Line Tool (XSCT) available for scripting


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System Debugger

The Xilinx System Debugger is an integrated debugger supporting Zynq UltraScale+


MPSoC, Zynq-7000 AP SoC and MicroBlaze cores.  It is available from both the command
line using the XSCT and from within the SDK GUI in the debug perspective. It supports all
the common debug features such as setting breakpoints or watchpoints, stepping through
program execution, viewing the program variables and stack, and viewing the contents of the
memory in the system. It can also simultaneously debug programs running on different
processors (in a multi-processor system), all from within the same debug environment. For
example, in a Zynq or Zynq UltraScale+ based design, System Debugger could display both
ARM CPUs and multiple MicroBlaze soft-processors in the same debug session, through a
single JTAG cable; for an unprecedented level of insight between the hardened processing
system, and any additional processing elements that you've added to the programmable logic.
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 Based on the Open-Source Target Communication Framework (TCF)

 Homogenous and heterogeneous multi-processor support

 Hierarchical Profiling

 Bare-metal and Linux development, Including Linux OS-Aware debug

 Supporting both SMP and AMP designs

 Associate hardware and software breakpoints per core

 NEON™ library support

In addition to all the features of a full-featured standard software debugger,  the System
Debugger supports cross-triggering between processors in the PS and processors and
hardware in the PL. Through an intuitive GUI, the software programmer can setup conditions
for issuing triggers to external processors or hardware on the PL, or receiving triggers from
these elements.  Data is captured and can be displayed in the various tools to aid in the
debugging process.

Custom Design Aware

Xilinx SDK understands the custom embedded hardware design that has been defined in the
Vivado Design Suite. Based on this design, several key parameters are auto-configured,
including memory maps, peripheral register settings, tools and library paths, compiler
options, JTAG and flash memory settings, debugger connections, and Linux and bare-metal
Board Support Packages (BSPs). This custom design-aware pre-configuration, combined
with the auto-generation of critical system software, ensures that software development can
progress rapidly with a minimal learning curve.

Drivers and Libraries

XSDK includes user-customizable drivers for all supported Xilinx hardware IPs, POSIX
compliant kernel library and networking and file handling libraries. These libraries and
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drivers can scale for the custom-design based on feature needs, memory requirements and
hardware capabilities.

Software Profiling

XSDK includes profiling tools that help to identify bottle necks in your code occurring due to
the interaction of functions that are executed within the programmable logic, and on the
processor. Supports hierarchical profiling - allowing the user to view which called functions,
or which calling functions are affecting processor performance the most.

System Performance Analysis and Optimization

Creating high-performing SoC based systems takes time and requires insight into the
interactions between the software and the peripherals. Tools that allow you to gather
performance data and visualize your system are critical to achieving performance targets. The
Xilinx System Performance Analysis toolbox (available in the XSDK) allows you to model,
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measure, analyze and optimize your system. In the new performance perspective you can
visualize.

 Processor utilization

 Instructions per cycle

 Cache miss/hit rates

 Read and Write latency and bandwidth of PL to PS interfaces


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The System Performance Analysis toolbox allows you to interact with your system and tune
it to reach your desired performance goals.

With these tools, you can rapidly identify bottlenecks and create “what if” scenarios
regarding how to partition your system between hardware and software. Using the AXI
Traffic Generators you can model the performance from the IP blocks that will be in the
programmable logic before they are completed. Once analyzed, the performance can be
improved by optimizing the software source code, by splitting the function between processor
and programmable logic, or by migrating the whole function to programmable logic.
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SDSOC

he SDx™ environment is an Eclipse-based integrated development environment (IDE) for


implementing heterogeneous embedded systems using Zynq®-7000 All Programmable SoCs
and Zynq UltraScale+™ MPSoCs. The SDx IDE supports both the SDSoC (Software-
Defined System On Chip) and SDAccel design flows on Linux and only SDSoC flows on
Windows. The SDSoC system compiler generates an application-specific system-on-chip by
compiling application code written in C or C++ into hardware and software that extends a
target platform. The SDx IDE includes platforms for application development; other
platforms are provided by Xilinx partners. An SDSoC platform defines a base hardware and
software architecture and application context, including processing system, external memory
interfaces, custom input/output, and software run time - including operating system (possibly
"bare metal"), boot loaders, drivers for platform peripherals and root file system. Every
project you create within the SDx environment IDE targets a specific hardware platform, and
you employ the tools within the SDx environment IDE to customize the platform with
application-specific hardware accelerators and data motion networks. In this way, you can
easily create highly tailored application-specific systems-on-chip for different base platforms,
and can reuse base platforms for many different applicationspecific systems-on-chip.

An SDSoC platform consists of a Vivado® Design Suite hardware project, a target operating
system, boot files, and optionally, software libraries that can be linked with user applications
that target the platform. An SDSoC platform also includes XML metadata files that describe
the hardware and software interfaces used by the SDSoC compilers to target the platform. A
platform provider designs the platform hardware using the Vivado Design Suite and IP
Integrator. After the hardware has been built and verified, the platform provider executes Tcl
commands within the Vivado tools to specify SDSoC platform hardware interfaces and
generate the SDSoC platform hardware metadata file. The platform creator must also provide
boot loaders and target operating system required to boot the platform. A platform can
optionally include software libraries to be linked into applications targeting the platform
using the SDSoC compilers. If a platform supports a target Linux operating system, you can
build the kernel and U-boot bootloader at the command line or using the PetaLinux tool suite.
You can use the PetaLinux tools, SDx IDE or the Xilinx SDK to build platform libraries.
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An SDSoC platform consists of the following elements: • Metadata files ◦ Platform top-level
description file (.xpfm) written by hand. ◦ Platform hardware description file (.hpfm)
generated using Vivado tools ◦ Platform software description file (.spfm) written by hand •
Vivado Design Suite project ◦ Sources ◦ Constraints ◦ IP blocks • Software files ◦ Library
header files (optional) ◦ Static libraries (optional) ◦ Common boot objects (first stage boot
loader, for Zynq UltraScale+ MPSoC ARM trusted firmware and power management unit
firmware) ◦ Linux related objects (u-boot and Linux device tree, kernel and ramdisk as
discrete objects or an image.ub unified boot image)

Pre-built hardware files (optional) ◦ Bitstream ◦ Exported hardware files for SDK ◦ Pre-
generated port information software files ◦ Pre-generated hardware and software interface
files • Platform sample applications (optional)
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