Experiment

2 Bipolar Junction Transistors (BJTs):

Bipolar Transistors are the preferred devices in many analog circuit applications, such
as amplifiers, mixers, and switches. This is especially true in very-high-frequency
applications, such as radio-frequency (RF) circuits for wireless systems.
This experiment will review some characteristics of BJTs.

1. Objectives:

1) Study some characteristics of BJT transistors.

2) Deal with both DC and ac signals in circuit.
3) Design and Study of a Single Transistor Amplifier.

2. Components and Instruments

Software Components
• Multisim • 2N2222 NPN BJT: 1
• Resistors (all ¼ watt)
o 91, 1.5K, 8.2K, 10K,
33K, 180K: 1(of each)
• Variable Resistor (25 KΩ): 1
• Capacitors
o 1 µF, 25V: 2
o 220 µF, 25V: 1

3. Information
BJT consists of three semiconductor regions, i.e. Collector, Base, and Emitter. There are
two different types of BJT:
 N type Emitter region, P type Base region, and N type Collector region. Such a
type is called an NPN transistor.

 P type Emitter region, N type Base region, and P type Collector region. This type
is called a PNP transistor.

E N P N C E P N P C

B B
Figure 2-1: Simplified Representation of NPN and PNP Junctions
A terminal is connected to each of three semiconductor regions of the transistor, with
the terminals labelled “E” for emitter, “B” for base, and “C” for collector. The Base region
always lies between the Emitter and Collector regions. As shown in Figure 2-1, a BJT
transistor consists of two PN or NP junction diodes, i.e. the Emitter-Base junction and
the Collector-Base junction diodes.
The BJT has different modes of operation depending on the bias condition of each
junction. These modes are summarized in Table 2-1.

Table 2-1: Operation Modes for BJTs

Mode of
BE Junction Bias BC Junction Bias
Operation
Active Forward Reverse
Saturation Forward Forward
Cut-Off Reverse Reverse

In active mode, which is also called forward active, the transistor operates as an
amplifier. Switching applications utilize both cut-off and saturation modes.

3.1 Graphical representation of transistor characteristics:

It is useful to describe the transistor I-V characteristics graphically. The iC-vBE

characteristic is in the exponential form of
v BE
VT
i C =I S e (2.1)

Which is identical to the diode i -v relationship. The iE-vBE and iB-vBE characteristics are also
exponential but with different scale currents, i.e. IS/α for iE , and IS/β for iB,

iC   iB   iE (2.2)

The other I-V characteristics of a transistor, which are of more interest, are the
IC – VCE curves as shown in Fig. 2-2, below:

Figure 2-2: IC-VCE Family Curves for a BJT

3.2 The BJT as an amplifier:

For amplifier application, which is a very popular one, the BJT is operated in the active
mode. In this mode the BJT acts as a voltage-controlled current source, i.e. a change in
the base-emitter voltage vBE gives rise to the collector current, iC.
The transistor is biased to operate at a DC base-emitter voltage, VBE, and a
corresponding DC collector current, IC. This current is called quiescent current or DC
collector operating point, ICQ. The ac signal, vbe, is then superimposed and amplified in
terms of collector current. Voltage amplification can be simply obtained by passing the
collector current through a resistance RC.
Note that, according to equation (2.1), the iC-vBE is a nonlinear (exponential) equation.
However, we exploit BJTs in conditions (small signal regime) where we can achieve a
relatively linear amplification in the face of nonlinear behavior of the transistor.

3.2.1 BJT circuits at DC:

Consider a BJT amplifier as shown in Figure 2-1 where only the DC bias voltages are
applied and the transistor is in active mode. Assumption of active mode operation is true
if VCB of an NPN transistor is greater than 0 V or VBC of a PNP transistor is lower than 0V.
In other words, in active mode:
NPN BJT: VBE = 0.7V, VCB > 0 V
PNP BJT: VEB = 0.7V, VBC > 0 V (2.3)
Vcc

RC

RB1

VC
VB Q1

VE
RB2
RE

Figure 2-3: A BJT Amplifier using Self-Bias Architecture

Now let’s analyze the above circuit and determine all the node voltages and branch
currents.
The first step is to simplify the base circuit by replacing RB1 and RB2 using Thevenin’s
theorem.
The result is:
RB2
V BB =V CC
( RB 1 + R B 2 ) (2.4)

R B1 ×R B 2
RBB =( R B 1||RB 2 )=
R B 1+ R B 2 (2.5)

To evaluate the base and the emitter current, let’s write the corresponding loop
equation:
 V BB =I B R BB +V BE +I E R E (2.6)

Substituting for IB by:

IE
I B=
β+1 (2.7)

Results in:
V BB −V BE
I E=
R BB
R E+ [ ]
β+1 (2.8)

The base voltage is then given by:

V B =V BE +I E R E (2.9)

In active mode operation we can evaluate the collector current as:

I C =α⋅I E (2.10)

β
α=
Where β+1 (2.11)

3.2.2 Bias Circuit Design in BJT amplifiers:

The purpose of biasing is that of establishing a constant DC current (ICQ) through the
collector of the BJT. The current must be as insensitive as possible to variations in
temperature and the value of β. Another important consideration in the bias circuit design is to
locate the DC bias point, i.e. (IC ,VCE), to allow maximum output amplitude (swing).
Figure 2-4 is the most commonly used configuration to bias a transistor amplifier.
 Fig. 2-4. Schematic and Simulation Setup for transistor Amplifier

In this configuration, to make IE less sensitive to temperature and β variation, we design

the circuit using the following considerations:
V BB >> V BE (2.12)

R BB
R E >>
β +1 (2.13)

From (2.13), as a rule of thumb, we set:

RBB =0 . 1×( β +1 ) R E (2.14)

There is a limit on how large VBB can be. For a given value of VCC, the higher value for
VBB causes the lower sum voltage across RC and VCB. We want VCB or VCE to be large
enough for maximum output signal amplitude or swing.

3.2.3 Design of a Single Transistor Amplifier:

The first design step is to provide the proper DC bias for the transistor. A good design is
to make the DC operating point insensitive to changes in BJT’s β. For bias stability we set
the voltage drop across RE to 10% of the supply voltage VCC-VEE (VEE=0 for the above
circuit):
V E=0 .1×( V CC −V EE )=0 . 1×V CC
(2.15)

This will handle variations in β and temperature.

To complete the design of the bias network, consider the equation (2.14) to obtain RBB,
and equations below for VBB, RB1, and RB2:
V B=V BE +V E (2.16)

V BB =V B +R BB I B (2.17)

Solving (2.4) and (2.5) for RB1 and RB2 concludes:

V CC
RB 1 =R BB×
V BB (2.18)

V BB
RB 2 =R B 1×
V CC −V BB (2.19)

The amplifier of Fig. 2-4 is a Common-Emitter amplifier with emitter resistance. The
emitter resistance is split in two resistors so that a part of it can be bypassed to achieve
a higher gain.

For a desirable ICQ, and given β and VCC, the design steps for RE, RB1, and RB2 is
summarized as the following:
 
V E=0.1×V CC
VE VE VE
R E= = ≈
IE β +1 I CQ
I CQ ×
 β (2.20)


RBB =0 . 1×( β +1 ) R E


V B=V BE +V E

I CQ
V BB =V B +R BB I B=V E+V BE +R BB⋅
 β (2.21)
V CC
RB 1 =R BB×

V BB
V CC
RB 2 =R BB×

V CC −V BB

The next step, which is our goal, is to design this amplifier for maximum possible swing.
For this purpose the quiescent point must be designed such that

VRC ≈ 0.5 VCC (2.22)

To bias the transistor properly the resistors RC, RE1, and RE2 must be designed such that
the above equations are satisfied. Here we provide a step by step design procedure
which takes into account the output amplitude given an operating current for IC.
Using Eq. 2.15 and Eq. 2.20:

RE= RE1 + RE2= 0.1 Vcc/ ICQ (2.23)

Utilizing equation 2.22:

RC=0.5 VCC/ICQ (2.24)

For the transistor amplifier shown in Fig 2-4 the voltage gain is calculated as the
following:
v out =−i c ( R C||R L )
(2.25)

v in =i b [ r π + ( β +1 )⋅R E 1 ]
and (2.26)

Vo −β⋅i b ( RC ||R L ) −β ( R C||R L ) −( RC ||R L )

AV= = = ≈ 1
V i ib [ r π + ( β+1 ) R E 1 ] r π + ( β +1 ) R E 1 + RE1
thus: gm (2.27)

β⋅V T β VT a 1
rπ = = re= = ≅
where:
I CQ g m and I E gm g m (2.28)

For a desirable amplifier gain (AV), and a given RL, the design steps for RE1 and RE2 Can
be found as follows: RE1 can be found from Eq. 2.27 knowing that RE= RE1 + RE2 .
The value for RE2 is determined using Eq. 2.20.
 4. Lab Tasks:

4.1 BJT Design

o Design a transistor amplifier using the architecture shown in Fig. 2-4. Consider
β=200, VCC=+15V, AV=-50, RL=10K, IC=1mA, and 2N2222 transistor,
VT=25mV. Show the design procedure in your lab report.

o Build up the circuit in Multisim. Use 2N2222 NPN transistor. Use an input Sine
waveform with 10mV amplitude and 1kHz frequency. Plot the output signal.

o Evaluate the peak of the input and output signals. Calculate the amplifier
voltage gain,
AV=Vout/Vin.

o Increase the input amplitude until both the positive and negative peaks of the
output signal clip and stop increasing. Note that for this experiment you should
probe the collector terminal directly as of the output node. Use time domain
analysis setup as shown in Fig. 2-5 and plot the collector terminal signal similar
to Fig. 2-6.

Fig. 2-5.Transient Plot of Input and Output Signal

 Fig.2-6 Plot for Maximum Swing

4.2 Measurement of Maximum Swing

o Search for 2N2222 data sheet online and locate the E, B, and C pins on the BJT.
Include the pin assignment on the lab report.

o Set the voltage on your DC power source to +15 V. Connect the positive and
ground terminals to the VCC and ground nodes of your circuit, respectively.

o Increase the input voltage to a maximum value, until distortion occurs.

o Probe the collector signal on your oscilloscope and measure its maximum and
minimum. What is the maximum output swing, i.e. Vmax-Vmin.

Table III. Measurements of Maximum Output Swing

Parameter Value

Vmax

Vmin

Vswing , max
 4.3 Gain Measurement

o Set the amplitude of the input signal to 50mVpp on your Function Generator.

o Probe the output node (Voltage across R6) in Fig. 2-4, and measure the peak-to-
peak amplitude of the output signal. What is the amplifier gain? Compare the
amplifier’s gain to the design goal.

4.4 Gain vs Frequency

o Sweep the frequency of the input signal according to Table IV and calculate the
corresponding amplifier gain for each case. Express the gain value in dB, ( i.e. 20
log Av).

Table IV.Gain vs Frequency

fin
15 50 150 450 1.5K 4.7K 15K 47K 150K 470K 1.5M 4.7M 10M 15M
(Hz)

AV
(dB)

o Use the obtained data of Table IV to plot the gain vs frequency on a “semilog” plot.

o What is the frequency of maximum gain?

4.5 Measurement of the Input Impedance

o Set your Function Generator to produce a 50 mVpp, 1 KHz, sinusoidal signal and apply
it to the amplifier’s input. Probe the output signal on your oscilloscope and measure its
peak-to-peak amplitude.

o Connect a 25 KΩ variable resistor in series with the input decoupling capacitor, C3.
Tune the variable resistor until you get half the peak-to-peak output voltage of what
you read in previous stage. This value of variable resistor is equal to the input
impedance. Compare this value to the theoretical value.

4.6 Measurement of the Output Impedance

o Set your Function Generator to produce a 50 mVpp, 1 KHz, sinusoidal signal and apply
it to the amplifier’s input. Probe the output signal on your oscilloscope and measure its
peak-to-peak amplitude. Note this value as Vout.

o Remove RL and measure the peak-to-peak amplitude of the output signal again.
Note this value as VNL.

o Find the output impedance using:

Rout=RL * ( VNL-Vout)/ Vout

Compare the result to the theoretical value of Rout ≈ RC.

 5. What should be in the report?
Include the following in appropriate sections.

o Introduction paragraph

o Lab design, calculations, and Multisim plots and tables all in the order that is
given in the lab Task.

o Conclusion paragraph