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New algorithm for generator differential protection

Conference Paper · May 2004

DOI: 10.1049/cp:20040084 · Source: IEEE Xplore

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GENERATION

New algorithm for generator differential

protection
by B Kasztenny and D Finney, General Electric Multilin, Canada

External fault currents combined with long DC time constants expose current transformers (CTs) of generator protection to substantial saturation.
Still, in many cases generator protection CTs are not selected and/or matched properly.

This is particularly true in industrial applications, oscillations. The optimized filter is a

where small machines, co-generators or Finite Response Filter (FIR) with the
distributed generators, use underrated window length of approximately
CTs. This is often driven by economic, not 1/3rd of power system cycle.
technical considerations and calls for better The digitally pre-filtered currents
performance of protective relays. In other are converted into phasors by
cases, the trend towards more compact applying the full-cycle Fourier filter.
switchgear does not allow for CTs with a The full-cycle window combined
generous rating. with the optimized MIMIC filter
allows for excellent filtering (Fig.
Cases are reported where significant saturation
1). At the same time owing to the
of main CTs could occur under relatively small
differential operating principle and
currents (as low as twice the nominal) in as
Fig. 1. Frequency response of the applied phasor algorithms unique definition of the restraining
little as a few power system cycles. Quite (upper envelope only). signal, the differential algorithm
often, different engineering teams select the
responds to internal faults in
neutral-side CTs and terminal-side CTs: not
less than half-a-cycle, which
only are the CT characteristics and burden
meets our design criteria.
impedances not matched, but also the CTs
may come from two different manufacturers. The operating current is
As a result, distant external faults, transformer produced as per the principle
inrush currents, or sudden changes in the load of differential protection (the
could result in CT saturation and misoperation entire algorithm is phase-
of stator differential protection if set too segregated – the phase
sensitive. index is omitted in this
Fig. 2: Response to switch-off transients (a); parameters of the
differential characteristic (b). paper):
Traditional means of dealing with CT saturation
would fail under such conditions. The currents ID = |IT - IN| (1)
are small thus no significant restraint is detecting DC saturation under small currents
where subscripts D, T and N stand for
produced. The relay would typically apply such as transformer inrush or a sudden
differential, terminal-side and neutral-side
the lower slope of its characteristic and would change of load.
currents, respectively and | | stands for
misoperate even if only a small spurious
Second, a phase comparison principle is phasor magnitude.
differential current is produced by the
incorporated to make the protection secure.
saturated CT. CT saturation mechanisms often The restraining current is produced as the
The phase comparison algorithm applies
built into the differential protection of more greater of the two currents:
adaptive thresholds in order to ensure good
advanced relays would also fail because
sensitivity. IR1 = max (|IT|,|IN|) (2)
they are typically designed to cope with AC
saturation under large through currents. This Third, the three major elements: differential, The “maximum of” definition of the restraining
paper presents research and implementation saturation detection, and directional units current brings in two advantages. First, during
of enhanced stator differential protection are combined using adaptive logic in order heavy internal faults, the ratio between the
driven by industrial applications where the to provide for fast, sensitive and secure differential and restraining currents is much
CTs were selected first, and the relays were protection. higher than 100%, resulting in fast and reliable
selected later with the primary criterion to operation. Second, during an external fault
Sample results of testing of a commercially
handle the grossly underrated or mismatched with saturation of one set of CTs, the restraining
available relay incorporating the new
CTs. current is not reduced by the saturation as
algorithm are included.
long as one of the CTs (neutral or terminal) is
First, a novel CT saturation detection algorithm
Differential characteristic not saturated. Differential relays must cope
is implemented. The detection algorithm
with switch-off transients. An external fault
incorporates two distinctive parts. One is The input currents are sampled at 64
may saturate one or more CTs and bring
aimed at identifying AC saturation under samples per cycle and pre-filtered using an
the differential-restraining point close to the
large currents, while the other is aimed at optimized MIMIC filter aimed at removing
operating line of the characteristic. When the
DC component(-s) and other low-frequency

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 GENERATION
external fault is subsequently cleared, both CT saturation detection combines three A saturation condition, SC, described later
the differential and restraining currents start distinctive parts: causes transition to the “EXTERNAL FAULT”
decreasing. The resulting switch-off trajectory state. The saturation flag is set at this time.
First, fast saturation due to large AC current
may temporarily enter the characteristic and Normally, no CT saturation occurs yet. In order
components is detected. Second, slower
cause misoperation (Fig. 2a). A crude way of to reset the “EXTERNAL FAULT” state, a RESET-1
saturation under small AC currents, but
preventing this from happening is to delay condition must be present for 100msec. The
significant and long-lasting DC currents is
intentionally– after detecting a fault but not detected. Third, extra security measures RESET-1 condition requires the differential
operating for it – operation of the differential applied after detecting CT saturation are kept current to be below the lower slope or below
function. in place for an extended period of time by the pickup of the characteristic with no
As delaying – even conditionally – operation a dedicated memory circuit. This is required saturation condition asserted:
of protection is not desired, the algorithm because the applied CT saturation detection
RESET-1={ID<SL . IR) OR (ID < P)} AND NOT
presented in this paper applies instead techniques are of a transient nature and will
(SC) (4)
additional post-filtering to the raw restraining not latch themselves.
current in order to cope with switch-off While in the “EXTERNAL FAULT” state, the
Memory of the CT saturation detection
transients. The effective restraining current is logic state machine may step further into the
a maximum instantaneous value in the last “EXTERNAL FAULT WITH CT SATURATION” state.
The saturation flag, SAT, is set by a state- This is programmed to occur if the differential
power system cycle:
machine shown in Fig. 3. Normally, the state characteristic is entered while in the “EXTERNAL
IR(k) = max (IR1(k-p)) p = 0..1 cycle (3) machine is operating in the “NORMAL” state. FAULT” state. In order to reset the “EXTERNAL
When clearing an external fault that has
just heavily saturated the CTs and thus has
produced a spurious differential current, it
will take approximately one full cycle for such
spurious differential current to disappear.
During that time the restraining current (3)
– owing to its one-cycle memory – does not
decrease at all. This results in a well-behaved
switch-off trajectory (Fig. 2a).

The presented algorithm uses a dual-slope

dual-break-point operating characteristic
when comparing the operating signal (1)
with the effective restraining signal(3). Both
the slope lines intersect the origin and thus
are true lines of a constant percentage
restraint. The transition region between the
two breakpoints and slopes is approximated
by a third-order function (Fig.2b).

The implemented characteristic allows

shaping the operate/restrain regions in
a flexible way. The following setting rules
apply:

BL lower breakpoint marks the AC-saturation-

free region; it is assumed that below this
value CT saturation will not occur due
to the AC component even with 80%
residual flux.
BH higher breakpoint marks the AC-saturation
region; it is assumed that above this value
CT saturation will occur due to the AC
component alone even with 0% residual
flux.
SL lower slope controls sensitivity of protection
under low currents; it should be set above
maximum spurious differential current
with no CT saturation.
SH higher slope recommended to be set at
about 60%; this value is of a secondary
importance, as stability of the algorithm
does not depend on the differential
characteristic alone.
CT saturation detection

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GENERATION
with no degradation in sensitivity
significant differential current
is present. The 1before the DC
saturation algorithm operates.
On the other hand, the 1.5 cycle
delay sets a limitation on security
of the algorithm: if CTs saturate
faster than in 1.5 cycle under
Fig. 4: Illustration of the AC saturation detector (a); effective logic of the
DC saturation algorithm (b) very low currents, the saturation
will go undetected and may result
Equation (6) declares CT saturation due to in a false trip. The final saturation
AC components if the restraining current is condition, SC, used by the state machine of
above the lower breakpoint (boundary of Fig. 3 is produced as follows:
Fig. 3. State machine of the saturation
detection logic guaranteed saturation-free CT operation),
SC=SCac OR SCdc (10)
while the differential current is relatively low
(no differential pickup). Graphically, the AC Directional principle
FAULT WITH CT SATURATION” state, a RESET-2
saturation detection may be illustrated as a
condition must be present for 200msec. The When CT saturation is detected, the stator
differential/restraining current trajectory flying
RESET-2 condition requires the differential/ differential function is not blocked or delayed,
through a particular window as depicted
restraining point to stay outside the differential but extra security measures are applied.
in Fig. 4a. Under subsequent CT saturation,
characteristic: Effectively, the relay switches to a 2-out-
condition (6) would reset, hence the need for
of-2 logic with the differential and phase-
RESET-2=NOT(DIF) (5) the CT saturation memory circuit discussed
comparison protection principles working
above and shown in Fig. 3.
To be effective, the saturation flag, SAT, must in parallel. The phase comparison principle
be set before actual CT saturation. Therefore, DC saturation detection checks the relative direction of the neutral-
the flag is set in both the “EXTERNAL FAULT” side and terminal-side currents(Fig. 5a,b).
DC saturation occurs due to long-lasting DC
and “EXTERNALFAULT WITH CT SATURATION” Both the currents must be relatively high
components in the currents, even if both the
states. Consequently the saturation flag is in order to check the direction. If at least
AC and DC components are relatively low.
set during all external faults even if they do one current is low, the angle is not checked
Relative DC components are used in this
not saturate any CTs. If none or moderate and permission to trip is granted. In order
algorithm as predictors of CT saturation. First,
CT saturation occurs, the saturation flag will to maintain high sensitivity and avoid user
the DC components are calculated over
reset 100msec after clearing the external settings that may be difficult to calculate,
one-cycle windows for both the neutral-side
fault. If severe saturation occurs, the flag will the currents are compared in an adaptive
and terminal-side currents:
reset approximately 300msec after clearing way using the raw restraining current (2) as
the fault. (7) a base:

On the other hand the saturation flag is not If (|I T|>B L OR (|I T|>D 2 . I R1 AND |I T|>P))
set on any internal faults, even if some CTs Where N = 64 s/c. AND…
saturate. Second, presence of significant DC (|IN|>BL OR (|IN|>D2 . IR1 AND |IN|>P)) (11a)
AC saturation detection components in the terminal-side and
then DIR 1 := abs(angle(I T)-angle(I N))>90 0)
neutral-side currents is checked using the AC
Both AC and DC saturation detection (11b)
components as adaptive thresholds:
methods employed by this algorithm are else DIR1 :=true (11c)
DCT=(IdcT>D1.|IT|) AND (|IT|>P) (8)
based on the assumption that a given CT
D2 is a factory constant of 0,25.
performs well for a short period of time DCN=(IdcN>D1.|IN|) AND (|IN|>P) (9)
even if it saturates heavily later on. If so, the The auxiliary directional flag created by
Significant DC current is detected if the
differential current will stay low during the equation (11)is conditioned with extra logic for
DC component is higher than a certain
initial period of saturation-free CT operation solid performance during switch-off transients
portion of the AC magnitude (D1) and the
while the restraining current develops quickly AC magnitude is greater than the pickup and other conditions (Fig.5c).
due to the fault. threshold of the differential characteristic. Adaptive logic
Unlike bus bar protection where CTs may The latter condition is introduced to prevent
detection of DC components on very low The algorithm uses adaptive logic to combine
saturate very heavily and very quickly, stator
currents where small DC offset of the relay the differential protection principle (DIF
differential protection is not exposed to
A/D converter may impact the algorithm. flag), saturation detection logic (SAT flag)
very fast CT saturation. Saturation detection
D1 is a factory constant adjusted at 0,5. As and the phase-comparison protection
methods intended for bus bar applications
shown in Fig. 4b, DC saturation is declared principle (DIR flag). If no CT saturation is
may use short-window filtering techniques or detected, the differential principle alone
1.5 power system cycle after large DC
even current derivatives to cope with very is capable of tripping the generator. If CT
components are detected and no s.5 cycle
short periods of saturation-free CT operation saturation is detected, both the differential
delay is introduced to give the algorithm a
[1]. Stator differential protection may use a and directional principles must pickup in
chance to operate on internal faults without
much simpler approach such as: order to trip. The operate flag (OP) is thus set
additional security measures. Owing to this
SCac=(ID>SL .IR) AND (IR>BL) (6) delay, low-current internal faults are detected as shown in Fig.5d.

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 GENERATION

Fig. 5. Phase-comparison principle: internal fault (a); external fault

(b); implementation (c). Final operating logic of the stator differential
protection (d)

Fig. 6: Example of DC saturation (load change)

inrush. The fully offset

current is at the level
of 2.1 of CT nominal.
The associated DC
component was
enough to saturate
one of the CTs as soon
as in 2 cycles (Fig. 7b)
resulting in enough
spurious differential
Fig. 7: Example of DC saturation (transformer inrush current) current to cause
misoperation of the
installed relay. The new algorithm is stable
Numerous simulations and the up-to-date for this case (OP flag).
filed experience show that the adaptive Conclusions
logic of Fig. 5densures an excellent balance
A new algorithm for stator differential
between speed, sensitivity and security.
protection has been presented. The
Nevertheless, the three critical flags (DIF, DIR
algorithm addresses extreme cases of CT
and SAT) are available in user-programmable
saturation including both AC saturation
logic for custom applications.
under large currents and DC saturation
Sample test results under small but DC-offset currents. While
ensuring good sensitivity and excellent
Two field examples collected in North security, the trip time of the actual relay
and South Americas as an outcome of hardware implementing the presented
misoperation of originally installed relays are algorithm is below one power cycle. The
presented. Results of waveform playback described algorithm is a standard function
to the enhanced relay [2] are discussed on commercially available generator [2]
below. and motor [3]numerical relays with more
than one five hundred of unit-years of
Example 1. Load change.
combined field experience to date.
Fig. 6 presents a case of load change. The References
current is at the level of 0,3 of CT nominal,
[1] Kasztenny B. Brunello G. “Modern Cost
increasing to about 0,5 of nominal. The
–Efficient Digital Bus bar Protection
associated DC component was enough to
Solutions”, Proceedings of the 28th Annual
saturate one of differential current to cause
Western Protective Relay Conference,
misoperation of the installed relay. The new Spokane, WA, October 21-24, 2002.
algorithm detects CT saturation (SAT) well
[2] GE Publication GEK-106411A, 2003,
before the differential principle misoperates
“G60 Generator Management Relay”,
(PKP). The directional element restrains on this Instruction Manual.
through-current condition (DIR), and the stator
[3] GE Publication GEK-106414A, 2003,
differential protection remains stable (OP).
“M60
Example 2. Transformer inrush. Fig. 7 Contact David Proctor-Golding, IST Energy,
presents a case of transformer magnetizing Tel (012) 426-7200, davidpg@ist.co.za

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