A/D and D/A Conversion Testing

Introduction
A major part of the testing that I am involved in requires verifying the operation of the analog-
digital converters as well as the digital-analog converters embedded in the circuit. There are
multiple converters on the unit which monitor both internal and external signals which need to
be verified. The main purpose of these converters is to monitor and report the temperature on
the circuit, as there are sensors installed that output an analog voltage proportional to the
temperature of the board.

Here we see the basic signal flow diagram for the subsystem that is being tested.

Analog to Digital To
Board Anti-Aliasing
Digital PIC Analog
Sensors Filter
Converter Converter

We will look closely at the theory and implementation of both the analog to digital converter and
digital to analog converter. Then, discuss the testing methods that are used to verify the system.

Analog to Digital Conversion

An analog to digital converter or ADC is a device which periodically samples an analog input
signal and outputs a binary code word for each sample. The ADC has a fixed number of output
values which are determined by the number of bits used to represent each output code of the
converter. For an N bit ADC the output codes can take on values of 0 to 2N-1. Note that some
converters have the ability to output two’s complement values, we will only focus on converters
which unsigned binary output.

The value of each code is determined by comparing the sampled input to a reference voltage.
the general transfer function for an A/D converter is given as

V¿
V out =G∙ 2N ∙
V REF

Where G is the gain of the converter. Note that this transfer function essentially outputs what
fraction of the reference voltage the input has taken. This has implications for dynamic range,
because the maximum input is determined by the reference voltage.

Resolution
Since the output of the ADC is a binary word an important issue is resolution. That is,
determining what the smallest change in voltage that can be detected, which is the least
significant bit of the code word. The least significant bit is given by Vref/2N.

For example, for a 12 bit ADC which uses a 4.096V reference the output code can take
25 = 4096 binary values, ranging from 0 to 4095. The least significant bit is 4.096V/4096 = 1mV.
Therefore, the smallest change in voltage that can be detected is 1mV. A result of this is the
introduction of quantization error, as there is rounding in the output. We can see from the plot
below that the input samples are essentially placed into bins, the size of which are determined
by the reference voltage.

Aliasing
One important issue that must be dealt with when sampling an analog signal is aliasing. Aliasing
is a form of distortion that is caused when a signal is not sampled at a high enough sampling
rate. The mathematical model of sampling is to multiply the continuous signal with a train of
impulses.

Below we see the original frequency and the spectrum of the signal after sampling.

|H ( jω )|

ω
Original Frequency Spectrum

|H ( jω )|

Frequency Spectrum After

From the figure above we can see that sampling results in periodic copies of the original
Sampling
spectrum, the copies are space by the sampling frequency. To recreate the original signal we
would need to run the sampled signal through a reconstruction filter. This filter eliminates all the
unwanted copies. If the sampling rate is not at least twice the bandwidth of the sampled signal it
is not possible to recreate the signal using a reconstruction filter.

|H ( jω )|
 ω

Frequency Spectrum After Sampling

This overlap is a form of distortion known as “aliasing”. When aliasing occurs it is not possible to
accurately recreate a sampled signal. In order to prevent aliasing it is necessary to place a low
pass filter in front of the device. This is normally referred to as an “anti-aliasing” filter. In the
case of the unit under test this is a simple passive RC filter.

MAX147
The actual chip that is used on the unit under test is the MAX147. This is an interesting device
because it a combination of both a multiplexer and an A/D converter. Below is the pin-out of the
chip which was taken from the datasheet.

The controller, in this case a PIC microcontroller, has the ability to select which input is taken as
the input of the ADC through the DIN pin. The benefit of using this device is that up to eight
sensors can be monitored using only a single chip.

MAX147 Architecture: Successive Approximation Register

The architecture which is used by the MAX147 to implement A/D conversion is called
successive approximation register or SAR. Below is a diagram of the basic signal flow for a SAR
converter, which was taken from MAXIM application note AP 1080.

First a track and hold circuit samples the input voltage through a switched capacitor circuit.
Then the sampled voltage is compared to the output of the SAR register. Note that the SAR
register is converted to an analog signal by an internal digital to analog converter (DAC). Also,
the number of bits in the SAR register is equal to the bit resolution of the converter. For an N bit
ADC there are N bits in the SAR register. The algorithm that is used to create a code word from
the input sample is as follows:

1) Set the MSB of the SAR register to 1, and all other bits to 0.
2) Convert the SAR register to an analog voltage and compare it to the input.
3) If the SAR voltage is greater than the input the SAR register stays the same.
4) If the SAR voltage is less than the input the current bit is set to 0.
5) Move to the next bit and repeat this process.

After this process has been run for each bit the SAR register will contain the code word
representing the current analog sample.
From the algorithm we can see that the SAR converter must run through multiple acquisition
cycles in order to create a digital sample from the input. More specifically, for an N bit ADC the
SAR converter must go through N acquisition cycles. Therefore, an important parameter of any
SAR ADC is its acquisition time.

Advantages and Disadvantages of SAR

The key benefits of using the SAR architecture are low power consumption and low area. This is
particularly important for small battery operated devices. Unfortunately, because the acquisition
time increases with the number of bits SAR converters are generally limited to 8 to 16 bits of
resolution, and to sampling rates of 5 MSPS or below. This makes them a good choice for low
to medium speed applications.

Digital to Analog Conversion

A digital to analog converter (DAC) is a device that produces an analog output from a digital
code word. The input to a DAC is a binary number, that like the ADC, represents a fraction of
some reference voltage.

AD5324
The chip that is used to perform D/A conversion is the AD5324 from Analog Devices, which is a
twelve bit DAC. The AD5324 uses a three wire serial interface and has four output buffers. In
order to perform D/A conversion you must clock 16 bits into the input register, the twelve least
significant bits are the data bits and the remaining four determine which of the four output
buffers the signal is place into.
Similar to the ADC, the DAC requires a reference voltage. The output voltage is given as

D
V out =V ref ∙
2N

Where D is the binary code loaded into the device. Note that since this is a 12 bit DAC the
possible range of D is 0 to 4095. One of the unique properties of the AD5324 is that it only
consumes power when data is being written into the input registers. So, if no data is sent to the
device it powers itself down.

AD5324 Architecture
Below we see the signal flow diagram for the AD5324.

On the input there is a 3-wire serial interface, from the serial interface the data is placed into an
input buffer. From the input buffer the data bits are applied to a string-resistor DAC.
The bits in the input register determine which nodes of the resistor string are connected to the
output amplifier. Each bit corresponds to a switch on the string, if the bit is pulled high then that
switch is closed, connecting the node to the output amplifier.

Testing Procedure
To test the unit under test we will provide a sinusoidal input to the ADC and then pass that
acquired signal through the DAC to see if we can recreate the original signal. Since the MAX147
has eight inputs multiplexed into we repeat this test for each input.

[insert signal flow diagram of test setup]

Each input into the MAX147 has a passive RC low pass filter, so we will run the test first at a
frequency of 1 Hz. Next, we run the test at 100 Hz, which is the 3dB point of the filter frequency
response. At 100 Hz the output of the DAC should be 3dB below the input from the function
generator.