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107 views6 pages

EMI Mortensen PDF

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papirojedec
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Valpont.

com, a Technology Content Platform

20H Rule
RF currents fringing between the power and ground planes at the edge of the board can result in
RF emissions. Reducing the size of the power plane with respect to the ground plane will reduce
these emissions. The ground plane should exceed the power plane by 20H where H is the total
thickness between the power and ground planes. 20-H provides for approximately a 70%
reduction of the fringing flux and changing to 100-H will provide about a 98% reduction. Many
times 20H translates to about 1mm spacing.

3W rule
For critical signals such as high speed clock, 3W rule can be applied. 3W rule means the distance
measured between two trace center lines are at least 3 times the trace width. 3W rule can reduce
cross talk flux by about 70%. 10W can reduce by 98%.

Guard trace

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/


Valpont.com, a Technology Content Platform

Guard traces can be placed besides high speed signals such as clocks to minimize crosstalk to
surrounding traces. Guard trace can be connected to ground through vias.

In addition, high speed signals should be routed as short as possible and avoid using right angles
to minimize EMI emission.

No high speed signals or components close to edge of board


Board edge should be filled with copper. No high speed signals should be placed close to board
edge. Components involved with high speed signals should also be placed away from board edge.

Keep trace characteristic impedance consistent


Try to avoid below cases that causes changing of trace characteristic impedance.

 Trace width change


 Trace crosses multiple layers
 Trace has T or other forks
 Trace crosses image plane boundaries

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/


Valpont.com, a Technology Content Platform

 Trace length is long enough to be treated as transmission line but no or mismatched


impedance matching.

Use wide trace for power or use power plain


If trace is used to connect power, it should be as wide as possible. For 1Oz copper, 1mm wide
trace can carry 1A current if trace is at top or bottom layer and 0.5A if trace is at internal layers.
For 1.5mm wide trace, it is 1.5A for surface layers and 0.75A for internal layers.

Avoid image plane violation

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/


Valpont.com, a Technology Content Platform

As shown above, detoured RF return current causes both signal integrity issue and EMI issue. If
the parts causing return current break/detour can not change their package, they should be placed
near the edge of the board or they should be placed in the direction of current flowing.

For example, in today’s development and reference boards, lots of attentions are placed for
flexibility and extensibility with the help of many connectors. But these connectors are not
placed in the proper location and cause return current break.

Connectors break return curent

Power distribution on board


If board has multiple high speed digital ICs, use ferrite beads on each IC’s power trace. For
better performance, capacitors can be used with ferrite beads to reduce EMI due to current

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/


Valpont.com, a Technology Content Platform

change. Typical value of capactor is 4.7uF or 10uF. They should be placed as close to IC power
pin as possible and should not exceed 1.5cm from IC power pin on FR4 board.

Spacing between board and enclosure


If PCB board is placed inside an enclosure, there should be some spacing left between board and
enclosure or the board should have about 0.3mm no copper around edge. This is to help ESD
protection. Rule of thumb is 1mm spacing can prevent 1KV ESD discharge.

Special routing
No trace is routed under transformers with coils such as relays. Components such as diodes and
transformers that are used to dissipate RF energy across relays and transformers should be placed
close to relays and transformers.

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/


Valpont.com, a Technology Content Platform

Use EMI parts on IO connectors


Use EMI parts such as ferrite beads and capacitors on IO connector pins to reduce RF emission.
Capacitor value is normally 10pF to 1000pF and is selected based on signal data rate. For
example, 1000pF for 1Kbps and 200pF for 1Mbps. Ferrite bead and capacitor can be used
together for better performance.

Board stackup
A typical 4 layer board stack up is shown in below. Signals are mostly routed on top layer.
Ground layer should be right below it to provide return path and decoupling from other layers.

For two layer boards, power trace and ground trace can be routed together to reduce EMI. Or if
possible, use large ground plane on bottom layer and use vias as many as possible to connect to
top layer ground trace.

Copyright. Mortensen PCB/EMI Consulting. Visit me at http://www.valpont.com/members/mortensen/

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