Introduction to

digital systems and

microprocessors

© Luis Entrena, Celia López, Mario García,

Enrique San Millán

Universidad Carlos III de Madrid

 Outline
l  Structure of a digital system
•  Data path
•  Control unit
l  Structure of a basic computer
l  Operation of a basic computer. Instructions

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 2
 Digital systems
l  A digital system processes digital information
according to a particular algorithm
l  Algorithm: a finite sequence of operations to solve a
problem
l  Goal of this lesson: introduce digital systems

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 3
 Structure of a digital system

Din Data path Dout

Cin Control Unit Cout

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 4
 The Datapath
l  Any algorithm can be decomposed in a set of basic
operations:
•  Arithmetic
•  Logic
•  Shift & Rotation
l  The datapath is the set of functional units that
process the data

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 5
 The Datapath
l  Typical datapath components:
•  ALUs: perform operations
•  Registers and memories: store temporal data
•  Buses: connect datapath elements
•  Multiplexers: select data to be processed every time

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 6
 Datapath example
l  ALU performs operations SR R
•  F: ALU function F
A
ALU
B

l  SR (Status Register). Flag

SI
bits resulting from the ALU
operation, such as : I

•  C: Carry RFA
Register
•  O: Overflow
RFB
RD Bank
•  Z: Zero
WE

•  S: Sign SE

l  Immediate operands

provided by I and selected
by SI OE

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de E/S
Madrid, 2008 7
 Datapath example
l  Register bank (triple SR R
port memory) stores F
A
ALU
B
temporal data
SI
l  Register selection I
•  RFA: Source register A
•  RFB: Source register B RFA
RFB
Register
•  RD: Destination register RD
WE
Bank

l  I/O for external SE

connection
•  SE selects RD input
(external o internal) OE

•  OE (Output Enable)
E/S
© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 8
 The Control Unit
l  Determines the correct application and sequencing
of operations on data
l  Typical Control Unit components:
•  Finite State Machines
•  Counters
•  Registers and memories to store control data, etc.

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 9
 Control Unit example
l  Example: perform the following computation
y = abs(x1 - x2)/2
l  Steps:
•  1. Load x1 in register R1
•  2. Load x2 in register R2
•  3. Subtract x2 from x1 and place the result in register R3
(R3 = R1 – R2).
•  If the result is positive, go to step 6. Otherwise, continue with
step 4.
•  4. Complement R3 (R3 = NOT R3)
•  5. Increment R3 (R3 = R3 +1)
•  6. Shift right R3 (R3 = R3/2)
•  7. Send R3 to the output
© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 10
 Control Unit example
l  FSM of the Control Unit

S=1
S1/ S2/ S3/ S4/ S5/ S6/ S7/
P1 P2 P3 P4 P5 P6 P7

S=0

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 11
 Control Unit example
l  FSM outputs

Paso A L U RFA SI I RFB RD WE SE OE

Function (F)
1 X X X X X R1 0 1 0
2 X X X X X R2 0 1 0
3 RESTA R1 0 X R2 R3 0 0 0
4 NOT R3 0 X X R3 0 0 0
5 SUMA X 1 1 R3 R3 0 0 0
6 SHR R3 0 X X R3 0 0 0
7 X X X X R3 X 1 X 1

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 12
 Digital systems design
l  Designing with very basic components, such as logic
gates, is not practical for digital systems design
l  RTL (Register Transfer Level) design:
•  Use more abstract components, such as ALUs, registers or
multiplexers
•  Digital systems are described by means of operations
performed with data stored in registers

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 13
 Hardware Description Languages
l  Hardware Description Languages (HDLs) allow a
designer to work at a higher abstraction level
l  Example (VHDL)

Synthesizer
if s = ‘0’ then (Compiler) a
z <= a;
MUX z
else b
z <= b;
end if;
s

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 14
 Structure of a basic computer
l  Computer: general purpose machine for information
processing
•  Oriented to implement a wide variety of algorithms
l  Components:
•  Processing Unit or Central Processing Unit (CPU) performs
the required operations
•  General purpose datapath
•  Programmable control unit, able to perform many differents
algorithms
•  Memory to store information
•  Input/Output units for external communication

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 15
 Programmable Control Unit
Desp. Salto
1
l  Control words are stored in a Salto
memory D F

•  Control words are coded to + E

save space
•  Coded control words are PC
C SI

called instructions O
I
D
l  Every clock cycle, an
instruction is read (RI) and I RFA

decoded Memoria
Program F
RFB
RD
de
Memory
l  The instruction required for programa I WE

each step is determined by C

the Program Counter (PC). A
SE

•  Sequence changes are RI D

implemented by means of
instructions, that can O
dynamically depend on the R OE

SR value
© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 16
 Microprocessor
Unidad de Control 1 Desp. Salto Ruta de
Datos
Salto SR R
F
D ALU
A B
+ E
C SI
PC O
I
D
I RFA

Memoria
Program F
RFB
Register
Banco de
RD
de
Memory registros
Bank
programa I WE

C
SE
A
RI D
O
R OE

E/S
© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 17
 Basic computer
(Harvard architecture)
Desp. Salto
1 Ruta de
Unidad de Control
Datos
Salto D SR R
F
E ALU
A B
+
C
SI
PC O
I
D
I RFA
Memoria F RFB Banco de
Register
Program RD
de registros
Bank
Memory I WE
programa
C
SE
A
RI
D
O
OE
R

WE D A WE A D
Memoria de datos
Data Memory E/S

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 18
 Basic computer
(von Neuman architecture)
Desp. Salto
1 Ruta de
Unidad de Control
Datos
Salto D SR R
F
E ALU
A B
+
C
SI
PC O
I
D
I RFA

F RFB Register
Banco de
RD
Bank
registros
I WE

C
SE
A
RI
D
O
OE
R

Bus de datos
Bus de direcciones

WE D A WE A D
Memoria(Program
Memory (Programa&y Datos)
Data) E/S

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 19
 Operation of the basic computer.
Instructions
l  How are instructions executed?
•  Instruction cycle
l  What are the main types of instructions?
l  How are instructions coded?
•  Instruction format
•  Addressing modes

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 20
 Instruction cycle
l  Every instruction is typically processed in two steps:
•  Instruction fetch: load instruction in IR
•  Instruction execution: decode instruction and configure the
datapath to execute the operation specified by the
instruction
l  Each of these steps can be executed in a single
clock cycle or in many clock cycles, depending on
the microprocessor’s complexity

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 21
 Types of instructions
l  Data transfer instructions
•  Transfer data between registers, register and memory, or
register and I/O
l  Arithmetic and logical instructions
•  Set ALU operations: add, subtract, shift, etc.
l  Control flow instructions
•  Modify the instruction execution sequence
•  Modify PC contents
•  Examples: branches, subroutine calls, etc.

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 22
 Instruction format
l  Organization of instruction information. Instructions
are typically field coded:
•  Operation code (Opcode): specifies the operation to be
performed
•  Operands: specifies the data to be operated
l  The number of operands and the size of each field
may vary
l  Instruction size must be an integer multiple of
memory width

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 23
 Addressing modes
l  Operands can be specified in different ways, called
addressing modes
l  Some usual addressing modes:
•  Immediate: the operand is given with the instruction
•  Register direct: the instruction gives a register that contains
the operand
•  Memory direct: the instruction gives a memory address that
contains the operand
•  Indirect: the instruction gives a register that contains the
memory address of the operand

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 24
 Instruction format example
l  Consider the previous microprocessor architecture,
with the following parameters:
•  Opcode field: 5 bits
•  Register bank: 8 registers (direct addressing with 3 bits)
l  Instruction format

Opcode OpA OpB OpD Other

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 25
 Instruction examples
O p e r a t i o n M n e m o n i c Operation Code

Load data from memory L D 0 0 0 0 0

Store data in memory S T 0 0 0 0 1
A d d A D D 0 1 0 0 0
S u b t r a c t S U B 0 1 0 0 1
N O T N O T 0 1 1 0 0
A N D A N D 0 1 1 0 1
O R O R 0 1 1 1 0
S h i f t SHL, SHR 0 1 1 1 1
J u m p J M P 1 0 0 0 0
S u b r o u t i n e c a l l C A L L 1 0 1 0 0
Subroutine return R E T 1 0 1 0 1
. . . . . . . . .
© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 26
 Instruction examples
l  Single word instruction
Opcode RFA RFB RD Other
R3 = R1 + R2
01000 001 010 011 00

l  Double word instruction

Opcode RFA RFB RD Other

00000 000 000 011 00 Load R3 with data in
memory position ABCDh
Direccion
1010 1011 1100 1101

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 27
 Assembler language
l  Binary instruction codes are cumbersome
l  Assembly Language: instructions are specified as
mnemonics and operands are specified using
symbolic names
l  Assembly Program: translate instructions in a
program to their equivalent binary codes
l  Example:

ADD R1, R2, R3 0100000101001100

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 28
 References
l  “Principios de Diseño Digital”. D. Gajski. Ed. Prentice
Hall

© Luis Entrena, Celia López, Mario García, Enrique San Millán. Universidad Carlos III de Madrid, 2008 29