Conversion from Digital to Analog

DAC

Digital ↔ Analog Conversion

Sampled at a fixed time, Dt

Digital ↔ Analog Conversion

Digital in voltage and in time

fs = 1/Dt
Signal has frequencies 0 to ½ fs

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 Digital-to-Analog Converter (DAC)

 Binary Weighted DAC

 One resistor for each bit of output
 Resistor values in powers of 2

R1 = 10 kΩ
2 bit DAC
R0= 20 kΩ

R2 = 10 kΩ
3 bit DAC R1= 20 kΩ
R0= 40 kΩ

Digital-to-Analog Converter (DAC)

n D2 D1 D0 kohm equation Vout (V)
0 0 0 0 0.000
3.3*(R1||R2)/(R0+R1||R
1 0 0 3.3 R2||R1 6.67 2) 0.471
3.3*(R2||R0)/(R1+R2||R
2 0 3.3 0 R2||R0 8.00 0) 0.943
3 0 3.3 3.3 R1||R0 13.33 3.3*R2/(R2+R1||R0) 1.414
3.3*(R1||R0)/(R2+R1||R
4 3.3 0 0 R1||R0 13.33 0) 1.886
5 3.3 0 3.3 R2||R0 8.00 3.3*R1/(R1+R2||R0) 2.357
6 3.3 3.3 0 R2||R1 6.67 3.3*R0/(R0+R2||R1) 2.829
7 3.3 3.3 3.3 3.300
3.3V 40k 6.7k DAC output
n=1 Vout 3,500

3.3V 20k V 8k 3,000

n=2 out
2,500
3.3V 13.3k 10k
n=3 Vout 2,000
DAC output
3.3V 10k 13.3k 1,500
n=4 Vout
1,000
3.3V 8k V 20k
n=5 out 0,500

3.3V 6.7k 40k 0,000

n=6 Vout 0 2 4 6 8 5

Resistor Network for 4-bit DAC

 Range
 0 to 3.3V
 Resolution
 3.3V/15 = 0.22V
 Precision
 4 bits
 16 alternative 3,5 4-bit DAC
Measured Analog Output (V)

 Speed 3,0
2,5
 Monotonic
2,0
1,5
1,0
0,5
0,0
0 5 10 15
Digital Input
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R-2R Ladder DAC
Digital Inputs VOUT Expression VOUT

 R-2R DAC (8*VD + 4*VC + 2*VB +

D C B A in Volts
1*VA)/24
0 0 0 0 (0*5 + 0*5 + 0*5 + 0*5)/16 0
0 0 0 1 (0*5 + 0*5 + 0*5 + 1*5)/16 0.3125
0 0 1 0 (0*5 + 0*5 + 2*5 + 0*5)/16 0.6250
0 0 1 1 (0*5 + 0*5 + 2*5 + 1*5)/16 0.9375
0 1 0 0 (0*5 + 4*5 + 0*5 + 0*5)/16 1.2500
0 1 0 1 (0*5 + 4*5 + 0*5 + 1*5)/16 1.5625
0 1 1 0 (0*5 + 4*5 + 2*5 + 0*5)/16 1.8750
0 1 1 1 (0*5 + 4*5 + 2*5 + 1*5)/16 2.1875
1 0 0 0 (8*5 + 0*5 + 0*5 + 0*5)/16 2.5000
1 0 0 1 (8*5 + 0*5 + 0*5 + 1*5)/16 2.8125
1 0 1 0 (8*5 + 0*5 + 2*5 + 0*5)/16 3.1250
1 0 1 1 (8*5 + 0*5 + 2*5 + 1*5)/16 3.4375
1 1 0 0 (8*5 + 4*5 + 0*5 + 0*5)/16 3.7500
1 1 0 1 (8*5 + 4*5 + 0*5 + 1*5)/16 4.0625
1 1 1 0 (8*5 + 4*5 + 2*5 + 0*5)/16 4.3750
1 1 1 1 (8*5 + 4*5 + 2*5 + 1*5)/16 4.6875 7

Conversion from Analog to Digital

ADC

Analog to Digital Converter (ADC)

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28

24

20

16
Discrete digital signal
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8 Continuous analog signal

4

0
0 1 2 3 4 5 6 7 8 9 10
Time (s)

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Analog to Digital Methods

• Flash ADC Converter

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10

Successive approximation ADC block diagram

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Successive approximation register ADC converter

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4
Sample-And-Hold Circuit

Analog Input (AI) is sampled when the switch is closed

and its value is held on the capacitor where it becomes
the Analog Output (AO)

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ADC on MSP432

 Sampling Range/Resolution
 2.5V internal reference voltage
 0x000 at 0 V input
 0x3FFF at 2.5 V
 resolution = range/precision
= 2.5V/16384 alternatives < 1mV
 Actual resolution dominated by noise
 Improve signal to noise ratio (SNR)
 Slow down ADC (take longer to sample)
 Analog filtering, ground shield
 Digital filtering (average multiple samples)

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ADC on MSP432

 22 analog input channels

 Single-ended and differential-input configurations
 Sample rate up to one million samples/second 40 Hz
 Internal temperature sensor
 Flexible, configurable analog-to-digital conversion
 32 programmable sample conversion sequences
 Flexible trigger control
 Controller (software)
 Timers
We will use software
initiated trigger

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5
 ADC on MSP432

Analog in

Software
initiated

Digital
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ADC14 | Overview +
 14-bit Accuracy
 INL <= +/- 2 LSB;
 DNL <= +/- 1 LSB
 ENOB 13-bit I/
REF Voltage Select
 32-input channels P
M
 Single-ended & differential Inputs u
l
Sample / Hold

t
 2 Window comparators i A/D
 High interrupt p Clock
l
Converter
 Low interrupt
e
 In [Between] interrupt x
e
r
 Separate internal channels for
AVcc and TempSensor ADC14 Memory Registers

 Ultra Low current consumption

 Single ended 210uA @ 1.8V, 1Msps
 Differential 260uA @ 1.8V, 1Msps

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ADC14 | New Features

Internal = New Feature

Channel = Enhanced
Mapping Feature

external Reference
0
internal 1
32-input channels

external
0 Differential 14-bit ADC Enhanced
internal 1 Measurement Core Clock
external
0
internal 1
...

Enhanced 14-bit
Interrupt
ADC Window
Memory Comparator

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ADC14 | Differential Measurement
• Combine input channels to create differential input channels

• ADC will measure the difference between two channels and

store this value in the ADC14MEMx register

VREF+
A1 A1 voltage
ADC14MEMx
∆ Difference
A2 A2 voltage Register

VREF-

If configured for differential mode, ADC14 reports a value of:

NADC = 214 . ((VIN+ - VIN- ) / (VR+ - VR- )) + 8192:

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Internal
Channel
Mapping

0 • A26-31 can map to either an External Input

1 or Internal ADC input

0
1 • Internal inputs include the temperature
sensor and battery monitor
0
1
• See the device datasheet to see what
internal inputs are available on what
...

channels – varies by device

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ADC on MSP432
 Initialization
 Step 1. We configure the reference for 2.5V
 Step 2. We disable the ADC by clearing the ENC bit.
 Step 3. We wait for BUSY to be zero, in case there is a conversion
in progress.
 Step 4. We set the ADC mode to single sample, SMCLK, divide by
1, 32 clocks for SHM
 Step 5. We set the conversion address, 14-bit mode and turn on
the reference.
 Step 6. We set the 2.5V reference and select channel 6 (P4.7).
 Step 7. We disable interrupts on the ADC.
 Step 8. We set the SEL0 and SEL1 bits to specify analog input.
 Step 9. Lastly, we set the ENC bit to enable the ADC.

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ADC on MSP432

 Analog to digital conversion ADC_In

 Busy-Wait to be free
 BUSY to be zero Busy
 Poll until not busy Status
 Set software trigger Idle
 Write to ADC14CTL0 bit 0 Start
ADC
 Busy-Wait
 ADC14IFG0
Busy
 Poll until sample complete Status
 Read sample Complete
 Read from ADC14MEM0
Read data

return(data)
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ADC on MSP42
//------------ADC0_In------------
ADC_In
// Busy-wait analog to digital conversion.
// 0 to 2.5V
Busy
// Input: none, Status
// Output: 14-bit result, 0 to 16383 Idle
uint32_t ADC_In(void){ Start
while(ADC14CTL0&0x00010000){}; ADC
ADC14CTL0 |= 0x00000001;
while(ADC14IFGR0&0x01)==0){}; Busy
Status
return ADC14MEM0;
} Complete
Read data

return(data)

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PROGRAMMING THE MSP432 ADC14 SYSTEM

ENERGIA PROGRAMMING
The Energia library contains several functions to support analog conversions
including ADC and DAC-related functions
 analogRead(): voltage is converted : 0 -> 0VDC and 1023 -> 3.3 VDC.
 analogReference(): The different settings include:
 DEFAULT: sets ADC high reference level to VCC 3.3 V.
 INTERNAL1V5: sets ADC high reference level to internal 1.5 VDC reference.
 INTERNAL2V5: sets ADC high reference level to internal 2.5 VDC reference.
 EXTERNAL: sets ADC high reference level to the VREF pin value.
 analogWrite: The analogWrite function generates a pseudo analog output
signal using a pulse width modulated signal. The analogWrite function
generates a 490 Hz signal on the specified pin with a duty cycle specified from
0–255.
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