INSTITUTE OF AERONAUTICAL ENGINEERING

(Autonomous)
Dundigal, Hyderabad - 500 043

ELECTRONICS AND COMMUNICATION ENGINEERING

QUESTION BANK

Course Title DIGITAL DESIGN THROUGH VERILOG

Course Code AECB44
Program B.Tech
Semester V ECE
Course Type Professional Elective
Regulation IARE - R18
Theory Practical
Course Structure Lecture Tutorials Credits Laboratory Credits
3 - 3 - -
Course Coordinator Mr. M. Narendra Reddy, Assistant Professor

COURSE OBJECTIVES:
The students will try to learn:

The students will try to learn:

I The fundamental principles of the Verilog hardware descriptive language and its
constructs used in synthesizable Register Transfer Level (RTL) design
implementation of digital logic systems.
II The concepts of gate level, behavioral, dataflow and switch level modeling of
fundamental digital logic circuits using Verilog hardware description Language.
III The exposure to various stages of a typical ‘state of the art’ CAD VLSI tool for
simulation, synthesis, place and route, layout and power and clock routing modules.
IV The analytical skills needed to model finite state machines using Field
Programmable Gate Arrays, fault-tolerant high-speed computer arithmetic
circuits, built-in self-circuit (BIST).
COURSE OUTCOMES:
After successful completion of the course, students will be able to:
Knowledge
Level
Course Outcomes
(Bloom’s
Taxonomy)
CO 1 Recall the basic conventions for operators, comments, Remember
whitespace, numbers, strings, and identifiers used for digital
hardware implementation.
CO 2 Explain the logic value set and data types in verilog to model the Understand
analog and digital hardware circuits.
CO 3 List the different operator types for describing combinational and Remember
sequential circuits in verilog.
CO 4 Develop combinational and sequential logic circuits that can be Apply
synthesized using Verilog HDL in data flow modeling.
CO 5 Utilize the basic logic gate primitives and user defined primitives Apply
for implementing digital circuits in gate level modeling.
CO 6 Illustrate the significance of structured procedures in behavioral Understand
modeling using blocking and nonblocking procedural assignments.
CO 7 Demonstrate timing control constructs in verilog to specify the Understand
simulation time at which the procedural statements will execute.
CO 8 Make use of loop and conditional statements to describe the Apply
combinational and sequential circuits in behavioral modeling.
CO 9 Choose appropriate switches such as basic transistor switch and Apply
CMOS switch for implementing digital circuits in switch level
modeling.
CO 10 Identify the methods to specify delays on switch level elements Apply
for designing modules with delay and timing checks in switch level
modeling.
CO 11 Model synchronization circuitry for interfacing asynchronous Apply
signals with synchronous circuits.
CO 12 Distinguish the synchronous and asynchronous sequential state Analyze
machines for synthesizing the sequential circuits.

Page 2
QUESTION BANK:
Q.No QUESTION Taxonomy How does this subsume CO’s
the level
MODULE I
INTRODUCTION TO VERILOG HDL
PART A-PROBLEM SOLVING AND CRITICAL THINKING QUESTIONS
1. Using examples, explain Apply The learner to Remember CO3
about concurrent and the syntaxes of concurrent
procedural statement with and procedural statements
syntaxes. and Understand its
operations with examples.
2. Explain port declaration with Understand The learner to Define port CO1
an example using Verilog and Understand the port
code. declaration in Verilog code
3. Explain the components of a Understand The learner to Define the CO1
Verilog module with block components of Verilog
diagram. module and Understand
the significance of each
component.
4. Define the following terms Remember ——— CO1
relevant to Verilog HDL
construct and Conventions.
(a) Identifiers (b) Strings (c)
Data types.
5. Define the following terms Remember ——— CO3
relevant to Verilog HDL
constructs and conventions.
(a) Keywords (b) Strengths
(c) Parameters.
6. Write the verilog code and Apply The learner to Recall the CO4
test bench for 8 to 1 concept of multiplexers,
multiplexer in dataflow Understand the operation
modeling. of 8:1 mux and then apply
data flow modeling to write
HDL code for verifying the
functionality of multiplexer.

Page 3
7. Explain the operation of 2 to Apply The learner to Recall the CO4
4 priority encoder and write concept of priority encoder ,
its verilog code using Understand the operation
dataflow modeling. of 2:4 priority encoder and
then Apply data flow
modeling to write HDL code
for verifying the functionality
of priority encoder.
8. Construct the verilog code in Apply The learner to Recall CO4
dataflow modeling for different arithmetic and
implementing arithmetic and logical operations and
logic unit using arithmetic Understand the operation
and logical operators of ALU and apply data flow
level modeling to write HDL
code for verifying the
functionality of ALU.
9. What is the difference understand The learner to Recall CO2
between wire and reg data different data types and
type explain with examples? Understand the differences
between wire and reg data
types.
10. Describe the operation of full Apply The learner to Recall the CO4
subtractor and write the full truth table of full subtractor
Verilog description for the and Understand the
full subtractor module in operation of full Subtractor
dataflow modeling. and Apply data flow level
modeling to write HDL code
for verifying the functionality
of full Subtractor.
PART-B LONG ANSWER QUESTIONS
1. Discuss the history of Understand The learner to Recall the CO1
hardware description programming of VHDL and
language and Compare the Understand the importance
verilog HDL with VHDL of verilog HDL
2. Discuss various Levels of Understand The learner to Recall the CO1
design description in verilog various levels of design
HDL. description of VHDL and
Understand the modeling
styles in Verilog HDL

Page 4
3. Explain top-down design Understand The learner to Define the CO1
methodology with example. design flow steps and
Understand the top-down
methodology with example
4. Write short notes on, a) Understand The learner to Remember CO4
Concurrency b) Functional the concept of functional
verification verification and Understand
the advantage concurrent
execution and verifying the
functionality of a digital
circuit.
5. Define the following terms Remember The learner to Recall the CO1
relevant to Verilog HDL, (a). concept of programming
Simulation versus synthesis. language interface and
(b). PLI (c) System tasks. Understand the advantage
of simulating and
synthesizing a digital design
6. what are the system tasks Understand The learner to Define system CO1
available in Verilog for tasks and Understand the
making and controlling routine operations of system
simulation ? tasks in verilog HDL
7. Explain about, (a). Display Understand The learner to Define system CO1
tasks (b). Strobe tasks (c). tasks and Understand the
Monitor tasks with examples. routine operations of system
tasks in verilog HDL
8. Discuss the following terms Understand The learner to Define the CO1
relevant Verilog HDL. (a). module and test bench and
Module (b). Test bench. Understand the correctness
of the device under test
9. Explain the syntax of Remember The learner to Recall the CO2
functions and tasks with one concept of functions and
example. tasks
10. Write about $readme with Understand The learner to Define system CO1
example. tasks and Understand the
routine operations of system
tasks in verilog HDL

Page 5
11. Explain the synthesis Understand The learner to Recall CO1
procedure in Verilog HDL. concept of simulation and
synthesis and Understand
the advantage of simulating
and synthesizing a digital
design
12. Design a JK flip flop using Understand The learner to Recall the CO4
NAND gates . logic circuit and truth table
of JK-flip flops using nand
gates and Understand the
operation of JK- flip flops.
13. Write a Verilog code for JK Apply The learner to Recall logic CO4
flip flop using NAND gates in circuit and truth table of
data flow modeling. JK-flip flops using nand gates
Understand the operation
of JK-flip flops and then
Apply data flow level
modeling to write HDL code
for verifying the functionality
of JK-flip flop.
14. Design a T flip flop using Remember The learner to Recall the CO4
NAND gates. logic circuit and truth table
of T-flip flops using nand
gates and Understand the
operation of T- flip flops.
15. Write a Verilog code for T Apply The learner to Recall the CO4
flip flop using NAND gates in logic circuit and truth table
dataflow modeling. of T-flip flops using NAND
gates Understand the
operation of T-flip flops and
thenApply data flow level
modeling to write HDL code
for verifying the functionality
of T-flip flop.
16. Discuss the difference Understand The learner to Remember CO4
between continuous the types of signal
assignment and implicit assignments in data flow
continuous assignment modeling and Understand
statement with examples. the differences between
continuous assignment and
implicit continuous
assignment statement.

Page 6
17. Explain the three ways of Understand The learner to Remember CO4
specifying delays in the types of signal
continuous assignment assignments in data flow
statements modeling and Understand
the different ways of
specifying delays in
continuous assignment
18. Write short notes on Remember —- CO3
expressions, operators and
operands.
19. Write short notes on the Understand The learner to Define CO3
following with examples. a) different types of operators
Conditional operator b) and Understand the syntax
Concatenation operator and operations of conditional
and concatenation operator.
20. Briefly explain the following Understand The learner to Define CO3
with examples. a) Relational different types of operators
operators b) Equality and Understand the syntax
operators and operations of relational
and equality operator
PART-C SHORT ANSWER QUESTIONS
1. Define verilog HDL? Remember —- CO1
2. List levels of design Understand The learner to Recall the CO1
description in verilog HDL? knowledge of engineering and
Understand the design
description in verilog HDL .
3. Describe is concurrency? Remember —- CO4
4. What is simulation and Remember The learner to Recall CO1
synthesis? concept of simulation and
synthesis and Understand
the advantage of simulating
and synthesizing a digital
design
5. What is functional Understand The learner to Remember CO1
verification? the concept of functional
verification and Understand
the advantage of verifying
the functionality of a digital
circuit.
6. What are system tasks? Remember —- CO1

Page 7
7. Write short notes on Understand The learner to Recall the CO1
programming language concept of programming
interface (PLI). language interface and
Understand the advantage
of simulating and
synthesizing a digital design
8. What is module? Understand The learner to Remember CO1
the concept of module and
Understand the syntax of
the module.
9. What is a simulation and Remember —- CO1
synthesis tool?
10. What is test bench? Understand The learner to Define the CO1
test bench and Understand
the correctness of the device
under test
11. Define keywords and Remember —— CO1
identifiers?
12. What are white space Understand The learner to Define white CO1
characters? space characters and
Understand its significance
in programming.
13. Define comments and Remember —- CO1
numbers?
14. Define strings and logic Remember —– CO2
values?
15. List different data types. Understand Learner to Remember the CO2
various data types in verilog
and Understandits
significance in programming.
when a variable can be
declared as data type
16. Define scalars and vectors. Remember —– CO2
17. Define parameters and Remember —– CO3
memory operators.
18. What is $display tasks? Understand The learner to Define system CO1
tasks and Understand the
routine operations of system
tasks in verilog HDL.

Page 8
19. Define Register data type Remember —– CO2
20. What is port? Understand The learner to Define port CO1
and Understand the port
declaration in verilog
MODULE II
GATE LEVEL MODELLING
PART-A PROBLEM SOLVING AND CRITICAL THINKING QUESTIONS
1. Write verilog code for RS-flip Apply The learner to Recall the CO5
flop with NAND gates using concept of flip flop,
gate level modeling. Understand the operation
of Rs-flip flop using NAND
gates and then apply gate
level modeling to write the
verilog code for verifying the
functionality of Rs-flip flop
2. Write a Verilog code and test Apply The learner to Recall the CO5
bench of 8 to 1 to 8 de concept of demultiplexer,
multiplexer using gate level Understand the operation
modeling. of 1 to 8 demultiplexer and
then apply gate level
modeling to write the verilog
code and test bench for
verifying the functionality of
1 to 8 demultiplexer.
3. Write a Verilog code for D Apply The learner to Recall the CO5
flip flop using NAND gates in concept of flip flop,
gate level modeling. Understand the operation
of D-flip flop using NAND
gates and then apply gate
level modeling to write the
verilog code for verifying the
functionality of D-flip flop
4. Construct the verilog code Apply The learner to Recall the CO5
for D- flip flop as level concept of level sensitive and
sensitive and edge sensitive edge sensitive UDP,
UDP and compare Understand the operation
of D-flip flop using NAND
gates and then apply gate
level modeling to write the
verilog code for D-flip flop as
a UDP

Page 9
5. Explain the syntax of Apply The learner to Recall the CO5
combinational UDP and concept of combinational
construct the verilog code for UDP, Understand the
OR gate as UDP. syntax of combinational UDP
and then apply gate level
modeling to write the verilog
code for OR gate as a UDP
6. Design a Verilog module for a Apply The learner to Recall the CO5
BCD adder module Using concept of BCD addition,
gate level modeling. Understand the operation
of BCD adder and then
apply gate level modeling to
write the verilog code for
verifying the functionality of
BCD adder
7. Write a data flow model for a Apply The learner to Recall the CO7
9-bit parity generator circuit. concept of parity generator,
Use only two assignment Understand the operation
statements. Specify rise and of 9-bit parity generator and
fall delays as well. then apply gate level
modeling to write the verilog
code for 9-bit parity
generator by specifying the
rise and fall delays.
8. Write the verilog code to Apply The learner to Recall the CO5
implement full adder using 2 concept of full adder and half
half adders in gate level adder, Understand the
modeling implementation of full adder
with 2 half adders and then
apply gate level modeling to
write the verilog code to
implement full adder using
half adders
9. Construct the verilog code Apply The learner to Recall the CO5
for 8 to 3 encoder using gate concept of encoder,
level modeling. Understand the operation
of 8 to 3 encoder and then
apply gate level modeling to
write the verilog code for 8 to
3 encoder.

Page 10
10. Construct the verilog code Apply The learner to Recall the CO5
for a 4 bit binary to gray concept of code converters,
code converter using gate Understand the logic
level modeling. circuit of 4 bit binary to gray
code converter and then
apply gate level modeling to
write the verilog code for
4-bit binary to gray code
converter.
PART-B LONG ANSWER QUESTIONS
1. write its Verilog code to Apply The learner to Recall the CO5
design a 1to 4 demultiplexer concept of demultiplexer and
module by using 2 to 4 decoder, Understand the
decoder operation of 1 to 4
demultiplexer and 2 to 4
decoder and then apply any
one of the modeling styles to
write the verilog code for
verifying the functionality of
1 to 4 de multiplexer.
2. Explain NAND gate Understand The learner to Recall the CO4
primitive with Verilog various logic gate primitives
module. provided in verilog and
Understand the
functionality of NAND gate
primitive.
3. Explain NOR gate primitive Understand The learner to Recall the CO5
with Verilog module. various logic gate primitives
provided in verilog and
Understand the
functionality of NOR gate
primitive.
4. Construct a module for the Apply The learner to Recall the CO5
addition of two16 bit words. concept of full adder,
Understand the operation
of four bit full adder and
then apply gate level
modeling to write HDL code
for verifying the functionality
of 4 bit full adder.

Page 11
 5. Write Verilog module for Apply The learner to Recall the CO5
addition 16 bit words. concept of full adder,
Understand the operation
of 16 bit adder and then
apply any of the el modeling
to write HDL code for
verifying the functionality of
16 bit full adder.
6. I. II. What is a three-state gate Understand The learner to Recall the CO5
and explain each type of various logic gate primitives
three-state gate with truth provided in verilog and
tables? Understand the
functionality of each type of
three-state gates with truth
tables.
7. Write a Verilog code for Apply The learner to Recall the CO5
tri-state devices. various logic gate primitives
provided in verilog,
Understand the
functionality of tri state
devices and construct the
verilog code for tri- state
devices
8. Write Verilog HDL source Apply The learner to Recall the CO5
code for a gate level concept of multiplexer,
description of 4 to 1 Understand the operation
multiplexer circuit. Draw the of 4 to 1multiplexer and then
relevant logic diagram. apply any one of the
modeling styles to write the
verilog code for verifying the
functionality of 1 to 4 de
multiplexer.
9. Implement Verilog HDL Apply The learner to Recall the CO5
source code and draw the concept of
logic diagram of a2-to-4 decoder,Understand the
decoder circuit. Give the operation of 2 to 4decoder
gate level description. and then apply any the gate
level modeling to write the
verilog code for verifying the
functionality of 2 to 4
decoder

Page 12
10. Write the verilog code and a Apply The learner to Recall the CO5
test bench for verifying the concept of adders,
functionality of half-adder. Understand the operation
of half adder and then apply
any one of the modeling
styles to write HDL code for
verifying the functionality of
half adder
11. Construct verilog module and Apply The learner to Recall the CO5
test bench for a 4 to 1 concept of multiplexers,
multiplexer using gate level Understand the operation
modeling. of 4 to 1 multiplexer and
then apply the gate level
modeling styles to write HDL
code for verifying the
functionality of 4 to 1
multiplexer.
12. Explain simple latch with Understand The learner to Recall the CO5
Verilog module in gate level truth table and logic circuit
modeling. of latch and Understand
the verilog code of latch in
gate level modeling.
13. Explain about operator Understand The learner to remember CO3
precedence with examples. the operators in verilog and
Understand the priority of
operators.
14. Explain bit widths of Understand The learner to Recall the CO2
expressions. concept of expressions and
Understand the default bit
width of variables in
expressions
15. Explain the three types of Understand The learner to Recall the CO5
user defined primitives in concept of user defined
verilog with syntax and primitives and Understand
examples the syntactical differences
between the three types of
user defined primitives.

Page 13
16. Describe the table in user Understand The learner to Recall the CO5
defined primitives and the concept of table in user
list of symbols used describe defined primitives and
functions Understand the description
of functionality as a table
using the list of symbols in
user defined primitives.
17. Design a D flip flop using Apply The learner to Recall the CO5
NAND gates in gate level truth table and logic circuit
modeling. of D-flip flop, Understand
the operation of D-flip flop
using NAND gates and then
apply gate level modeling to
write the verilog code for a
D-flip flop.
18. Define user defined primitives Understand The learner to Recall the CO5
and rules for declaring the concept of user defined
UDP ports primitives and Understand
the rules to be considered for
declaring the ports of a user
defined primitives.
19. Classify gate delays and Understand The learner to Recall the CO7
explain with examples. concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
20. Describe the logic values and Understand The learner to Recall the CO7
various strengths that can be concept of logic values and
assigned to logic values in Understand the strengths
verilog. assigned to logic values in
verilog programing.
PART-C SHORT ANSWER QUESTIONS
1. What is gate level modeling? Understand The learner to Recall the CO5
various levels of modeling in
verilog and Understand the
description of hardware in
gate level modeling

Page 14
2. What is AND gate primitive? Understand The learner to Recall the CO5
various logic gate primitives
provided in verilog and
Understand the
functionality of AND gate
primitive.
3. What is module structure? Understand The learner to Remember CO5
Give the example of module the structure of module and
structure. Understand how to write
the module for a describing a
circuit
4. Define tri-state gate? Remember —- CO5
5. What is array of instances of Understand The learner to Recall the CO5
primitives? various logic gate primitives
provided in verilog and
Understand how to create
an array of instances for
primitives.
6. Define delay? Remember —- CO7
7. Define strengths and content Remember —- CO7
resolution?
8. What is a net data type? Understand The learner to Remember CO2
the various data types in
verilog and Understand
when a variable can be
declared as net data type.
9. How many types of net data Understand The learner to Recall the CO2
types? various data types in verilog
and List the types of net
data types.
10. How many tri-state gates are Understand The learner to Recall the CO7
there in Verilog? logic gate primitives in
verilog and List the types of
tri-state gates.
11. What is continuous Understand The learner to Recall the CO7
assignment structure? signal assignment in verilog
and Understand the
structure of continuous
assignment statement.

Page 15
12. What is assignment to Understand The learner to Recall the CO5
vectors? signal assignment in verilog
and Understand how to
write the vector assignment.
13. Define operators in verilog? Remember —- CO3
14. Explain continuous Understand The learner to Recall the CO4
assignment structures with Continuous assignment in
examples. verilog and Understand the
structure of continuous
assignment statement with
example.
15. Explain about the concurrent Understand The learner to Recall the CO4
statements in data flow level. concept of data flow
Give one example to each modeling and Understand
one. the concurrent execution of
statements in data flow
modeling.
16. Explain net delay with Understand The learner to Recall the CO7
assignment delay and effects concept of delays with
of net delay with suitable assignment statements and
example. Understand the effect of
net delays on the execution
of verilog program.
17. Explain combining Understand The learner to Recall the CO3
assignment and net concept of delays with
declarations with examples. assignment statements and
Understand the declaration
of nets with delays using
continuous assignment .
18. Write a Verilog HDL code for Apply The learner to Recall the CO5
ripple-carry adder using gate concept of adder,
level modeling? Understand the operation
of ripple-carry adder, and
then apply gate level
modeling to write verilog
code for verifying the
functionality of the ripple
carry adder.

Page 16
19. Construct a 4 bit full adder Apply The learner to Recall the CO5
using gate level primitives concept of full adder,
and write its HDL code. Understand the operation
of four bit full adder and
then apply gate level
modeling to write HDL code
for verifying the functionality
of 4 bit full adder.
20. Explain in brief built-in Understand The learner to Recall the CO5
primitive gates that are various logic gate primitives
available in Verilog HDL. provided in verilog and
Understand the AND gate
primitive.
MODULE III
BEHAVIORAL MODELLING
PART A-PROBLEM SOLVING AND CRITICAL THINKING QUESTIONS
1. Write verilog code for 8-bit Apply The learners to Recall the CO6
up-down counter using concept of counters,
behavioral modeling Understand the operation
of up-down counter and then
apply behavioral modeling
to write the verilog code for
8-bit up-down counter.
2. Design Verilog code of OR Apply The learners to Recall the CO8
gate using for and disable. concept of for loop in verilog
Write simulation results of statements, Understand the
above question with syntax of for loop with
explanation. disable construct and then
apply for and disable
construct in behavioral
modeling to write the verilog
code for an OR gate.
3. Write syntax for ‘ while ’ Apply The learners to Recall the CO8
loop and write a Verilog code concept of while loop in
for n bit Johnson counter. verilog, Understand the
syntax of while loop and then
apply the behavioral
modeling to write the verilog
code for an n-bit Johnson
counter using while loop.

Page 17
4. Write a model using the Apply The learners to Recall the CO6
behavioral modeling style to concept of JK flip flop,
describe the behavior of a JK Understand the syntax of
flip- flop using an always always construct and then
construct apply the behavioral
modeling to write the verilog
code for an JK flip flop using
always construct.
5. .write verilog code for 3 to 8 Apply The learners to Recall the CO6
decoder using behavioral concept of decoder,
modeling Understand the logic
circuit of 3 to 8 decoder and
then apply the behavioral
modeling to write the verilog
code for 3 to 8 decoder.
CIE-II
6. Generate a clock waveform Apply The learners to Recall the CO8
using forever loop construct concept of forever loop
and also write a test bench construct, Understand the
program. syntax of forever loop and
then using the forever loop
write the verilog code and
test bench to generate clock
waveform.
7. Write the verilog code for 8 Apply The learners to Recall the CO8
to 1 multiplexer using case concept of multiplexer,
statement. Understand the logic
circuit of 8 to 1multiplexer
and then apply the
behavioral modeling to write
verilog code for verifying the
functionality of 8 to
1multiplexer using case
statement.
8. Define while loop, write Understand The learners to Recall the CO8
syntax with flow chart. concept of while loop and
Understand the syntax of
while loop with the help of
flow chart.

Page 18
9. Write the verilog code for Apply The learner to Recall the CO8
implementing 4-bit universal concept of shift register,
shift register in behavioral Understand the operation
modeling using case of 4-bit universal shift
statement. register and then apply the
behavioral modeling to write
verilog code for verifying the
functionality of 4-bit
universal shift register.
10. Write the verilog code and Apply The learner to Recall the CO6
test bench for verifying the concept of shift register,
functionality of shift register Understand the operation
in serial-in-parallel-out mode. of shift register in SIPO
mode and then apply the
behavioral modeling to write
verilog code for verifying the
functionality of shift register
in serial-in-parallel-out-mode.
PART-B LONG ANSWER QUESTIONS
1. Discuss the types of Understand The learner to Recall the CO6
procedural assignment in concept of procedural
behavioral modeling with assignment in verilog and
examples. Understand the differences
between blocking and
non-blocking statements with
examples.
2. Differentiate between Analyze The learner to Recall the CO6
sequential and parallel blocks concept of block statements
with examples. in verilog, Understand the
working of sequential and
parallel blocks, using these
write verilog code for a
circuit and then analyze the
difference between sequential
and parallel blocks.

Page 19
3. Construct verilog code for up Apply The learners to Recall the CO6
counter using procedural concept of counters,
assignment. Understand the operation
of up counter and then
apply behavioral modeling
to write the verilog code for
4-bit up counter using
procedural assignment.
4. Write up counter test bench, Apply The learner to Recall the CO6
simulation results. concept of counter,
Understand the operation
of up counter and then
apply behavioral modeling
to write test bench for
verifying the simulation
result of 4-bit up counter.
5. Write the syntax for the Apply The learner to Recall the CO6
following constructs and give concept of structured
one example for each relevant procedural statements,
to behavioral Verilog HDL Understand the syntax of
modeling. (a) initial initial and always construct
construct, (b) always and then apply behavioral
construct modeling to write verilog
code for any circuit using
initial and always construct.
6. What is the difference Understand The learner to Recall the CO7
between intra- statement concept delay based timing
delays and inter- statement control, Understand the
delay? Explain using an difference between intra-
example. statement delays and inter-
statement delay with
examples
7. Write the syntax of nested Apply The learner to Recall the CO8
if-else-if statement and concept conditional
explain with examples. statements in verilog,
Understand the syntax of
nested if-else-if statement
and then using nested if-else
if statement write the verilog
code for any circuit.

Page 20
8. What are the advantages of Remember —- CO6
multiple always blocks?
Explain with example.
9. Discuss the importance of Understand The learner to Recall the CO7
timing control in behavioral concept timing control in
modeling and explain in behavioral modeling and
detail the types of delay Understand the importance
based timing control with of delay based timing control.
examples.
10. Explain in detail the event Understand The learner to Recall the CO6
based timing control in concept timing control in
behavioral modeling with behavioral modeling and
examples. Understand the importance
of event based timing control.
CIE-II
11. Write the syntax of repeat Understand The learner to Recall the CO8
loop and explain with concept loop statements in
example. verilog, Understand the
syntax of repeat statement
with the help of an example.
12. Differentiate between the Analyze The learner to Recall the CO8
case and casex statement concept of case statements in
verilog, Understand the
syntax of case and casex
statement, using these write
verilog code for a circuit and
then analyze the difference
between case and casex
statement .
13. Design module to convert Apply The learner to Recall the CO8
angels in radians to one in concept of combinational
degrees. Write Verilog code circuit design, Understand
for the above question in the operation of circuit that
behavioral modeling. converts angle in radians into
degrees and then apply the
behavioral modeling to write
verilog code for the above
circuit

Page 21
14. Write the syntax for the Understand The learner to Recall the CO8
following constructs and give concept of loop statements in
one example for each relevant verilog, Understand the
to behavioral Verilog HDL syntax of disable construct
modeling. (a). The disable while loop with example.
construct (b). While loop
15. Write a Verilog HDL code for Apply The learner to Recall the CO8
n-bit shift register with an concept shift register,
enable input using blocking Understand the operation
assignments. of n-bit shift register with
enable input and then using
blocking assignments write
the verilog code to verify its
functionality.
16. Describe the differences Understand The learner to Recall the CO6
between functions and tasks concept of functions and
in verilog. tasks in verilog and
Understand the differences
between functions and tasks.
17. Write Verilog code using case Apply The learner to Recall the CO8
statement for any one concept of case statements in
example. verilog, Understand the
syntax of case and then using
case statement write verilog
code for a circuit.
18. Write the syntax for the Apply The learner to Recall the CO8
following constructs and give concept of functions and
one example for each relevant tasks in verilog,
to behavioral Verilog HDL Understand the syntax of
modeling. a) Functions. b) functions and tasks and then
Tasks. using the above constructs
write verilog code for a
circuit.
19. Explain the syntax of forever Understand The learner to Recall the CO8
loop with an example. concept of loop statements in
verilog, Understand the
syntax of forever loop
construct to write verilog
code for a circuit.

Page 22
20. Write the syntax for the Understand The learner to Recall the CO7
following constructs and give concept of procedural
one example for each relevant constructs in verilog,
to behavioral Verilog HDL Understand the syntax of
modeling. a) assign-deassign assign-deassign, repeat and
construct b) repeat construct for loop constructs to write
c) And for loop. verilog code for a circuit.
PART-C SHORT ANSWER QUESTIONS
1. What is behavioral Understand The learner to Recall the CO6
modeling? concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
2. What are operations and Remember —- CO6
assignments?
3. Define functional Bifurcation. Remember —- CO6
4. Define initial construct. Remember The learner to Recall the CO6
concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
5. Define always construct. Remember The learner to Recall the CO6
concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
6. Explain assign and de-assign Understand The learner to Recall the CO6
construct concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
7. Define wait construct Remember —- CO6
8. Explain multiple always Understand The learner to Recall the CO6
blocks concept of gate delays and
Understand the differences
between the types of gate
delay with examples.
9. Explain if and if-else Remember —- CO6
construct

Page 23
10. Give the syntax of case Understand The learner to remember the CO6
statement concept of case construct and
Understand the syntax of
case statements.
CIE-II
11. Draw simulation flow chart Remember —- CO6
12. Define blocking and Understand The learner to Recall the CO6
non-blocking assignments concept of procedural
assignments and
Understand the differences
between the blocking and
non-blocking assignments.
13. Write the syntax for Understand The learner to Recall the CO6
sequential block concept of procedural
constructs and Understand
the syntax of sequential
block.
14. Define repeat construct Remember —- CO8
15. Write the syntax for a for Understand The learner to Recall the CO8
loop concept of loop statements in
verilog and Understand the
syntax of for loop.
16. Write the syntax for a while Understand The learner to Recall the CO8
loop and forever loop concept of loop statements in
verilog and Understand the
syntax of while and forever
loop.
17. Explain parallel blocks Understand The learner to Recall the CO6
concept of procedural
constructs and Understand
the syntax of parallel block.
18. Explain force – release Understand The learners to Recall the CO6
construct concept of procedural
constructs and Understand
the syntax of force - release
construct.

Page 24
19. Write the importance of Understand The learner to Recall the CO7
timing control in behavioral concept of timing control and
modeling Understand the importance
of timing control in
behavioral modeling.
20. Write the syntax of repeat Understand The learner to Recall the CO8
loop in verilog HDL concept of loop statements in
verilog and Understand the
syntax of repeat loop.
MODULE IV
SWITCHLEVEL MODELLING
PART A- PROBLEM SOLVING AND CRITICAL THINKING QUESTIONS
1. Explain Understand The learner to Recall the CO9
automatic(re-entrant) tasks concept of system task in
with example. verilog and Understand the
automatic (re-entrant) task
2. Explain and design Verilog Understand The learner to Recall the CO9
module of timing related concept of timing control in
parameter with example. verilog and Understand the
modeling of timing related
parameters in verilog with
example.
3. Explain edge sensitive path Understand The learner to Recall the CO9
using an example. concept of timing control in
verilog and Understand the
modeling of edge sensitive
path in verilog with example.
4 Explain overriding Understand The learner to Recall the CO8
parameters. concept of parameter
overriding in verilog and
Understand the two ways
to override parameter values
in verilog with example.

Page 25
5. Construct verilog module for Apply The learner to Recall the CO10
left/right shifter. concept of functions in
verilog, Understand the
declaration and invocation of
functions and then apply the
concept of functions for the
implementation of left/right
shifter in verilog.
6. Construct a verilog module Apply The learner to Recall the CO10
using path delay. concept of delays in verilog,
Understand the various
types of delays and then
apply the concept of delays
to write a verilog code to
model path delays.
7. (b) Design the use of group Apply The learner to Recall the CO9
(a) delay with an ALU module. concept of delays in verilog,
(c) Write test bench and Understand the various
simulation results for the types of delays and then
above. apply the concept of delays
to write a verilog code and
test bench to model ALU.
8. Explain Value Change Dump Understand The learner to Recall the CO10
File concept of value change
dump file in verilog and
Understand the system
tasks control the dump
process during the simulation
9. Give the syntax for function Apply The learner to Recall the CO9
and write a program for concept of functions in
16-to-1 multiplexer using verilog, Understand the
function. declaration and invocation of
functions and then apply the
concept of functions for the
implementation of 16 to 1
multiplexer.

Page 26
10. (a) Design Verilog module Apply The learner to Recall the CO10
use of specify block to specify concept of delays in verilog,
out rise end full time Understand the various
separation for spin delays. types of delays and then
(b)Write test bench and apply the concept of delays
simulation for the above. to write a verilog code and
test bench to model delays .
PART-B LONG ANSWER QUESTIONS
1. Construct half subtractor Apply The learner to Recall the CO9
using CMOS switches. concept of transistor switches
and Understand the
operation of CMOS switches
and then using CMOS
transistor construct half
subtractor.
2. Write the Verilog code for Apply The learner to Recall the CO9
half subtractor using CMOS concept of transistor switches
switches. and Understand the
operation of CMOS switches
and then apply switch level
modeling to write verilog
code for half subtractor using
CMOS switches
3. Write verilog code, test Apply The learner to Recall the CO9
bench, results for CMOS concept of CMOS switches,
switch with a single control Understand the operation
line. of CMOS switches and then
using CMOS transistor
construct half subtractor.
4. Construct a CMOS flip-flop Apply The learner to Recall the CO9
circuit. concept of CMOS switches,
Understand the operation
of CMOS switches and then
using CMOS transistor
construct flip flop circuit

Page 27
5. Write verilog module for Apply The learner to Recall the CO10
CMOS flip-flop. concept of CMOS switches,
Understand the operation
of flip flop using CMOS
switches and then apply
switch level modeling to
write verilog code for CMOS
flip flop.
6. Explain bi-directional gates Understand The learner to Recall the CO9
with suitable logic diagrams concept of transistor switches
and give their switch level and Understand the
modeling operation of bi-directional
gate switches and their
switch level modeling.
7. Construct half -adder using Apply The learner to Recall the CO10
CMOS switches. concept of transistor switches
and Understand the
operation of CMOS switches
and then using CMOS
transistor construct half
adder.
8. Write the Verilog code for Apply The learner to Recall the CO10
half adder using CMOS concept of transistor switches
switches. and Understand the
operation of half adder using
CMOS switches and then
apply switch level modeling
to write verilog code for half
subtractor using CMOS
switches
9. Write about basic switch Remember —- CO9
primitives.
10. Write short notes on time Understand The learner to Recall the CO10
delays with switch primitives concept of switch primitives
relevant to switch level in verilog and Understand
modeling. the specification of delays
with switch primitives in
switch level modeling.

Page 28
11. How strength and delays are Understand The learner to Recall the CO10
instantiated? Explain. concept of switch primitives
in verilog and Understand
the instantiation of switch
primitives with delays and
strengths in switch level
modeling.
12. Define and explain the Remember —- CO9
following terms relevant to
Verilog HDL, (a) Module
parameters (b) File-based
tasks and functions (c)
Compiler directives.
13. Explain parameter Understand The learner to Recall the CO9
declaration and assignments. concept of parameters in
verilog and Understand the
declaration and assignment
of parameters in switch level
modeling.
14. Explain type declaration for Understand The learner to Recall the CO9
parameters. concept of parameters in
verilog and Understand the
type declaration for
parameters in switch level
modeling
15. Explain automatic Understand The learner to Recall the CO9
(recursive) function. concept of recursive functions
in verilog and Understand
the importance of automatic
recursive function in switch
level modeling.
16. Explain about module paths. Understand The learner to Recall the CO9
concept of parameters in
verilog and Understand the
declaration and instantiation
of module in verilog.
17. Define and explain the Remember —- CO10
following terms relevant to
Verilog HDL, A) Hierarchical
access B) Path delays.

Page 29
18. Explain $ finish task with Understand The learner to Recall the CO9
example. concept of system task in
verilog and Understand the
declaration and purpose of
$finish task with example.
19. Explain $ random function Understand The learner to Recall the CO9
with example. concept of system task in
verilog and Understand the
declaration and purpose of
$random task with example.
20. Explain asymmetric sequence Understand The learner to Recall the CO10
generator with example. concept of system task in
verilog and Understand the
task that is used to generate
asymmetric sequence with
example.
PART-C SHORT ANSWER QUESTIONS
1. Explain basic transistor Understand The learner to Recall the CO9
switches. concept of transistor switches
and Understand the
operation of basic transistor
switches.
2. Define basic switch primitive. Remember —- CO9
3. Explain the operation of Understand The learner to Recall the CO9
nmos switch. concept of transistor switches
and Understand the
operation of nmos switches.
4. Explain the operation of Understand The learner to Recall the CO9
pmos switch. concept of transistor switches
and Understand the
operation of pmos switch.
5. Define resistive switches. Remember —- CO9
6. Define cmos switch. Remember —- CO9
7. Explain Bi-Directional gates. Understand The learner to Recall the CO9
concept of transistor switches
and Understand the
operation of bi-directional
gate switches.

Page 30
8. How to insatiate with Understand The learner to Recall the CO10
strength and delays. concept of delays and
Understand the
specification of delays for
signals that pass through
these switch-level elements.
9. Define system task. Remember —- CO9
10. Define parameter. Remember —- CO9
11. Explain parameter Understand The learner to Recall the CO9
declaration and assignments. concept of parameters and
Understand the syntax of
parameter declaration and
assignments.
12. Define module paths. Remember —- CO10
13. Define specify block. Remember —- CO10
14. Define system function. Remember —- CO9
15. Explain $display Task. Understand The learner to Recall the CO9
concept of system tasks in
verilog and Understand the
syntax and operation of
$display task in verilog
programming.
16. Explain file based tasks and Understand The learners to Recall the CO9
functions. concept of file based tasks
and functions in verilog and
Understand the syntax and
operation of tasks and
functions in verilog
programming.
17. Explain compiler directives. Understand The learners to Recall the CO9
concept of compiler directives
provided in verilog and
Understand the syntax and
importance of compiler
directives in verilog
programming.
18. Define hierarchical access. Remember —- CO9

Page 31
19. Draw the CMOS inverter Understand The learner to Recall the CO9
circuit. concept of transistor switches
and Understand the
implementation of inverter
circuit using CMOS
transistor.
20. Draw a circuit diagram of 2 Understand The learner to Recall the CO9
-input CMOS NOR gate. concept of transistor switches
and Understand the
implementation of 2 input
NOR gate using CMOS
transistor.
MODULE V
SEQUENTIAL LOGIC
PART A-PROBLEM SOLVING AND CRITICAL THINKING QUESTIONS)
1. Write a Verilog module for Apply The learner to Recall the CO11
101 moore detectors and also concept of moore machine,
obtain its test bench. Understand the state
diagram of moore detector
which detects 101 and then
apply the behavioral
modeling concept to
construct the verilog code for
the same.
2. Write a test bench for moore Apply The learner to Recall the CO11
detector for synchronized concept of moore machine,
data input. Understand the moore
detector for synchronized
data inputs and then apply
the behavioral modeling
concept to construct the test
bench for verifying its
functionality.

Page 32
3. Write a test bench for moore Apply The learner to Recall the CO10
detector to display the concept of moore machine,
synchronization result. Understand the operation
of moore detector and then
apply the behavioral
modeling concept to
construct the test bench for
moore detector to display the
synchronization result.
4. Write a test bench for moore Apply The learner to Recall the CO11
detector to observe its states. concept of moore machine,
Understand the operation
of moore detector and then
apply the behavioral
modeling concept to
construct the test bench for
verifying its states.
5. Write a Verilog module for Apply The learner to Recall the CO11
1101 moore detector. Also concept of moore machine,
obtain its test bench and Understand the state
simulation results. diagram of moore detector
which detects 1101 and then
apply the behavioral
modeling concept to
construct the verilog code
and test bench for the same.
6. Write in detail about Understand The learner to Recall the CO10
assertion verification. Also concept of assertion
give its benefits. verification and Understand
the advantages of assertion
verification.
7. Write an interactive test Apply The learner to Recall the CO11
bench for 1101 moore concept of moore machine,
detector using display tasks. Understand the state
diagram of moore detector
which detects 1101 and then
apply the behavioral
modeling concept to
construct the test bench
using display task for the
same.

Page 33
8. Write a test bench for moore Apply The learner to Recall the CO11
detector to control the delay. concept of moore machine,
Understand the operation
of moore detector which
controls the delay and then
apply the behavioral
modeling concept to
construct the verilog code
and test bench for the same.
9. Write a test bench for moore Apply The learner to Recall the CO11
detector which makes uses of concept of moore machine,
buffer to hold the data Understand the operation
moore detector which makes
use of buffer and then apply
the behavioral modeling
concept to construct the
verilog code and test bench
for the same to verify the
hold time.
10. How the valid states of a Understand The learner to Recall the CO11
machine can be checked? concept of melay and moore
Explain using an example.. machines and Understand
how the valid states of a
machine can be checked with
examples.
PART-B LONG ANSWER QUESTIONS
1. What are the various Understand The learner to Recall the CO12
sequential memory storage concept of sequential memory
models? Explain in detail unit and Understand the
about each of them. verilog models of sequential
memory storage units.
2. Explain cross-coupled NOR Understand The learner to Recall the CO10
latch and all NAND clocked concept of NOR and NAND
SR latch with the help of SR latch and Understand
neat sketches and write the the verilog model of clocked
Verilog codes for each of SR latch using NOR and
them. NAND gates
3. Draw the block diagram of Understand The learners to Recall the CO10
master-slave flip-flop concept of master-slave flips
constructed using latches and flop and Understand the
write the Verilog code for the verilog model of master-slave
same. flip flop using latches.

Page 34
4. Explain about sequential Understand The learners to Recall the CO10
UDP with the help of an concept of user defined
example. primitives and Understand
the sequential UDPs with
examples.
5. Draw and explain the block Apply The learner to Recall the CO10
diagram of master-slave concept of master slave flip
flip-flop with two feedback flop, Understand the block
blocks using assign diagram of master-slave
statements. Also write the flip-flop with two feedback
Verilog code for the same. blocks and then Using the
assignment statements write
the verilog code for the same.
6. Explain behavioral modeling Apply The learner to Recall the CO10
for D-type latch and the use concept of D-flip flop,
of non-blocking assignment in Understand the behavioral
latch modeling. Also with the modeling of D-flip-flop and
Verilog code for each of them. then Using the non-blocking
assignment statements write
the verilog code for the same.
7. Write and explain the Verilog Apply The learner to Recall the CO10
module for positive edge concept of edge triggered flip
trigger flip-flop. flop, Understand the
operation of positive edge
triggered flip-flop and then
Using behavioral modeling
write the verilog code for the
same
8. Write a Verilog module for D Analyze The learner to Recall the CO11
flip-flop with synchronous concept of D flip flop,
control and asynchronous Understand the operation
control. And compare the of D- flip flop with
controls of both. synchronous and
asynchronous control, Using
behavioral modeling write
the verilog code and then
compare the control of both.

Page 35
9. What is function of fork-join Apply The learner to Recall the CO10
construct? Design a Verilog concept of D-flip flop,
module for D flip- flop using Understand the syntax and
this construct. function of fork-join
construct and then Using
the fork-join construct write
the verilog code for D-flip
flop.
10. Write a Verilog code for D Understanding The learner to Recall the CO10
flip-flop using assign and concept of D-flip flop,
deassign statements. Understand the syntax and
function of assign and
deassign construct and then
Using the assign and
deassign construct write the
verilog code for D-flip flop.
11. Define setup time. Write a Apply The learner to Recall the CO11
Verilog code for D flip-flop concept of setup time,
setup time. Understand the operation
of D-flip flop and then Using
the behavioral modeling
construct write the verilog
code for D-flip flop with
setup time.
12. Define hold time. Design a Apply The learner to Recall the CO11
Verilog module for D flip-flop concept of hold time,
with hold time. Understand the operation
of D-flip flop and then Using
the behavioral modeling
construct write the verilog
code for D-flip flop with hold
time.
13. Discuss about setup hold, Apply The learner to Recall the CO11
width and period checks used concept of setup hold, width
in Verilog. Write a Verilog and periodic checks
module for D flip-flop using Understand the operation
setup hold, width and period of D-flip flop and then apply
checks. the behavioral modeling to
construct the verilog code for
D-flip flop using setup hold,
width and period checks.

Page 36
14. Design a Verilog module for Apply The learner to Recall the CO10
the following, (a) 8-bit concept of D-flip flop,
transparent D-Latch (b) 8-bit Understand the operation
register with tri-state output. of D-flip flop and then Using
the behavioral modeling
construct the verilog code for
8- bit transparent D-Latch
and 8-bit register with
tri-state output.
15. How the memory Understand The learner to Recall the CO11
initialization does is carried concept of memory
out in Verilog? Explain with initialization in verilog and
the help of an example. Understand the importance
of memory initialization with
example.
16. What are the rules to be Understand The learner to Recall the CO10
followed to declare and to use concept of bidirectional lines
the bidirectional lines? in verilog and Understand
the rules to be followed to
declare and to use the
bidirectional lines.
17. Write a Verilog module for Apply The learner to Recall the CO10
PLA. concept of PLA,
Understand the operation
of construction and operation
of PLA and then apply the
behavioral modeling to
construct the verilog code for
PLA.
18. What is functional register? Apply The learner to Recall the CO10
Write and explain the Verilog concept of functional register,
module for basic shift Understand the syntax and
register? operation of functional
register and then apply the
functional register concept to
construct the verilog code for
basic shift register.

Page 37
19. Write and explain the Verilog Apply The learner to Recall the CO11
module for universal shift concept of functional register,
register. Understand the syntax and
operation of functional
register and then apply the
functional register concept to
construct the verilog code for
universal shift register.
20. Explain about shift register Apply The learner to Recall the CO10
that uses separate concept of shift register,
combinational and sequential Understand the operation
blocks. Also write a Verilog of shift register that has
code for the same. separate combinational and
sequential blocks and then
apply the behavioral
modeling concept to
construct the verilog code for
shift register.
PART-C SHORT ANSWER QUESTIONS
1. What are the types of Remember —- CO11
sequential models?
2. Explain Feedback model. Understand The learner to Recall the CO11
concept of feedback and
Understand the model of
feedback in verilog
3. Explain capacitive model. Understand The learner to Recall the CO11
concept of capacitive model
in verilog and Understand
the differences between
various feedback models.
4. Explain implicit model. Understand The learner to Recall the CO11
concept of implicit model in
verilog and Understand the
differences between various
feedback models.
5. What are the basic memory Remember —- CO11
components?
6. Explain functional register. Understand The learner to Recall the CO11
concept of functions in
verilog and Understand the
purpose of functional register.

Page 38
7. Define state machine coding. Remember —- CO11
8. How do you explain Understand The learner toRecallthe CO12
sequential synthesis? concept of synthesis in verilog
and Understand the process
of sequential synthesis.
9. What is test bench? Understand The learner to Recall the CO12
concept of test bench in
verilog and Understand the
functional verification of a
design in verilog using test
bench.
10. How to test a combinational Understand The learner to Recall the CO12
circuit. concept of test bench in
verilog and Understand the
to verify the functionality of
combinational circuits
11. What is sequential circuit Remember —- CO11
testing?
12. Discuss the differences Understand The learner to Recall the CO12
between asynchronous and concept of sequential
synchronous sequential machines and Understand
machines. the differences between
asynchronous and
synchronous sequential
machines.
13. Define design verification. Remember —- CO10
14. Define assertion verification. Remember —- CO10
15. Write a Verilog code for Apply The learner to Recall the CO10
4-binary up-down counter. concept of binary counter,
Understand the operation
of 4-bit binary up-down
counter and then apply the
behavioral modeling to
construct the verilog code for
4-bit binary up-down
counter.
16. Write a short note on Understand The learner to Recall the CO10
gray-code counter. Also concept of counter and
design a Verilog module for Understand the verilog
the same. models of gray code counter

Page 39
 17. Explain about Linear Apply The learner to Recall the CO11
feedback shift register concept of linear feedback
(LFSR) and design its Verilog shift register, Understand
module in structural model. the operation of linear
feedback shift register and
then apply the structural
modeling to construct the
verilog code for linear
feedback shift register.
18. Explain multiple input shift Apply The learner to Recall the CO10
register (MISR) with the concept of multiple input
help of a neat sketch and also shift register r, Understand
write the Verilog code for the the operation of multiple
same. input shift register and then
apply the structural
modeling to construct the
verilog code for multiple
input shift register.
19. Explain about first in first Understand The learner to Recall the CO11
out (FIFO) Queue with the concept of queue and
help of block diagram. Understand the operation
of FIFO queue with the help
of block diagram
20. Write a Verilog code for Apply The learner to Recall the CO11
FIFO Queue. concept of queue and
Understand the operation
of FIFO queue and then
apply structural modeling to
write verilog code for FIFO
queue

Course Coordinator: HOD ECE

Mr. M Narendra Reddy

Page 40