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2nd Lab Assignment - Questions

The document outlines 3 digital design assignments: 1) Design a sequence detector circuit using JK flip-flops to output a pulse whenever the input sequence "1111" appears, and test it using Multisim with oscilloscope waveforms of the clock, input, and flip-flop states. 2) Design a synchronous BCD counter using T flip-flops and verify its performance in Multisim. 3) Design a 0-99 odometer circuit using any Multisim components and show screenshots of the output at 33 count intervals. A suggested design uses 2 CNTR_4ADEC counters, 1 D flip-flop, 2 AND gates, and 1 NOT gate with 2

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0% found this document useful (0 votes)
264 views

2nd Lab Assignment - Questions

The document outlines 3 digital design assignments: 1) Design a sequence detector circuit using JK flip-flops to output a pulse whenever the input sequence "1111" appears, and test it using Multisim with oscilloscope waveforms of the clock, input, and flip-flop states. 2) Design a synchronous BCD counter using T flip-flops and verify its performance in Multisim. 3) Design a 0-99 odometer circuit using any Multisim components and show screenshots of the output at 33 count intervals. A suggested design uses 2 CNTR_4ADEC counters, 1 D flip-flop, 2 AND gates, and 1 NOT gate with 2

Uploaded by

rktiwary256034
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Assignment2 Digital Design BSDCH ZC215 HCL

Note: The submission should contain all the design steps,


1. Design a sequence detector circuit that produces an output pulse z=1 whenever the
sequence 1111 appears. Overlapping sequences are accepted; for example, if the input is
010101111110 the output is 000000001110. Realise the logic using JK flip-flop , Verify the
result using multisim and use four channel oscilloscope to show the waveforms as result.
The waveform should include the clk, IP signal and the states of the flip-flop. [4]

2. Desgin a synchronous BCD counter using T flip flop and verify its performance using
Multisim [3]

3. Design a Odometer that counts from 0 to 99. Verify the circuit using Multisim. You can use
any number of components of your choice from the MUltisim library.
Here is a list of components for hint, it is a suggestion, one can design a circuit of one’s own.
The students are required to show the screenshot of three results that shows result at an
interval of 33 counts [3]
Sl no Component Quantity
1 CNTR_4ADEC 2
2 D-flip-flop 1
3 2 input AND gates 2
4 Not Gate 1
5 Decd_Hex display 2

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