Number System and Codes: Introduction
Number System and Codes: Introduction
INTRODUCTION:-
The term digital refers to a process that is achieved by using discrete unit.
In number system there are different symbols and each symbol has an absolute value and also has
place value.
RADIX OR BASE:-
The radix or base of a number system is defined as the number of different digits which can occur in
each position in the number system.
RADIX POINT :-
The generalized form of a decimal point is known as radix point. In any positional number system the
radix point divides the integer and fractional part.
In general,
dn dn-1 dn-2 …………… d0 . d -1 d -2 …………d - m
is given by
(dn x 10n) + (dn-1 x 10n-1) + (dn-2 x 10n-2) + … + ( d0 x 100) + ( d-1 x 10 -1) + (d-2 x 10 -2) +…+(d -m x 10 –m)
For example:-
In general,
is given by
(dn x 2n) + (dn-1 x 2n-1) + (dn-2 x 2n-2) + ….+ ( d0 x 20) + ( d-1 x 2 -1) + (d-2 x 2 -2) +….+(d -k x 2 –k)
0 000 4 100
1 001 5 101
2 010 6 110
3 011 7 111
For example:
Group of 3 bits are 101 111 010 110 . 110 110 011
Convert each group into octal = 5 7 2 6 . 6 6 3
The result is (5726.663)8
(ii) Convert (10101111001.0111)2 into octal.
Solution :
Binary number 10 101 111 001 . 011 1
Group of 3 bits are = 010 101 111 001 . 011 100
Convert each group into octal = 2 5 7 1 . 3 4
The result is (2571.34)8
(c) Binary to Hexadecimal conversion:-
For conversion binary to hexadecimal number the binary numbers starting from the binary point, groups are
made of 4 bits each, on either side of the binary point.
Hexadecimal Binary Hexadecimal Binary
0 0000 8 1000
1 0001 9 1001
2 0010 A 1010
3 0011 B 1011
4 0100 C 1100
5 0101 D 1101
6 0110 E 1110
7 0111 F 1111
For example:
(i) Convert (1011011011)2 into hexadecimal.
Solution:
Given Binary number 10 1101 1011
Group of 4 bits are 0010 1101 1011
Convert each group into hex = 2 D B
The result is (2DB)16
(ii) Convert (01011111011.011111)2 into hexadecimal.
Solution:
Given Binary number 010 1111 1011 . 0111 11
Group of 3 bits are = 0010 1111 1011 . 0111 1100
Convert each group into octal = 2 F B . 7 C
The result is (2FB.7C)16
2. DECIMAL NUMBER SYSTEM:-
For example:
(i) Convert (378.93)10 into octal.
Solution:
8 I 378 0.93 x 8 = 7.44
8 l 47 ― 2 0.44 x 8 = 3.52
8l 5 ― 7 0.52 x 8 = 4.16
0 ― 5 0.16 x 8 = 1.28
For example:
(i) Convert (2598.675)10 into hexadecimal.
Solution:
Remainder
Decimal Hex Hex
16 I 2598 0.675 x 16 = 10.8 A
16 l 162 ― 6 6 0.800 x 16 = 12.8 C
16 l 10 ― 2 2 0.800 x 16 = 12.8 C
0 ― 10 A 0.800 x 16 = 12.8 C
For example: -
Convert (4057.06) 8 to decimal
Solution:
(4057.06) 8 = 4 x 83 + 0 x 82 + 5 x 81 + 7 x 80 + 0 x 8 – 1 + 6 x 8- 2
= 2048 + 0 + 40 + 7 + 0 +0.0937
= (2095. 0937)10
Result is (2095.0937)10
(c) Octal to hexadecimal conversion:-
For conversion of octal to Hexadecimal, first convert the given octal number to binary and then binary
number to hexadecimal.
For example :-
Convert (756.603)8 to hexadecimal.
Solution :-
Given octal no. 7 5 6 . 6 0 3
Convert each octal digit to binary = 111 101 110 . 110 000 011
Group of 4bits are = 0001 1110 1110 . 1100 0001 1000
Convert 4 bits group to hex. = 1 E E . C 1 8
Result is (1EE.C18)16
For example:
Convert (3A9E.B0D)16 into binary.
Solution:
Given Hexadecimal number is 3 A 9 E . B 0 D
Convert each hexadecimal = 0011 1010 1001 1110 . 1011 0000 1101
digit to 4 bit binary
For example: -
Convert (A0F9.0EB)16 to decimal
Solution:
(A0F9.0EB)16 = (10 x 163 )+(0 x 162 )+(15 x 161 ) +( 9 x 160 ) +(0 x 16 – 1) +(14 x 16- 2) +(11 x 16-3)
= 40960 + 0 + 240 + 9 + 0 +0.0546 + 0.0026
= (41209.0572)10
Result is (41209.0572)10
(c) Hexadecimal to Octal conversion:-
For conversion of hexadecimal to octal, first convert the given hexadecimal number to binary and then
binary number to octal.
For example :-
Convert (B9F.AE)16 to octal.
Solution :-
Given hexadecimal no.is B 9 F . A E
Convert each hex. digit to binary = 1011 1001 1111 . 1010 1110
Group of 3 bits are = 101 110 011 111 . 101 011 100
Convert 3 bits group to octal. = 5 6 3 7 . 5 3 4
Result is (5637.534)8
For example :-
100101
+ 1101111
10010100
Result is (10010100)2
2. BINARY SUBTRACTION:-
The binary subtraction rules are as follows
0 - 0 = 0 ; 1 - 1 = 0 ; 1 - 0 = 1 ; 0 - 1 = 1 , with a borrow of 1
For example :-
Substract (111.111)2 from (1010.01)2.
Solution :-
1010.010
- 111 .111
0 0 1 0 .0 1 1
Result is (0010.011)2
3. BINARY MULTIPLICATION:-
The binary multiplication rules are as follows
0x0=0;1x1=1;1x 0=0;0 x1=0
For example :-
1101
x 1 1 0___
0000
1101
+ 1 1 0 1_____
1 0 0 1 1 1 0__
Result is (1001110)2
4. BINARY DIVISION:-
The binary division is very simple and similar to decimal number system. The division by ‘0’ is meaningless.
So we have only 2 rules
0÷1=0
1÷1=1
For example :-
Divide (10110)2 by (110)2.
Solution :-
For example :-
Find (1100)2 1’s complement.
Solution :-
Given 1 1 0 0
1’s complement is 0 0 1 1
Result is (0011)2
For example:-
0 1 0 1 0 0 1 = +41
↑
Sign bit
1 1 0 1 0 0 1 = -41
↑
Sign bit
Result is +10
2’s COMPLEMENT:-
In 2’s complement subtraction, add the 2’s complement of subtrahend to the minuend. If there is a carry out,
ignore it. If the MSB is 0, the result is positive. If the MSB is 1, the result is negative and is in its 2‘s
complement form. Then take its 2’s complement to get the magnitude in binary.
For example:-
Subtract (1010100)2 from (1010100)2 using 2’s complement.
Solution:-
1010100 1010100 = 84
- 1010100 => + 0 1 0 1 1 0 0 (2’s complement) = - 84_
1 0 0 0 0 0 0 0 ( Ignore the carry) 0
= 0 (result = 0)
Hence MSB is 0. The answer is positive. So it is +0000000 = 0
DIGITAL CODES:-
In practice the digital electronics requires to handle data which may be numeric, alphabets and special
characters. This requires the conversion of the incoming data into binary format before it can be processed.
There is various possible ways of doing this and this process is called encoding. To achieve the reverse of it,
we use decoders.
Non-weighted codes are codes which are not assigned with any weight to each digit position, i.e., each digit
position within the number is not assigned fixed value.
Example:- Excess – 3 (XS -3) code and Gray codes
BCD ADDITION:-
Addition of BCD (8421) is performed by adding two digits of binary, starting from least significant digit. In case if
the result is an illegal code (greater than 9) or if there is a carry out of one then add 0110(6) and add the
resulting carry to the next most significant.
For example:-
Add 679.6 from 536.8 using BCD addition.
Solution:-
6 7 9.6 0110 0111 1001 . 0110 ( 679.6 in BCD)
+ 5 3 6.8 =>+ 0101 0011 0110 . 1000 (536.8 in BCD)
1 21 6.4 1011 1010 1111 . 1110 ( All are illegal codes)
+ 0110 +0110 +0110 .+0110 ( Add 0110 to each)
0001 0010 0001 0110 . 0100
1 2 1 6 . 4 ( corrected sum = 1216.4)
Result is 1216.4
BCD SUBTRACTION:-
The BCD subtraction is performed by subtracting the digits of each 4 – bit group of the subtrahend from
corresponding 4 – bit group of the minuend in the binary starting from the LSD. If there is no borrow from the
next higher group[ then no correction is required. If there is a borrow from the next group, then 610 (0110) is
subtracted from the difference term of this group.
For example:-
Subtract 147.8 from 206.7 using 8421 BCD code.
Solution:-
2 0 6.7 0010 0000 0110 . 0111 ( 206.7 in BCD)
- 1 4 7.8 =>- 0001 0100 0111 . 1000 (147.8 in BCD)
5 8.9 0000 1011 1110 . 1111 ( Borrows are present)
- 0110 -0110 .- 0110
0101 1000 . 1001
5 8 . 9 ( corrected difference = 58.9)
Result is (58.9)10
EXCESS THREE(XS-3) CODE:-
The Excess-3 code, also called XS-3, is a non- weighted BCD code. This derives it name from the fact that
each binary code word is the corresponding 8421 code word plus 0011(3). It is a sequential code. It is a self
complementing code.
XS-3 ADDITION:-
In XS-3 addition, add the XS-3 numbers by adding the 4 bit groups in each column starting from the LSD. If
there is no carry out from the addition of any of the 4 bit groups, subtract 0011 from the sum term of those
groups. If there is a carry out, add 0011 to the sum term of those groups
For example:-
Add 37 and 28 using XS-3 code.
Solution:-
3 7 0110 1010 ( 37 in XS-3)
+ 2 8 => + 0101 1011 ( 28 in XS-3)
6 5 1011 11010 ( Carry is generated)
+ 1_______ ( Propagate carry)
1100 0101 ( Add 0110 to correct 0101 and
- 0011 +0011 subtract 0011 to correct 1100)
1001 1000 ( Corrected sum in XS-3 = 6510)
XS-3 SUBTRACTION:-
To subtract in XS-3 number by subtracting each 4-bit group of the subtrahend from the corresponding 4-bit
group of the minuend starting from the LSD. If there is no borrow from the next 4-bit group. add 0011 to the
difference term of such groups. If there is a borrow, subtract 0011 from the difference term.
For example :-
. Subtract 175 from 267 using XS-3 code.
Solution :-`
267 0101 1010 1010 ( 267 in XS-3)
-175 => - 0100 1010 1000 ( 175 in XS-3)
092 0000 1111 0010 (Correct 0010 and 0000 by adding 0011 and
+0011 -0011 +0011 correct 1111 by subtracting 0011)
0011 1100 0101 (Corrected difference in XS-3 = 9210 )
ASCII CODE:-
The American Standard Code for Information Interchange (ASCII) pronounced as ‘ASKEE’ is widely used
alphanumeric code. This is basically a 7 bit code. The number of different bit patterns that can be created with
7 bits is 27 = 128 , the ASCII can be used to encode both the uppercase and lowercase characters of the
alphabet (52 symbols) and some special symbols in addition to the 10 decimal digits. It is used extensively
for printers and terminals that interface with small computer systems. The table shown below shows the ASCII
groups.
LSBs MSBs
Gray code is used in instrumentation and data acquisition systems where linear or angular
displacement is measured. They are also used in shaft encoders, I/O devices, A/D converters and other
peripheral equipment.
For example :-
Convert the binary 1001 to the Gray code.
Solution :-`
Binary → 1 0 0 1
Gray → 1 1 0 1
If an n-bit gray number is represented by Gn Gn-1 ------- G1 and its binary equivalent by Bn Bn-1 - - - - - B1,
then binary bits are obtained from Gray bits as follows :
Bn = Gn
Bn-1 = Bn Gn-1
.
.
.
.
B1 = B2 G1
For example :-
Convert the Gray code 1101 to the binary.
Solution :-
Gray → 1 1 0 1
Binary→ 1 0 0 1
The binary code is 1001
LOGIC GATES
LOGIC GATES:-
Logic gates are the fundamental building blocks of digital systems.
There are 3 basic types of gates AND, OR and NOT.
Logic gates are electronic circuits because they are made up of a number of electronic devices and
components.
Inputs and outputs of logic gates can occur only in 2 levels. These two levels are termed HIGH and
LOW, or TRUE and FALSE, or ON and OFF or simply si 1 and 0.
The table which lists all the possible combinations of input variables and the corresponding outputs is
called a truth table.
LEVEL LOGIC:-
A logic in which the voltage levels represents logic 1 and logic 0. Level logic may be positive or neg
negative logic.
Positive Logic:-
A positive logic system is the one in which the higher of the two voltage levels represents the logic 1 and the
lower of the two voltages level represents the logic 0.
Negative Logic:-
A negative logic system is the one in which
which the lower of the two voltage levels represents the logic 1 and the
higher of the two voltages level represents the logic 0.
DIFFERENT TYPES OF LOGIC GATES:-
GATES
NOT GATE (INVERTER):-
A NOT gate, also called and inverter, has only one input and one output.
Itt is a device whose output is always the complement of its input.
The output of a NOT gate is the logic 1 state when its input is in logic 0 state and the logic 0 state when
its inputs is in logic 1 state.
IC No. :- 7404
INPUT OUTPUT
A A
0 1
1 0
Timing Diagram
1 0 0 1
0 1 1 0
AND GATE:-
An AND gate has two or more inputs but only one output.
The output is logic 1 state only
nly when each one of its inputs is at logic 1 state.
The output is logic 0 state even if one of its inputs is at logic 0 state.
IC No.:- 7408
Logic Symbol Truth Table
OUTPUT
A B Q=A . B
0 0 0
Timing Diagram
0 1 0
0 0 1 1
1 0 0
A 1 1 1
0 1 0 1
0 0 0 1
OR GATE:-
An OR gate may have two or more inputs but only one output.
The output is logic 1 state, even if one
on of its input is in logic 1 state.
The output is logic 0 state, only when each one of its inputs is in logic state.
IC No.:- 7432
Logic Symbol Truth Table
INPUT OUTPUT
A B Q=A + B
0 0 0
0 1 1
1 0 1
Timing Diagram 1 1 1
0 0 1 1
0 1 0 1
0 1 1 1
Q
NAND GATE:-
NAND gate is a combination of an AND gate and a NOT gate.
The output is logic 0 when each of the input is logic 1 and for any other co
combination of inputs, the
output is logic 1.
IC No.:- 7400 two input NAND gate
7410 three input NAND gate
7420 four input NAND gate
7430 eight input NAND gate
INPUT OUTPUT
A B Q= A.B
0 0 1
0 1 1
1 0 1
Timing Diagram
1 1 0
0 0 1 1
0 1 0 1
1 1 1 0
NOR GATE:-
NOR gate is a combination of an OR gate and a NOT gate.
The output is logic 1, only when each one of its input is logic 0 and for any other combination of inp
inputs,
the output is a logic 0 level.
INPUT OUTPUT
A B Q= A + B
0 0 1
0 1 0
1 0 0
1 1 0
Timing Diagram
0 0 1 1
0 1 0 1
1 0 0 0
EXCLUSIVE – OR (X-OR)
OR) GATE:-
GATE
An X-OR
OR gate is a two input, one output logic circuit.
The output is logic 1 when one and only one of its two inputs is logic 1. When both the inputs is logic 0
or when both the inputs is logic 1, the output is logic 0.
IC No.:- 7486
INPUT OUTPUT
A B Q=A B
0 0 0
INPUTS are A and B
0 1 1
OUTPUT is Q = A B 1 0 1
=AB+AB 1 1 0
Timing Diagram
0 0 1 1
0 1 0 1
0 1 1 0
Logic Symbol
INPUT OUTPUT
A B OUT =A XNOR B
0 0 1
0 1 0
1 0 0
OUT =A B + A B
1 1 1
= A XNOR B
Timing Diagram
0 0 1 1
0 1 0 1
1 0 0 1
OUT
UNIVERSAL GATES:-
There are 3 basic gates AND, OR and NOT, there are two universal gates NAND and NOR, each of which can
realize logic circuits single handedly.
dly. The NAND and NOR gates are called universal building blocks. Both
NAND and NOR gates can perform all logic functions i.e. AND, OR, NOT, EXOR and EXNOR.
NAND GATE:-
a) Inverter from NAND gate
Input =A
Output Q = A
NOR GATE:-
a) Inverter from NOR gate
Input =A
Output Q = A
THRESHOLD LOGIC:-
INTRODUCTION:-
The threshold element, nt, also called the threshold gate (T-gate)
(T gate) is a much more powerful device than any
of the conventional logic gates such as NAND, NOR and others.
Complex, large Boolean functions can be realized using much fewer threshold gates.
Frequently a single threshold ld gate can realize a very complex function which otherwise might require a
large number of conventional gates.
T-gate
gate offers incomparably economical realization; it has not found extensive use with the digital system
designers mainly because of the following
follow limitations.
1. It is very sensitive to parameter variations.
2. It is difficult to fabricate it in IC form.
BOOLEAN ALGEBRA
INTRODUCTION:-
Switching circuits are also called logic circuits, gates circuits and digital circuits.
Switching algebra is also called Boolean algebra.
Boolean algebra is a system of mathematical logic. It is an algebraic system consisting of the set of
elements (0,1), two binary operators called OR and AND and unary operator called NOT.
It is the basic mathematical tool in the analysis and synthesis of switching circuits.
It is a way to express logic functions algebraically.
Any complex logic can be expressed by a Boolean function.
The Boolean algebra is governed by certain well developed rules and laws.
Axioms or postulates of Boolean algebra are set of logical expressions that are accepted without proof and
upon which we can build a set of useful theorems. Actually, axioms are nothing more than the definitions of the
three basic logic operations AND, OR and INVERTER. Each axiom can be interpreted as the outcome of an
operation performed by a logic gate.
1. Complementation Laws:-
The term complement simply means to invert, i.e. to changes 0s to 1s and 1s to 0s. The five laws of
complementation are as follows:
Law 1: 0 = 1
Law 2: 1 = 0
Law 3: if A = 0, then A = 1
Law 4: if A = 1,thenA = 0
Law 5: A = 0 (double complementation law)
2. OR Laws:-
The four OR laws are as follows
Law 1: A + 0 = 0(Null law)
Law 2: A + 1 = 1(Identity law)
Law 3: A + A = A
Law 4: A +A = 1
3. AND Laws:-
The four AND laws are as follows
Law 1: A . 0 = 0(Null law)
Law 2: A . 1 = 1(Identity law)
Law 3: A . A = A
Law 4: A .A = 0
4. Commutative Laws:-
Commutative laws allow change in position of AND or OR variables. There are two commutative laws.
Law 1: A + B = B + A
Proof
A B A+B B A B+ A
0 0 0 0 0 0
0 1 1 = 0 1 1
1 0 1 1 0 1
1 1 1 1 1 1
Law 2: A . B = B . A
Proof
A B A.B B A B. A
0 0 0 0 0 0
0 1 0 = 0 1 0
1 0 0 1 0 0
1 1 1 1 1 1
5. Associative Laws:-
The associative laws allow grouping of variables. There are 2 associative laws.
Law 1: (A + B) + C = A + (B + C)
Proof
0 1 0 1 1 0 1 0 1 1
=
0 1 1 1 1 0 1 1 1 1
1 0 0 1 1 1 0 0 0 1
1 0 1 1 1 1 0 1 1 1
1 1 0 1 1 1 1 0 1 1
1 1 1 1 1 1 1 1 1 1
Law 2: (A .B) C = A (B .C)
Proof
A B C AB (AB)C A B C B.C A(B.C)
0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 1 0 0
0 1 0 0 0 0 1 0 0 0
=
0 1 1 0 0 0 1 1 1 0
1 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 1 0 0
1 1 0 1 0 1 1 0 0 0
1 1 1 1 1 1 1 1 1 1
Proof
A B C B+C A(B+C) A B C AB AC A+(B+C)
0 0 0 0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 1 0 0 0
0 1 0 1 0 0 1 0 0 0 0
0 1 1 1 0 = 0 1 1 0 0 0
1 0 0 0 0 1 0 0 0 0 0
1 0 1 1 1 1 0 1 0 1 1
1 1 0 1 1 1 1 0 1 0 1
1 1 1 1 1 1 1 1 1 1 1
Law 2: A(A + B) = AB
Proof
A(A + B) = AA + AB
= 0 + AB
= AB
8. Idempotence Laws:-
Idempotence means same value.
Law 1: A. A = A
Proof
If A = 0, then A. A = 0. 0 =0 = A
If A = 1, then A. A = 1. 1 = 1 = A
This law states that AND of a variable with itself is equal to that variable only.
Law 2: A + A = A
Proof
If A = 0, then A + A = 0 + 0 = 0 = A
If A = 1, then A + A = 1 + 1 = 1 = A
This law states that OR of a variable with itself is equal to that variable only.
9. Absorption Laws:-
There are two laws:
Law 1: A + A ∙ B = A A B AB A+AB
Proof
A + A ∙ B = A (1 + B) = A ∙ 1 = A 0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
Law 2: A ( A + B) = A
Proof
A ( A + B) = A ∙ A + A ∙ B = A + AB = A(1 + B) = A ∙ 1 = A
A B A+B A(A+B)
0 0 0 0
0 1 1 0
1 0 1 1
1 1 1 1
10. Consensus Theorem (Included Factor Theorem):-
Theorem 1:
AB +AC + BC = AB +AC
Proof
LHS = AB + AC + BC
= AB + AC + BC (A+A)
= AB + AC + BCA + BCA
= AB (1 + C) + AC (1+ B)
=AB (1) +AC (1)
= AB + AC
= RHS
Theorem 2:
(A + B)(A + C)(B + C) =(A +B)(A + C)
Proof
LHS = (A + B) (A + C) (B + C)
= (AA + AC + BA + BC) (B + C)
= (AC + BC +AB) (B + C)
= ABC + BC + AB + AC + BC+ABC
= AC + BC +AB
RHS= (A + B) (A+C)
= AA + AC + BC +AB
= AC + BC +AB
= LHS
11. Transposition Theorem:-
Theorem:
AB + AC = (A + C)(A + B)
Proof
RHS= (A + C) (A + B)
= AA + CA + AB + CB
= 0 +AC + AB + BC
= AC + AB + BC ( A+A)
= AB + ABC + AC +ABC
= AB + AC
= LHS
Law 1: A + B =A∙ B
Proof
A B A B A B
A B A+B A+B
0 0 0 1 0 0 1 1 1
0 1 1 0 = 0 1 1 0 0
1 0 1 0 1 0 0 1 0
1 1 1 0 1 1 0 0 0
This law states that the complement of a sum of variables is equal to the product of their individual
complements.
Law 2: A∙ B = A + B
Proof
DUALITY:-
The implication of the duality concept is that once a theorem or statement is proved, the dual also thus stand
proved. This is called the principle of duality.
[f (A, B, C,…..,0, 1, +, ∙)]d = f( A, B, C, …., 1, 0, ∙, +)
Relations between complement and dual
fc (A, B, C, …..) = f (A, B, C, …..) = fd (A, B, C,…)
The first relation states that the complement of a function f(A, B, C, …) can be obtained by complementing all
the variables in the dual function fd (A, B, C, …..).
The second relation states that the dual can be obtained by complementing all the literals in
f (A, B, C, ….).
DUALS:-
Given expression Dual
1. 0=1 1=0
2. 0 ∙1 = 0 1+0=1
3. 0 ∙0 = 0 1+1=1
4. 1 ∙1 = 1 0+0=0
5. A∙0=0 A+1=1
6. A∙1=A A+0=A
7. A∙A=A A+A=A
8. A∙A=0 A+A=1
9. A∙B=B∙A A + B = B+ A
10. A ∙ ( B ∙ C)=( A ∙ B) ∙ C A + ( B + C)=( A + B) + C
11. A ∙ (B + C) = AB + AC A + BC = ( A + B) (A + C)
12. A( A + B ) = A A + AB = A
13. A ∙ ( A ∙ B) = A ∙ B A+ A+B=A+B
14. AB = A + B A+B= AB
15. ( A + B) ( A+ C) (B + C) = ( A+ B )(A + C) AB + AC + BC = AB + AC
16. A + BC = ( A + B )(A + C) A( B+ C) = A B +A C
17. (A+C)(A+B) = AB+AC AC+AB=(A+B) (A+C)
18. (A+B)(C+D) = AC + AD + BC + BD (AB+CD) = (A+C)(A+D)(B+C)(B+D)
19. A + B = AB + AB + AB AB =(A+B) (A+B) (A+B)
20. AB + A + AB = 0 A + B ∙ A ∙ (A + B) = 1
SUM - OF - PRODUCTS FORM:-
This is also called disjunctive Canonical Form (DCF) or Expanded Sum of Products Form or Canonical
Sum of Products Form.
In this form, the function is the sum of a number of products terms where each product term contains all
variables of the function either in complemented or uncomplemented form.
This can also be derived from the truth table by finding the sum of all the terms that corresponds to
those combinations for which ‘f ’ assumes the value 1.
For example
f( A, B, C) = AB + BC
= AB (C + C) + BC (A + A)
= A BC + ABC + ABC + ABC
The product term which contains all the variables of the functions either in complemented or
uncomplemented form is called a minterm.
The minterm is denoted as mo, m1, m2 … .
An ‘n’ variable function can have 2n minterms.
Another way of representing the function in canonical SOP form is the showing the sum of minterms for
which the function equals to 1.
For example
f ( A, B, C) = m1 + m2+ m3 + m5
or
f (A, B, C) =∑ m (1, 2, 3, 5)
where ∑m represents the sum of all the minterms whose decimal codes are given the parenthesis.
The complement of a function expressed as the sum of minterms equals the sum of minterms missing from the
original function.
Example:-
f(A, B, C) = ∑m( 0,2,4,6,7)
This has a complement that can be expressed as
f (A, B, C) =∑ m(1, 3, 5) = m1 + m3 + m5
If we complement f by De- Morgan’s theorem we obtain ‘f’ in a form.
f =(m1+ m3 + m5) = m1. m3. m5
= M1 M3 M5 =∏ M(1, 3 ,5)
Example:-
Expand A (A + B) (A + B + C) to maxterms and minterms.
Solution:-
In POS form
A( A + B) (A + B + C)
A = A + B B + CC
= (A + B) ( A +B) + C∙C
= (A + B + CC) (A + B + C C)
= (A + B + C) (A + B +C) (A + B + C) (A + B + C)
A + B = A + B + C∙C
= (A + B + C) (A + B + C)
Therefore
A( A + B)(A + B + C)
= (A + B + C) (A + B +C) (A + B + C) (A +B +C) (A + B + C) (A + B + C)
= (000) (001) (010) (011) (100) (101)
= M0 ∙ M1 ∙ M2 ∙ M3 ∙ M4 ∙ M5
=∏ M( 0, 1, 2, 3, 4,5)
The maxterms M6 and M7 are missing in the POS form.
So, the SOP form will contain the minterms 6 and 7
KARNAUGH MAP OR K- MAP:-
The K- map is a chart or a graph, composed of an arrangement of adjacent cells, each representing a
particular combination of variables in sum or product form.
The K- map is systematic method of simplifying the Boolean expression.
0 A B AB
A
1 AB AB
Example:-
Map expression f= AB + AB
Solution:-
The expression minterms is
F = m1 + m2 = m( 1, 2)
B
0 1
0 1
0 0 1
A 2 3
1 1 0
Minimization of SOP Expression:-
To minimize a Boolean expression given in the SOP form by using K- K map, the adjacent squares having 1s,
that is minterms adjacent to each other are combined to form larger squares to eliminate some variables.
The possible minterm grouping in a two variable K-
K map are shown below
Two minterms, which are adjacent to each other, can be combined to form a bigger square called 2 –
square or a pair. This eliminates one variable
variable that is not common to both the minterms.
Two 2-squares
squares adjacent to each other can be combined to form a 4- 4 square. A 44- square eliminates 2
variables. A 4-square
square is called a quad.
Consider only those variables which remain constant throughout the square,
square, and ignore the variables
which are varying. The non-complemented variable is the variable remaining constant as 1.The
complemented variable is the variable remaining constant as a 0 and the variables are written as a
product term.
Example:-
Reduce
ce the expression f= AB + A B + AB using mapping.
Solution:-
Expressed
xpressed in terms of minterms, the given expression is
f = m0 + m1 + m3 = ∑m ( 0, 1, 3)
F=A+B
Mapping of POS Expression:-
Example:-
Plot the expression f= (A + B)(A + B)(A + B)
Solution:-
Expression interms of maxterms is f = πM (0, 2, 3)
Example:-
Map the expression f = ABC+ABC + ABC + ABC +ABC
Solution:-
So in the SOP form the expression is f = ∑ m (1, 5, 2, 6, 7)
Example:-
Map the expression f = (A + B + C) (A + B+C) (A + B + C) (A + B + C) (A + B + C)
Solution:-
So in the POS form the expression is f = π M (0, 5, 7, 3, 6)
Minimization of SOP and POS Expressions:-
Expressions
For reducing the Boolean expressions in SOP (POS) form the following steps are given below
Draw the K-map map and place 1s (0s)
(0s) corresponding to the minterms (maxterms) of the SOP (POS)
expression.
In the map 1s (0s) which are not adjacent to any other 1(0) are the isolated minterms (maxterms). They
are to be read as they are because they cannot
can be combined even into a 2-square
square.
For those 1s (0s) which are adjacent to only one other 1(0) make them pairs (2 squares).
For quads (4- squares) and octet (8 squares) of adjacent 1s (0s) even if they contain some 1s (0s)
which have already been combined. They must geometrically form a square
square or a rectangle.
For any 1s (0s) that have not been combined yet then combine them into bigger squares if possible.
Form the minimal expression by summing (multiplying) the product (sum) terms of all the groups.
These possible combinations are also for POS but 1s are replaced by 0s.
POS FORM
A standard SOP expression with don’t cares can be converted into standard
standard POS form by keeping the
don’t cares as they are, and the missing minterms of the SOP form are written as the maxterms of the POS
form. Similarly, to convert a standard POS expression with don’t cares can be converted into standard SOP
form by keeping thehe don’t cares as they are, and the missing maxterms of the POS form are written as the
minterms of the SOP form.
Example:-
Reduce the expression f = ∑ m(1, 5, 6, 12, 13, 14) + d(2, 4) using K-K map.
Solution:-
The given expression in SOP form is f = ∑ m (1, 5, 6, 12, 13, 14) + d(2, 4)
The given expression in POS form is f = π M (0, 3, 7, 8, 9, 10, 11,15) + d(2, 4)