Intel Cpus
Intel Cpus
4004 – CPU
4001 – ROM & 4-bit Port
4002 – RAM & 4-bit Port
4003 – 10-bit Shift Register
4008 – Memory+I/O Interface
4009 – Memory+I/O Interface
4211 – General Purpose Byte I/O Port
4265 – Programmable General Purpose I/O Device
4269 – Programmable Keyboard Display Device
4289 – Standard Memory Interface for MCS-4/40
4308 – 8192-bit (1024 × 8) ROM w/ 4-bit I/O Ports
4316 – 16384-bit (2048 × 8) Static ROM
4702 – 2048-bit (256 × 8) EPROM
4801 – 5.185 MHz Clock Generator Crystal for 4004/4201A or 4040/4201A
Intel C4040
Intel 4040
Introduced in 1974 by Intel
Clock speed was 740 kHz (same as the 4004 microprocessor)
3,000 transistors
Interrupt features were available
Programmable memory size: 8 KB (8192 B)
640 bytes of data memory
24-pin DIP
The 8-bit processors
Intel D8008
8008
Introduced April 1, 1972
Clock rate 500 kHz (8008-1: 800 kHz)
0.05 MIPS
Bus width: 8 bits (multiplexed address/data due to limited pins)
Enhancement load PMOS logic
3,500 transistors at 10 μm
Addressable memory 16 KB
Typical in early 8-bit microcomputers, dumb terminals, general calculators,
bottling machines
Developed in tandem with 4004
Originally intended for use in the Datapoint 2200 microcomputer
Key volume deployment in Texas Instruments 742 microcomputer in >3,000 Ford
dealerships
Intel D8080
8080
Introduced April 1, 1974
Clock rate 2 MHz (very rare 8080B: 3 MHz)
0.29 MIPS[3]
Data bus width: 8 bits, address bus: 16 bits
Enhancement load NMOS logic
4,500 transistors at 6 μm
Assembly language downward compatible with 8008
Addressable memory 64 KB (64 × 1024 B)
Up to 10× the performance of the 8008
Used in e.g. the Altair 8800, traffic light controller, cruise missile
Required six support chips versus 20 for the 8008
Intel D8085A
Intel P8048H
Intel 8048
Single accumulator Harvard architecture
MCS-48 family:
Intel P8051
Intel 8051
Single accumulator Harvard architecture
MCS-51 family:
Intel D3002
Introduced in the third quarter of 1974, these bit-slicing components used bipolar
Schottky transistors. Each component implemented two bits of a processor function;
packages could be interconnected to build a processor with any desired word length.
Members of the family:
Intel D8088
8088
Introduced June 1, 1979
Clock rates:
4.77 MHz, 0.33 MIPS
8 MHz, 0.66 MIPS[4]
16-bit internal architecture
External data bus width: 8 bits, address bus: 20 bits
29,000 transistors at 3 μm
Addressable memory 1 megabyte
Identical to 8086 except for its 8-bit external bus (hence an 8 instead of a 6 at
the end); identical Execution Unit (EU), different Bus Interface Unit (BIU)[7]
Used in IBM PC and PC-XT and compatibles
Later renamed the iAPX 88[7]
Intel 80386DX
Intel 80386EX
80386EX
Introduced August 1994
Variant of 80386SX intended for embedded systems
Static core (i.e. may run as slowly (and thus, power efficiently) as desired) down
to full halt
On-chip peripherals:
Clock and power management
Timers/counters
Watchdog timer
Serial I/O units (sync and async) and parallel I/O
DMA
RAM refresh
JTAG test logic
Significantly more successful than the 80376
Used aboard several orbiting satellites and microsatellites
Used in NASA's FlightLinux project
32-bit processors: the 80486 range
Intel 80486SL
80486SL
Introduced November 9, 1992
Clock rates:
20 MHz, 15.4 MIPS
25 MHz, 19 MIPS
33 MHz, 25 MIPS
Bus width: 32 bits
1.4 million transistors at 0.8 μm
Addressable memory 4 GB
Virtual memory 64 TB
Officially named Intel486 SL
Used in notebook computers
Family 4 model 4