Instruction Format in 8086

The instruction format of 8086 has one or more number of fields associated with it.
The first filled is called operation code field or opcode field, which indicates the
type of operation. The instruction format also contains other fields known as
operand fields.
There are six general formats of instructions in 8086 instruction set. The length of an
instruction may vary from one byte to six bytes.
8086(Machine Language Instruction Formats)
•A machine language instruction format has one or more number of fields associated with
it.
•The first field is called as operation code field or op-code field, which indicates the type
of operation to be performed by the CPU
•The instruction format also contains other fields known as operand fields
•The CPU executes the instruction using the information which reside in these fields
•There are six general formats of instructions in 8086 instructions set.
•The length of an instruction may vary from 1 byte to 6 bytes. The instruction formats are
described as follows

1 One Byte Instruction:

•This format is only one byte long and may have the implied data or register operands.
•The least significant 3-bits of the opcode are used for specifying the register operand, if
any.
•Otherwise, all the 8 bits form an opcode and the operands are implied
Eg: CLC : clear carry

2 Register to Register:
•This format is 2 bytes long
•The first byte of the code specifies the operation code and width of the operand specified
by ‘w’ bit.
•The second byte of the code shows the register operands and R/M field, as shown below
The register represented by the REG field is one of the operands.
•The R/M field specifies another register or memory location i.e. the other operand.
For example:
 MOV: data transfer operation from Register to Register.
MOV CL, AL, i.e

3. Register to/from memory with no displacement:•This format is also 2 bytes long and
similar to the Register to Register format except for the MOD field as shown.

4. Register to/from Memory with Displacement:

•This type of instruction format contains 1 or 2 additional bytes for displacement along
with 2 byte format of the register to/from memory without displacement. The format is as
shown below.

5 Immediate Operand to Register:

•In this format, the first byte as well as the 3-bits from the second byte which are used
for REG field in case of register to register format are used for opcode.
•It also contains one or two bytes of immediate data. The complete instruction format is as
shown below.
6. Immediate Operand to Memory with 16-bit displacement:
•This type of instruction format requires 5 or 6 bytes for coding.
•The first 2 bytes contain the information regarding OPCODE, MOD and R/M fields. The
remaining 4 bytes contain 2 bytes of displacement and 2 bytes of data as shown.

 The Opcode stands for Operation Code. Every Instruction has a unique 6-bit opcode.
For example, the opcode for MOV is 100010.
 D stands for direction
If D=0, then the direction is from the register
If D=1, then the direction is to the register
 W stands for word
If W=0, then only a byte is being transferred, i.e. 8 bits
If W=1, them a whole word is being transferred, i.e. 16 bits
  The MOD and R/M together is calculated based upon the addressing mode and
register being used in it. This is calculated as follows:
 REG stands for register selected. It is a 3-bit code which is calculated as follows:
REG Code Register Selected
000 AL AX
001 CL CX
010 DL DX
011 BL BX
100 AH SP
101 CH BP
110 DH SI
111 BH DI

R/M 0 0 01 10 11
(Memory Mode with (Memory mode with 8 (Memory Mode with 16 (Register
no displacement) bit displacement) bit displacement) Mode)
000 [BX] + [SI] [BX] + [SI] + d8 [BX] + [SI] + d16 AL AX
001 [BX] + [DI] [BX] + [DI] + d8 [BX] + [DI] + d16 CL CX
010 [BP] + [SI] [BP] + [SI] + d8 [BP] + [SI] + d16 DL DX
011 [BP] + [DI] [BP] + [DI] + d8 [BP] + [DI] + d16 BL BX
100 [SI] [SI] + d8 [SI] + d16 AH SP
101 [DI] [DI] + d8 [DI] + d16 CH BP
110 d16 (direct) [BP] + d8 [BP] + d16 DH SI
111 [BX] [BX] + d8 [BX] + d16 BH DI

Find the instruction format of the following instruction:

MOV BL , AL
(The opcode of MOV instruction is 100010)

Solution:

We are given opcode for MOV = 100010

The value of D = 0
(as the value is being fetched from the register)
 The value of W = 0
(as only a byte, i.e. 8 bits are being used)

The MOD here is 1 1

(as the mode is register mode)

The value of REG is 0 0 0 (for register AL)

The value of R/M is 0 1 1
(as the register BL is being used in the register mode)

There is no displacement present in the instruction.

So, the instruction format for the given instruction is:
10001000 11000011

Q2. The opcode of ADD instruction is 000000. Find the instruction format for
the following instructions:
i. ADD AX , [BX]
ii. ADD AL , [2345H]

Solution:

i. Given instruction is : ADD AX , [BX]

Here, opcode = 000000
D = 1 (as the data is being transferred to the
register)
W = 1 (as the processing is being done on 16
bits of data)
MOD = 0 0 (because [BX] represents Memory mode with no
displacement)
REG = 0 0 0 (as AX register is being used in the
instruction)
R/M = 1 1 1 (for [BX] being used with the addressing
mode)

And, there is no displacement here in this instruction,

so the remaining bits will remain empty in the
instruction format.

Hence the instruction format for the given instruction

is:
00000011 00000111
ii. Given instruction is : ADD AL , [2000H]
Here, opcode = 000000 (for ADD instruction)
D = 1 (as the data is being transferred to the
register)
W = 0 (as the processing is being done on 8
bits of data)
MOD = 0 0 (because [BX] represents Memory mode with no
displacement)
 REG = 0 0 0 (as AX register is being used in the
instruction)
R/M = 1 1 0 (for direct mode being used as the addressing
mode)

And the displacement here is 2000H

So, the lower bits of displacement are 00H i.e. 0000 0000
And the higher bits of displacement are 20H, i.e. 0010
0000

Hence the instruction format for the given instruction

is:
00000010 00000110 00000000 00100000

ADDRESSING MODES OF 8086

Addressing mode represents a method of assigning the address of the source of data or
operand to the instruction given to the microprocessor.
Addressing mode describes a flexible and efficient way to define complex effective
address.
The addressing modes of the 8086 microprocessor is classified as,
1. Immediate addressing mode:
In this type of mode, immediate data is part of instruction and appears in the form of
successive bytes

Eg: MOV AX, 10ABH

Before Result After result
AX AX
X XX
X
10 AB

2. Direct addressing mode:

In this type of addressing mode a 16-bit memory address is directly specified in the
instruction as a part of it.
The direct addressing mode is also known as Absolute Addressing mode. Here, the
instruction contains the address of the location in memory where the value of the operand is
stored.
Effective address (EA) = address field (A)

Eg:
MOV AX, [5000H]
Before: After:
AX AX
X XX 33 22
X Memory Location Memory Location
22 5000 22 5000
33 5001 33 5001
5002
5002

3. Indirect addressing mode in 8086

There are four types of Indirect addressing modes. Basically indirect addressing mode
means giving the location of the target indirectly. We give the location of data through a
register. Not all registers can be used to give locations.
Only BX, SI, DI, BP are the registers that can be used to store locations. 

4. Register addressing mode:

In this type of addressing mode, the data is stored in the register and it can be an 8 bit or 16-
bit register. All the registers, except IP, may be used in this mode.
Effective address (EA) = the address stored in the register R
Eg:
MOV AX, BX
Before: After:
AX AX
FF 33 10 AB

BX BX
10 AB 10 AB

5. Register indirect addressing mode:

The address of the memory location which contains data or operand is determined in a
direct way, using the offset register

Effective address is the content of memory location present in the register.

Eg:
MOV AX, [BX]
Before: After:
AX AX
33 22
X XX
X BX BX
50 00 50 00

Memory Location Memory Location

22 5000 22 5000
33 5001 33 5001
5002
5002

6. Indexed addressing mode:

In this addressing mode, offset of the operand is stored in one of the index registers.
DS is the default segment for index register SI and DI
Effective address (EA) = address field (A) + address of Index Register (IR)

Eg:
MOV AX, [SI]
Before: After:
AX AX
33 22
X XX
X SI SI
50 00 50 00

Memory Location Memory Location

22 5000 22 5000
33 5001 33 5001
5002
5002

7. Register relative addressing mode:

In this mode, the data is available at an effective address formed by adding an 8 bit or
16 bit displacement with the content of any one of the registers BX, BP, SI and DI in
the default (either DS or ES) Segment.
instead of a register, the program counter is used.
Effective Address = Value of PC + Address part of the instruction

Eg:
MOV AX, 50H[BX]
Before: After:
AX AX
33 44
X XX
X BX BX
50 00 50 00
Effective Address = Value of PC + Address part of the
instruction
5000 + 50 = 5050 H is the new memory location and get the data from the address location
5050H
Effective Address = 5050 H
Memory Location Memory Location
44 5000
5050 44 5050
33 5051
5001 33 5051
5002
5052
5052

8. Base plus index addressing mode:

In this mode the effective address is formed by adding content of a base register (any
one of BX or BP) to the content of an index register (SI or DI). Default segment
register ES or DS.
Effective address : Index register + Base register
Eg:
MOV AX,[BX] [SI]
Before: After:
AX AX
X XX 34 12
X BX BX
10 00 10 00

SI SI
20 00 20 00

1000 + 2000 = 3000 is the new memory location and get the data from address
location 3000
Memory Location Memory Location

5000
3000 3000
3001
5001
3001
5002
3002
3002
 12 12
34 34

9. Base relative plus index addressing mode:

In the effective address is formed by adding an 8 bit or 16-bit displacement with sum of
contents of any one of the base registers (BX or BP) and any one of the index registers, in
a default segment.
Effective address: Index register + Base register + Constant
Eg:
MOV AX,50H[BX][SI]
Before: after
AX AX
X XX 34 12
X
BX BX
10 00 10 00

SI SI
20 00 20 00

50 +1000 + 2000 = 3050 is the new memory location and get the data from address
location 3000
Memory Location Memory Location
12 5000
3050 12 3050
34 3051
5001 34 3051
5002
3052
3052

Instruction sets in microprocessor:

The 8086 microprocessor supports 8 types of instructions −

 Data Transfer Instructions

 Arithmetic Instructions
 Bit Manipulation Instructions
 String Instructions
 Program Execution Transfer Instructions (Branch & Loop Instructions)
 Processor Control Instructions
 Iteration Control Instructions
 Interrupt Instructions
Data Transfer Instructions
These instructions are used to transfer the data from the source operand to the destination
operand. Following are the list of instructions under this group −
Instruction to transfer a word
 MOV − Used to copy the byte or word from the provided source to the
provided destination.
Eg:
MOV BX,00F2H

Before: After:
BX BX
X XX 00 F2
X
 PUSH – Pushes (sends, writes or moves) the content of a
specified register or memory location(s) onto the top of the stack.
Eg: PUSH AX
Before: After:
 AX AX
10 20 10 20

Stack Location Stack Location

SP SP
20038 20036

20 20038
20038
20037 10
20037
20036 20036

 POP – POP (reads) two bytes from the top of the stack and keeps them in a specified
register, or memory location (s)
Eg:
PUSH AX
Before: After:
AX AX
X XX 10 20
X Stack Location Stack Location
SP SP
20038 20036

20 20038
20 20038
10 20037
10 20037
20036
20036

 XCHG − Used to exchange the data from two locations.

Eg: XCHG AX, BX

Before: After:
AX AX
10 AB FF 33

BX BX
FF 33 10 AB
  XLAT – This instruction replaces a byte in AL register with a byte using a
table in the memory.
BX register stores the starting address of the lookup table
Instructions for input and output port transfer
 IN − Used to read a byte or word from the provided port to the accumulator.
 For 16 bit address DX is only register allowed to carry port address
Eg:
IN AL, F8H
Copy an immediate data [F8] to AL
F8 Port address
Before After
AL AL
X XX 12
X
PORT PORT
33 33

IN AX, DX
Before After
AX AX
X XX FF 33
X DX BX
X XX 80 00
X PORT PORT
80 33 80 33

 OUT − Used to send out a byte or word from the accumulator to the provided
port.
Eg:
OUT 0FH, AL
Before After
AX AX
00 0F 00 0F

PORT PORT
00 0F 00 0F

Copy the contents of AL to the 8-bit port 0FH

Instructions to transfer the address
 LEA − Used to load the effective address of operand into the provided register.
Eg:

LEA BX, FF03

Before: After:
BX BX
55 44 FF 03

Memory Location Memory Location

20 FF05 20 FF05
10 FF04 10 FF04
FF03 FF03

 LDS − Used to load DS register and other provided register from the memory
Eg:
LDS BX, [FF05H]
Copy the contents of memory at displacement of FF05H and FF06H to AX
Then copy the contents at displacement of FF07H and FF08H to DS

Eg:

LEA BX, [FF05]

Before: After:
BX BX
55 44 30 40

DX DX
50 60 50 60

Memory Location Memory Location

60 FF08
FF08
50 FF07
FF07
40 FF06
FF06
30
FF05 FF05
20 FF04
FF04
10 FF03
FF03
 60
50
40
30
20
10

 LES − Used to load ES (extra segment) register and other provided

register from the memory.
Eg:
LES DI,[BX]
Before: After:
BX BX
FF 03 FF 03

DI DI
X XX 20 10
X
ESR ESR
X XX 40 30
X
DI = [BX], [BX]+1
ES = [BX]+2, [BX]+3

Memory Location Memory Location

60 FF08 60 FF08
50 FF07 50 FF07
40 FF06 40 FF06
30 FF05 30
FF05
20 FF04 20
FF04
10 FF03 10
FF03

Instructions to transfer flag registers

 LAHF − Used to load AH with the low byte of the flag register.
Before
AH 10000101
AL
After:

FLAG REGISTER HIGHER BYTE FLAG REGISTER LOWER BYTE

 X X X X O D I T S Z X AC X P X C
0 0 0 0 1 0 1 1 1 0 0 0 0 1 0 1

AH 10000101
AL

 SAHF − Used to store AH register to low byte of the flag register.

FLAG REGISTER HIGHER BYTE FLAG REGISTER LOWER BYTE

X X X X O D I T S Z X AC X P X C
0 0 0 0 1 0 1 1 1 0 0 0 0 1 0 1

AH 10000101
AL

 PUSHF − Used to copy the flag register at the top of the stack.
 POPF − Used to copy a word at the top of the stack to the flag register.
Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition, subtraction,
multiplication, division, etc.
Following is the list of instructions under this group −
Instructions to perform addition
 ADD − Used to add the provided byte to byte/word to word.
 ADC − Used to add with carry.
 INC − Used to increment the provided byte/word by 1.
 AAA − Used to adjust ASCII after addition.
 DAA − Used to adjust the decimal after the addition/subtraction operation.
Instructions to perform subtraction
 SUB − Used to subtract the byte from byte/word from word.
 SBB − Used to perform subtraction with borrow.
 DEC − Used to decrement the provided byte/word by 1.
 NPG − Used to negate each bit of the provided byte/word and add 1/2’s
complement.
 CMP − Used to compare 2 provided byte/word.
 AAS − Used to adjust ASCII codes after subtraction.
 DAS − Used to adjust decimal after subtraction.
Instruction to perform multiplication
 MUL − Used to multiply unsigned byte by byte/word by word.
 IMUL − Used to multiply signed byte by byte/word by word.
 AAM − Used to adjust ASCII codes after multiplication.
Instructions to perform division
 DIV − Used to divide the unsigned word by byte or unsigned double word by
word.
 IDIV − Used to divide the signed word by byte or signed double word by
word.
 AAD − Used to adjust ASCII codes after division.
  CBW − Used to fill the upper byte of the word with the copies of sign bit of
the lower byte.
 CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.
Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e. operations
like logical, shift, etc.
Following is the list of instructions under this group −
Instructions to perform logical operation
 NOT − Used to invert each bit of a byte or word.
 AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
 OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
 XOR − Used to perform Exclusive-OR operation over each bit in a byte/word
with the corresponding bit in another byte/word.
 TEST − Used to add operands to update flags, without affecting operands.
Instructions to perform shift operations
 SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in
LSBs.
 SHR − Used to shift bits of a byte/word towards the right and put zero(S) in
MSBs.
 SAR − Used to shift bits of a byte/word towards the right and copy the old
MSB into the new MSB.
Instructions to perform rotate operations
 ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and
to Carry Flag [CF].
 ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB
and to Carry Flag [CF].
 RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and
CF to MSB.
 RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and
CF to LSB.
String Instructions
String is a group of bytes/words and their memory is always allocated in a sequential order.
Following is the list of instructions under this group −
 REP − Used to repeat the given instruction till CX ≠ 0.
 REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag
ZF = 1.
 REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero
flag ZF = 1.
 MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to
another.
 COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
  INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the
provided memory location.
 OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the
provided memory location to the I/O port.
 SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a
byte in AL or string word with a word in AX.
 LODS/LODSB/LODSW − Used to store the string byte into AL or string
word into AX.
Program Execution Transfer Instructions (Branch and Loop
Instructions)
These instructions are used to transfer/branch the instructions during an execution. It includes
the following instructions −
Instructions to transfer the instruction during an execution without any condition −
 CALL − Used to call a procedure and save their return address to the stack.
 RET − Used to return from the procedure to the main program.
 JMP − Used to jump to the provided address to proceed to the next instruction.
Instructions to transfer the instruction during an execution with some conditions −
 JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
 JAE/JNB − Used to jump if above/not below instruction satisfies.
 JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
 JC − Used to jump if carry flag CF = 1
 JE/JZ − Used to jump if equal/zero flag ZF = 1
 JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
 JGE/JNL − Used to jump if greater than/equal/not less than instruction
satisfies.
 JL/JNGE − Used to jump if less than/not greater than/equal instruction
satisfies.
 JLE/JNG − Used to jump if less than/equal/if not greater than instruction
satisfies.
 JNC − Used to jump if no carry flag (CF = 0)
 JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
 JNO − Used to jump if no overflow flag OF = 0
 JNP/JPO − Used to jump if not parity/parity odd PF = 0
 JNS − Used to jump if not sign SF = 0
 JO − Used to jump if overflow flag OF = 1
 JP/JPE − Used to jump if parity/parity even PF = 1
 JS − Used to jump if sign flag SF = 1
Processor Control Instructions
These instructions are used to control the processor action by setting/resetting the flag values.
Following are the instructions under this group −
 STC − Used to set carry flag CF to 1
 CLC − Used to clear/reset carry flag CF to 0
 CMC − Used to put complement at the state of carry flag CF.
 STD − Used to set the direction flag DF to 1
 CLD − Used to clear/reset the direction flag DF to 0
  STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
 CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
Iteration Control Instructions
These instructions are used to execute the given instructions for number of times. Following
is the list of instructions under this group −
 LOOP − Used to loop a group of instructions until the condition satisfies, i.e.,
CX = 0
 LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1
& CX = 0
 LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF
= 0 & CX = 0
 JCXZ − Used to jump to the provided address if CX = 0
Interrupt Instructions
These instructions are used to call the interrupt during program execution.
 INT − Used to interrupt the program during execution and calling service
specified.
 INTO − Used to interrupt the program during execution if OF = 1
 IRET − Used to return from interrupt service to the main program

Instructions to perform addition

 ADD − Used to add the provided byte to byte/word to word.
Eg:
ADD AL,12H
Before
AL

XX 02
After
AL = 02H + 12H
XX 14H

 ADC − Used to add with carry.

Eg:

ADC AL,13H

Before
XX 01H

After
AL = 01+14H +01H (carry)
XX 15H

 INC − Used to increment the provided byte/word by 1.

Eg:
 INC AL
Before

AL
XX 12H

After
AL = 12H +01H (carry)
XX 13H

 DAA − Used to adjust the decimal after the addition/subtraction operation.

This instruction is used to make sure that the result of adding two BCD
numbers is adjusted to be a proper BCD Number
If the value of lower order four bits of result (B 3 – B0) in AL > 9 (or) AF =1
DAA instruction adds 6 to the lower order
If (B7 – B4) in AH > 9 (or) CF =1 DAA instruction adds 6 to the Higher order
Eg:
ADD AL, CL
Before
AL = 39, CL = 44
AL = 0011 1001 ---- 39 -- BCD
CL = 0100 0100 ---- 44 – BCD
---------------
= 0111 1101 ----- 7D Not a BCD
---------------
D>9
DAA
= 0110

= 1000 0011
Instructions to perform subtraction
 SUB − Used to subtract the byte from byte/word from word.
Eg:
SUB AL, 14H
Before
Before

AL
XX 20H

After
AL = 20H -14H
XX CH

 SBB − Used to perform subtraction with borrow.

SBB AL,02H
Before
XX 13H

After
AL = 13-02H -01H (carry)
XX 10H

 DEC − Used to decrement the provided byte/word by 1.

Eg:
DEC AL
DEC AL
Before

AL
XX 12H

After
AL = 12H -01H (carry)
XX 11H

 NEG − Used to negate each bit of the provided byte/word and add 1/2’s
complement.
Eg:
NEG AL
Before
AL = 01001000
0 1 0 0 1 0 0 0

After
AL = 01001000
1 0 1 1 0 1 1 1

 DAS − Used to adjust decimal after subtraction.

This instruction is used to make sure that the result of subtracting two BCD
numbers is adjusted to be a proper BCD Number
If the value of lower order four bits of result (B3 – B0) in AL > 9 (or) AF =1
DAS instruction subtracts 6 to the lower order
If (B7 – B4) in AH > 9 (or) CF =1 DAA instruction subtracts 6 to the Higher
order
Eg:
SUB AL, BL
DAS
AL = 0011 0010 --- 32 BCD
BL = 0001 0111 --- 17 BCD

= 0001 1011---- 1B Not a BCD

1011 > 9
DAS
 = 0001 1011
= - 0110
AL = 0001 0101 = 15 BCD
Instruction to perform multiplication
 MUL − Used to multiply unsigned byte by byte/word by word.
Eg:
MUL BL
AX = AL × BL
if AL =02 H
BL =05 H
Before AX
AX
XX XX
After
AX
XX A

 IMUL − Used to multiply signed byte by byte/word by word.

Eg:

IMUL BL
AX = AL × BL
if AL =02 H
BL =05 H
Before AX
AX
XX XX
After
AX
XX A
IMUL BX
AX = AX × BX ( Lower order)
DX = AX × BX ( Higher order)

Instructions to perform division

 DIV − Used to divide the unsigned word by byte or unsigned double word by
word.
Eg:
DIV CL
AL = Quotient [ AX ÷ CL]
AH = Remainder [ AX ÷ CL]
Eg: DIV CL
Before :
CL = 10 H, AL =02H
After:
AL = 05H, AH = 00 H

 IDIV − Used to divide the signed word by byte or signed double word by
word.
 Eg:
iDIV CL
AL = Quotient [ AX ÷ CL]
AH = Remainder [ AX ÷ CL]
Eg: IDIV CL
Before :
CL = 10 H, AL =02H
After:
AL = 05H, AH = 00 H

ASCII ARTHEMTIC INSTRUCTIONS:

AAM − Used to adjust ASCII codes after multiplication.
AAA − Used to adjust ASCII after addition
AAS − Used to adjust ASCII codes after subtraction.
AAD − Used to adjust ASCII codes after division.
COMPARISION INSTRUCTIONS:
 CMP − Used to compare 2 provided byte/word.
Eg:
CMP AL , BL
If
AL = BL ; ZF is set
AL > BL ; SF =0
AL < BL ; SF =1

 CBW − Used to fill the upper byte of the word with the copies of sign bit of
the lower byte.
 CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.
Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e. operations
like logical, shift, etc.
Following is the list of instructions under this group −
Instructions to perform logical operation
 NOT − Used to invert each bit of a byte or word.
Example for NOT Instruction :

Instruction Explanation
; AX = 0010 0000 0000 1111
; performing NOT on AX
NOT AX ; AX = 1101 1111 1111 0000

 AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
 Example for AND Instruction :

Instruction Explanation

; AL = 1001 0011 = 93H

; BL = 0111 0101 = 75H
; AND byte in AL with byte in BL
AND BL, AL (Register, Register) ; BL = 0001 0001 = 11H

 OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
Example for OR Instruction :

Instruction Explanation
; AL = 1001 0011 = 93H
; BL = 0111 0101 = 75H
; OR byte in AL with byte in BL
OR BL, AL (Register, Register) ; BL = 1111 0111 = F7H

 XOR − Used to perform Exclusive-OR operation over each bit in a byte/word

with the corresponding bit in another byte/word.
Example for XOR Instruction :

Instruction Explanation
; AL = 1010 1111 = AFH
; BL = 1111 0000 = F0H
; XOR byte in AL with byte in BL
XOR BL, AL (Register, Register) ; BL = 0101 1111 = 5FH

 TEST − Used to add operands to update flags, the operands remain unchanged
The logical operational instruction implements bit wise AND function
between the two operands placed in the instruction.
Eg:
TEST AX, DX
AX = 1234H --- 0001 0010 0011 0100
DX = 5678H --- 0101 0110 0111 1000
Perform AX AND DX
Result 1230H --- 0001 0010 0011 0000
Instructions to perform shift operations
 SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in
LSBs.
 SAL BL , 1
Shift left. Here all the bits are shifted to left , and LSB doesn’t get any bit, automatically it gets a zero. So
if there are 4 shift operations , then the lower nibble gets all zeroes, as the number of shifts increases,
zeroes get increased from the lower

side. . 

 This instruction can be written using any data type SAL or SHL. Both represent the same thing.
 SAR BL, 1
In the above instruction, if it was a signed number , then because of shifting it may become a +ve
number from -ve number. SAR stands for shift arithmetic register. In this MSB doesn’t get a zero, MSB
get itself it’s value, MSB also shifts the bit and also retains it.
 SHR − Used to shift bits of a byte/word towards the right and put zero(S) in MSBs.
Eg:

SHR BL, 1
Here shifting is done towards right. In this case MSB gets no shifted value from other bit, so this
automatically gets zero.

 SAR − Used to shift bits of a byte/word towards the right and copy the old
MSB into the new MSB.
Instructions to perform rotate operations
 ROL − This instruction stands for Rotate Left without carry flag. The contents

of the operand (register or memory location) are rotated left bit-wise by some

number of positions depending on the count value. During this rotation, the
 most significant bit (MSB) is moved into the carry flag (CF) as well as into the

least significant bit (LSB) position.

Example for ROL Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit left

ROL CX, 1 ; MSB is shifted to CF and LSB

ROR − This instruction stands for Rotate Right without carry flag. The contents of the operand are rotated right bit-
wise by some number of positions depending on the count value. The ROL instruction seen above rotates the bits
towards the left side, whereas the ROR instruction rotates the bits towards the right side. Since this instruction rotates
the bits right, the least significant bit (LSB) is moved into the carry flag (CF) as well as into the most significant bit (MSB)
position. The below shows the operation ROR instruction with count value 2.
 The number of times the bits should be rotated right is given as the count value in the instruction. In case if the
count value is two or more than two times, firstly CL register is loaded with the count value, and then CL is mentioned in
the instruction (i.e, in place of the count value) as shown in the below examples.

Example for ROR Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit right

ROR CX, 1 ; LSB is shifted to CF and MSB

RCR − This instruction stands for Rotate Right Through Carry. In this instruction, the contents of the operand (register
or memory location) are rotated right bit-wise by some number of positions along with the carry flag. During the rotation
the least significant bit (LSB) is moved to carry flag, and the carry flag is moved into the most significant bit (MSB). The
below shows the operation RCR instruction with count value 2.
 In RCR instruction, during the first rotation, the bit which is already present
in the carry flag is moved to MSB, and LSB is moved to carry flag. Similar to
ROL and ROR, CL is used, if the rotation of bits is more than one time as
shown in the below examples.

Example for RCR Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit right

RCR CX, 1 ; LSB is shifted to CF and CF is shifted to MSB
RCL − This instruction stands Rotate Left Through Carry. This instruction is
similar to RCR instruction, but in this, the contents of the operand will be
rotated bit-wise left with the carry flag involved in the rotation. The below
shows the operation RCL instruction with count value 2.

Since the bits are rotated left in RCL instruction, the CF is shifted to LSB,
and MSB is shifted to CF and CL register is used in the instruction for rotating
the bits more than one time as shown in the below examples.

Example for RCL Instruction:

Instruction Explanation

; bits in CX is rotated 1-bit left

RCL CX, 1 ; MSB is shifted to CF and CF is shifted to LSB
 ; bits in BL is rotated 5-bits left (assuming CL = 05H)
RCL BL, CL ; MSB is shifted to CF and CF is shifted to LSB for 5 times

String Instructions
String is a group of bytes/words and their memory is always allocated in a sequential order.
Following is the list of instructions under this group −
 REP − Used to repeat the given instruction till CX ≠ 0.
 REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag
ZF = 1.
 REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero
flag ZF = 1.
 MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to
another.
 COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
 INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the
provided memory location.
 OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the
provided memory location to the I/O port.
 SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a
byte in AL or string word with a word in AX.
 LODS/LODSB/LODSW − Used to store the string byte into AL or string
word into AX.
Program Execution Transfer Instructions (Branch and Loop
Instructions)
These instructions are used to transfer/branch the instructions during an execution. It includes
the following instructions −
Instructions to transfer the instruction during an execution without any condition −
 CALL − Used to call a procedure and save their return address to the stack.
 RET − Used to return from the procedure to the main program.
 JMP − Used to jump to the provided address to proceed to the next instruction.
Instructions to transfer the instruction during an execution with some conditions −
 JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
 JAE/JNB − Used to jump if above/not below instruction satisfies.
 JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
 JC − Used to jump if carry flag CF = 1
 JE/JZ − Used to jump if equal/zero flag ZF = 1
 JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
 JGE/JNL − Used to jump if greater than/equal/not less than instruction
satisfies.
 JL/JNGE − Used to jump if less than/not greater than/equal instruction
satisfies.
 JLE/JNG − Used to jump if less than/equal/if not greater than instruction
satisfies.
  JNC − Used to jump if no carry flag (CF = 0)
 JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
 JNO − Used to jump if no overflow flag OF = 0
 JNP/JPO − Used to jump if not parity/parity odd PF = 0
 JNS − Used to jump if not sign SF = 0
 JO − Used to jump if overflow flag OF = 1
 JP/JPE − Used to jump if parity/parity even PF = 1
 JS − Used to jump if sign flag SF = 1
Processor Control Instructions
These instructions are used to control the processor action by setting/resetting the flag values.
Following are the instructions under this group −
 STC − Used to set carry flag CF to 1
 CLC − Used to clear/reset carry flag CF to 0
 CMC − Used to put complement at the state of carry flag CF.
 STD − Used to set the direction flag DF to 1
 CLD − Used to clear/reset the direction flag DF to 0
 STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
 CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
Iteration Control Instructions
These instructions are used to execute the given instructions for number of times. Following
is the list of instructions under this group −
 LOOP − Used to loop a group of instructions until the condition satisfies, i.e.,
CX = 0
 LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1
& CX = 0
 LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF
= 0 & CX = 0
 JCXZ − Used to jump to the provided address if CX = 0
Interrupt Instructions
These instructions are used to call the interrupt during program execution.
 INT − Used to interrupt the program during execution and calling service
specified.
 INTO − Used to interrupt the program during execution if OF = 1
 IRET − Used to return from interrupt service to the main program

Rotate Instructions in 8086 Microprocessor - ROL, ROR,

RCR & RCL

There are four rotate instructions in the 8086 microprocessor,

 ROL (Rotate Left) Instruction,

 ROR (Rotate Right) Instruction,

 RCL (Rotate Carry Left) Instruction,

 RCR (Rotate Carry Right) Rotate Carry Right.

The shift instructions and rotate instructions look similar in operation, but the difference is

that, in shift instructions, the bits shifted out of operand are lost.

Whereas in the case of rotate instructions the bits shifted out of operand from one end will

flow back to the operand from another end.

By using RCL and RCR instructions the bits in the operand are rotated through the carry

flag i.e., the operand is extended by the carry flag.

In order to execute rotate instructions, the destination operand must be a register or

memory operand and it should not be an immediate operand.

ROL Instruction :

This instruction stands for Rotate Left without carry flag.

The contents of the operand (register or memory location) are rotated left bit-wise by

some number of positions depending on the count value.

During this rotation, the most significant bit (MSB) is moved into the carry flag (CF) as
well as into the least significant bit (LSB) position.

The below shows the operation ROL instruction with count value 2.
 In the above figure, we can see on shifting of each bit of operand to the left side, the MSB is shifted to CF and to the LSB

position. The number of times the bits should be rotated left is given as the count value in the instruction. In case if the count value

is two or more than two times, firstly CL register is loaded with the count value, and then CL is mentioned in the instruction (i.e, in

place of the count value) as shown in the below examples.

Example for ROL Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit left

ROL CX, 1 ; MSB is shifted to CF and LSB

; bits in BL is rotated 5-bits left (assuming CL = 05H)

; MSB is shifted to LSB for 5 times
ROL BL, CL ; CF contains the last shifted bit from MSB to LSB

ROR Instruction :
This instruction stands for Rotate Right without carry flag. The contents of the operand are rotated right bit-wise by
some number of positions depending on the count value. The ROL instruction seen above rotates the bits towards the
left side, whereas the ROR instruction rotates the bits towards the right side. Since this instruction rotates the bits right,
the least significant bit (LSB) is moved into the carry flag (CF) as well as into the most significant bit (MSB) position. The
below shows the operation ROR instruction with count value 2.
 The number of times the bits should be rotated right is given as the count value in the instruction. In case if the
count value is two or more than two times, firstly CL register is loaded with the count value, and then CL is mentioned in
the instruction (i.e, in place of the count value) as shown in the below examples.

Example for ROR Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit right

ROR CX, 1 ; LSB is shifted to CF and MSB

; bits in BL is rotated 5-bits right (assuming CL = 05H)

; LSB is shifted to MSB for 5 times
ROR BL, CL ; CF contains the last shifted bit from LSB to MSB

RCR Instruction :
This instruction stands for Rotate Right Through Carry. In this instruction, the contents of the operand (register or
memory location) are rotated right bit-wise by some number of positions along with the carry flag. During the rotation the
least significant bit (LSB) is moved to carry flag, and the carry flag is moved into the most significant bit (MSB). The
below shows the operation RCR instruction with count value 2.

In the above figure, we can see that the carry flag is also been the part of the rotation of bits to the right. In the
previous two instructions i.e., ROR and ROL, the carry flag` is not considered while rotating bits, but it is filled with bit
moved from LSB in case of ROR and MSB in case of ROL.
 In RCR instruction, during the first rotation, the bit which is already present
in the carry flag is moved to MSB, and LSB is moved to carry flag. Similar to
ROL and ROR, CL is used, if the rotation of bits is more than one time as
shown in the below examples.

Example for RCR Instruction :

Instruction Explanation

; bits in CX is rotated 1-bit right

RCR CX, 1 ; LSB is shifted to CF and CF is shifted to MSB

; bits in BL is rotated 5-bits right (assuming CL = 05H)

RCR BL, CL ; LSB is shifted to CF and CF is shifted to MSB for 5 times

RCL Instruction :
This instruction stands Rotate Left Through Carry. This instruction is
similar to RCR instruction, but in this, the contents of the operand will be
rotated bit-wise left with the carry flag involved in the rotation. The below
shows the operation RCL instruction with count value 2.

Since the bits are rotated left in RCL instruction, the CF is shifted to LSB,
and MSB is shifted to CF and CL register is used in the instruction for rotating
the bits more than one time as shown in the below examples.
 Example for RCL Instruction:

Instruction Explanation

; bits in CX is rotated 1-bit left

RCL CX, 1 ; MSB is shifted to CF and CF is shifted to LSB

; bits in BL is rotated 5-bits left (assuming CL = 05H)

RCL BL, CL ; MSB is shifted to CF and CF is shifted to LSB for 5 times

Shift Instructions in 8086

Microprocessor - SHL,
SAL, SHR & SAR
The shift instructions of the 8086 microprocessor are used for shifting the bits in a
memory location or a register. The shifting of bits is done arithmetically or logically
to the left (left shift) or to the right (right shift) according to the value of count given
in the instruction that indicates the number of shifts to be done. The shift instructions
in the 8086 microprocessor are,

 SHL (Shift Left) Instruction,

 SAL (Shift Arithmetic Left) Instruction,

 SHR (Shift Right) Instruction,

 SAR (Shift Arithmetic Right) Instruction.

In the above shift instructions, both SHL and SAL have the same operation. To
perform multiplications and divisions on binary numbers by powers of two, arithmetic
shifts are used. The logical shifts fill the shifted bit portion by zero i.e., fill zero in
LSB position in case of SHL and SAL, and fill zero in MSB position in case of SHR.
Let us learn briefly about each shift instruction in the 8086 microprocessor.
 SHL/SAL Instruction :

This instruction stands for Shift Logical/Arithmetic Left. The SHL/SAL

instruction performs shifting of each bit in the operand (register or memory location)
to the left side and fills the least significant bit (LSB) with zero and obtain the result in
the destination operand. The MSB is shifted into the carry flag (CF). The operation of
SHL/SAL instruction with 2 times shift is shown below.

The number of shifts of bits is given as the count in the instruction and all the
flags are affected according to the result. If the number of shifts required is one, then
one is mentioned at the count position of the instruction. In case of shifting the bits for
two or more than two times, CL register must be used at the count position which is
loaded with the value of the number of shifts required (i.e., shift count) as shown in
the below examples.

Example for SHL/SAL Instruction :

Instruction Explanation

SAL CX, 1 ; shift bits in CX 1-bit left

 ; puts 0 in LSB and MSB in CF

; Left shift bits in AX for 5 times (assume CL = 05H)

SHL AX, CL ; puts 0's in 5 LSB's and last MSB in CF

SHR Instruction :
This instruction stands for shift Logical Right. The SHR instruction
performs shifting of each bit in the operand (register or memory location) to
the right side and fills the most significant bit (MSB) with zero. The LSB is
shifted into the carry flag (CF). The operation of SHR instruction with 2 times
shift is shown below.

Here also the number of shifts of the bits is given as the count in the
instruction and all the flags are affected according to the result. If the shift
count is one, then it is directly mentioned in the instruction. For shifting the
bits, two or more than two times, CL register must be used at the count
position which is loaded with shift count value as shown in the below
examples.

Example for SHR Instruction :

Instruction Explanation

; shift bits in CX 1-bit right

SHR CX, 1 ; puts 0 in MSB and LSB in CF

SHR AX, CL ; Right shift bits in AX for 5 times (assume CL = 05H)

 ; puts 0's in 5 MSB's and last LSB in CF

SAR Instruction :
This instruction stands for Shift Arithmetic Right. It does the same
operation as SHR except it fills the bit portion shifted right from the MSB with a
copy of old MSB i.e., the SAR instruction performs the right shift on each bit
and fills the MSB portion with the copy of old MSB. The operation of SAR
instruction with 2 times shift is shown below.

Similar to SHR, in SAR instruction, LSB is shifted to carry flag (CF). In the
case of multiple shifts, the CF contains the most recent shift bit and all the
flags are affected according to the result.

Example for SAR Instruction :

Instruction Explanation

; shift bits in CX 1-bit right

SAR CX, 1 ; puts copy of old MSB in MSB and LSB in CF

; Right shift bits in AX for 5 times (assume CL = 05H)

SAR AX, CL ; puts 5 old MSB in 5 MSB's portion

TEST Instruction :
 The TEST instruction performs bit by bit logical AND operation on the
source and destination operand but does not load the destination operand
with result i.e., this instruction performs bit by bit AND and sets the
corresponding Flag. Hence TEST instruction only affects the flag register (OF,
CF, SF, ZF, PF) and AF undefined which indicates the result of the operation
without changing any operand. This is normally used to compare the operands
bit by bit.

Example for TEST Instruction :

Instruction Explanation

; AND CL with AL
TEST AL, CL ; Flags are affected, result is not stored

; AND 0800H with AX

TEST AX, 0800H ; Flags are affected, result is not stored

Loop Instructions of 8086

Microprocessor - Types &
Examples
January 02, 2022

Sometimes while executing a program there will be a need for repeated execution
of some instructions a specified number of times. In all the programming languages
there are some specific structures to express this repeated execution of instructions.
 Similarly, the designers of the 8086 microprocessor came up with a group of
instructions to perform repeated execution of a series of instructions a specified
number of times much easier. These instructions are called LOOP instructions.

LOOP Instructions of 8086 Microprocessor :

The loop instructions cause the microprocessor to execute a series of instructions

repeatedly. Basically, the LOOP instructions are short jump instructions on a
condition i.e., when the condition satisfies a short jump is taken whose destination or
target address is in the range of -128 bytes to +127 bytes from the instruction address
after LOOP instruction. The various LOOP instructions and their functions are listed
below.

Mnemonic Meaning Format Operation

Decrements CX by
one, if CX ≠ 0, jump
LOOP Loop LOOP short-label to "short-label".

Decrements CX by
loop while one, if CX ≠ 0 and ZF
equal/Loop LOOPE/LOOPZ = 1, jump to "short-
LOOPE/LOOPZ while zero short-label label".

Decrements CX by
loop while not one, if CX ≠ 0 and ZF
LOOPNE/ equal/Loop LOOPNE/LOOPNZ = 0, jump to "short-
LOOPNZ while not zero short-lablel label".

Jump if CX is If CX = 0, branch to
JCXZ zero JCXZ short-label "short-label".
 All the above instructions are iteration control instructions and are used to execute
a series of instructions repeatedly on the successful satisfaction of the condition. The
condition is to check the CX register and zero flag (ZF) or can be only to check the
CX register. CX register must be loaded with the number of iterations to be
performed, prior to entering the section of the code terminated by LOOP instructions.
Let us see briefly each LOOP instruction.

LOOP Instruction :
The LOOP instruction executes the group of instructions a number of
times and it uses relative addressing mode. The number of iterations will
depend on the condition to be satisfied. The CX register will perform the
LOOP operation on the instructions to be iterated.

For every execution of LOOP instruction, the CX is automatically

decremented by one without affecting flags and performs a short jump to the
target address. This loop will continue until the CX becomes zero. When CX =
0, the execution of the loop will stop and the instructions after the LOOP will
start execution.

LOOPE/LOOPZ Instruction :
This instruction is similar to LOOP except that it checks for both CX and
ZF conditions to be satisfied before the jump can take place. Firstly the count
register CX is loaded with a value of the number of times the instructions are
to be repeated. For every iteration or every time the LOOPE/LOOPZ
instruction executes, it decrements the CX register by one without affecting
flags and performs a short jump to the target address (i.e., to the address with
signed 8-bit relative displacement in the range of -128 bytes to +127 bytes
from the instruction address after LOOPE/LOOPZ instruction) until the
condition CX ≠ 0 and ZF = 1 is maintained.

If CX equals 0, or if the zero flag gets cleared within the loop, the loop will
terminate. In other words, the two ways to exit the loop are CX = 0 or ZF = 0,
then after the processor starts executing the next instruction present after
LOOPE/LOOPZ.

Example for LOOPE/LOOPZ :

The following code segment compares the elements of ARRAY with

00FFH, it exits if they are unequal.

LOOPNE/LOOPNZ Instruction :
These instructions are the opposite of LOOPE/LOOPZ. It decrements the
CX register by one without affecting flags and performs a short jump to the
target address if CX ≠ 0 and ZF = 0. In other words, the number of iterations is
loaded into the count register CX and after every time the instruction
LOOPE/LOOPZ executes the CX will be auto decremented by one. Until the
conditions, CX ≠ 0 and ZF = 0 satisfies, the execution performs a short jump
to the target address given in the instruction.
 When either of the condition CX ≠ 0 or ZF = 0 fails to satisfies i.e., zero
flag (ZF) is set or CX becomes zero after auto decrement, the execution of the
loop will exit, and the instruction after LOOPE/LOOPZ in the program will be
executed. A group of instructions can be repeated a number of times (i.e., until
CX = 0 and ZF ≠ 0) by using LOOPE/LOOPZ.

Example for LOOPNE/LOOPNZ :

JCXZ Instruction :
The JCXZ loop instruction jumps to the target address if CX = 0 without
affecting flags. This instruction is useful at the beginning of a loop to bypass
the loop if CX = 0. IF the CX register is not equal to zero, no jump in the
program is performed, thereby executing the next instructions. As compared
to LOOPE/LOOPZ and LOOPNE/LOOPNZ instructions, in JCXZ the jump is
not based on the zero flag (ZF) rather it only depends on the CX register. In
the example shown below, JCXZ instruction is used to bypass the AGAIN loop
whenever CX = 0.

These two instructions move the bits inside the register side by side. The syntax of these instructions is