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Gs9215 Niko Sem

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175 views18 pages

Gs9215 Niko Sem

Uploaded by

l
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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NIKO-SEM High Performance Single Synchronous GS9215

GStek series Buck Converter

Features General Description


 Adjustable Relative Constant on-time for fast The GS9215 is small size chip with a relative
dynamic response constant on-time synchronous buck converter
 Programmable VOUT range = 0.7V~20V suitable for applications in notebook computers
 VIN range = 3V~28V and other battery operated portable devices.
 Wide Output Load Range: 0 to 15A Features include very wide input voltage range,
 1% reference accuracy over load and line high efficiency and a fast dynamic response with
 Low voltage DC current sense using low-side internal fast response scheme.
RDS _ON_L Sensing or sense resistor The GS9215 have a unique power save mode,
 Resistor programmable frequency which can save battery power supply by
 Cycle-by-cycle current limit decreasing frequency when load current falls
 3-Step Current Limit During Soft-start down below preset critical current point.
 Over-voltage/under-voltage fault protection The fast dynamic transient response means that

 
 Low quiescent power dissipation buck applications based on GS9215 will provide
 Power good indicator/ Power save option about 100ns-order response to load when output
 Integrated gate drivers with fast transmission voltage falls down or rises up. The frequency will
scheme increase or decrease to meet the change in
 Enable pin output load. Moreover, the GS9215 will take the
 Over temperature protection(Non-Latch) same method to regulate the output voltage when
 TQFN40-5x5 Package input voltage changes. When transient response
 Green Product (RoHS, Lead-Free, regulated, the controller will maintain a new
Halogen-Free Compliant) steady-state operation. Both the transient
response state and the new state, the GS9215
Applications always has the same on-time.
 Notebook computers The GS9215 is suitable for the solutions which
 CPU core/IO Supplies have the output voltage between 0.7V and 20V.
 Chip/RAM Supplies An external setting resistor and output voltage
 

can set the on-time, duty-cycle and frequency for


the controller. The integrated gate drivers feature
adaptive shoot-through protection, fast signal
transmission. Additional features include current
limit, soft-start, over-voltage and under-voltage
protection, a Power Good flag and soft discharge
 

upon shutdown. The GS9215 is available in


package TQFN40-5x5.

This document is NIKO-SEM's confidential information. Anyone having confidential obligation to NIKO-SEM shall keep this document confidential. Any
unauthorized disclosure or use beyond authorized purpose will be considered as violation of confidentiality and criminal and civil liability will be asserted.

Rev.:0P12 (Preliminary Specification) 1 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Typical Application

 
Figure 1a Typical Application of GS9215 for VOUT<2.5V
 
 

Figure 1b Typical Application of GS9215 for VOUT>2.5V

Rev.:0P12 (Preliminary Specification) 2 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Function Block Diagram

Error AMP
Error AMP
Error
AMP

 
Error
AMP
Error
AMP

Error AMP

Figure 2 Function Block Diagram


 
 

Rev.:0P12 (Preliminary Specification) 3 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Pin Configuration

PHASE

VDD5V
UGATE

BOOT

GND
VIN

TON
NC

CS
EN
10 9 8 7 6 5 4 3 2 1

VIN 11 40 VDDP

VIN 12 39 PGOOD
VIN GND
VIN 13 38 FB
VIN 14 37 VOUT

VIN 15 36 GND

VSWH 16 35 LGATE

 
VSWH 17 34 VSWH
VSWH
VSWH 18 33 PGND
VSWH 19 32 PGND

VSWH 20 31 PGND

21 22 23 24 25 26 27 28 29 30
PGND

PGND
PGND
PGND
PGND
VSWH

PGND

PGND

PGND
PGND

Figure 3 TQFN40-5x5 Package

Pin Descriptions
No. Name I/O type Pin Function
1 TON I Inner Ton Time Control Pin. Connect an external pull up resistor to VIN.
Analog and Digital Power Input; Minimum 1uF ceramic capacitor is
2 VDD5V I
needed.
 

Enable Control Pin. EN=Low, Shutdown; EN=Floating, Forced PWM


3 EN I
CCM Mode; EN=High, PWM with Skip Mode.
Current Limit Detecting Input Pin. Connect to PHASE pin though an
4 CS I
external resistor to set the current limit threshold.
5,36 GND I Ground PIN Of The Controller.
UGATE Driver Power Supply for Buck Controller. Bootstrap voltage pin.
 

6 BOOT I
Use a ceramic capacitor connecting to the external diode with this pin.
7 UGATE O High side gate signal, Must be floated.
8 NC

Rev.:0P12 (Preliminary Specification) 4 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

9 PAHSE O Switch node for Bootstrap capacitor.

10~15 VIN I Power Input voltage.


16~21,34 VSWH O Switch node, the output of the convertor.
22~33 PGND I Power Ground of the Power-MOS.
35 LGATE O Low side gate signal, Must be floated
37 VOUT O Buck Output Voltage (0~2.5V) Sense Input. Control the inner TON Time.
Buck Output Voltage Feedback Input. Used to control output voltage
38 FB I
range through a resistor voltage divider.
Buck controller power good indicator. Internal open drain structure.
39 PGOOD O Connect to an external pull-up resistor. This Pin will be pulled high when
output voltage reaches to the target range.
40 VDDP I Power Input, Minimum 0.1uF ceramic capacitor is needed.

 
Ordering Information
GS9215PP-R
1. Package 2. Shipping

No Item Contents

1 Package Q5: TQFN40-5x5

2 Shipping R: Tape & Reel

Example: GS9215 TQFN40-5x5 Tape & Reel ordering information is “GS9215Q5-R”


 
 

Rev.:0P12 (Preliminary Specification) 5 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Absolute Maximum Rating (Note 1)


Parameter Symbol Limits Units

VIN to GND VIN -0.3 ~ 30 V


TON to GND VTON -0.3 ~ 30 V
CS to GND VCS -0.3 ~ 30 V
VDD5V to GND VSUPPLY -0.3 ~ 6 V
VDDP to GND VDDP -0.3 ~ 6 V
PGOOD, FB, EN, VOUT to GND -0.3 ~ 6 V
BOOT Voltage VBOOT-GND -0.3 ~ 39 V
BOOT to PHASE Voltage VBOOT-PHASE -0.3 ~ 6 V
LGATE to GND VGL -0.3 ~ 6 V
PHASE to GND

 
VPHASE -2 ~ 33 V
GND - 8V (<400ns, 20μJ) to 33V (<200ns, VBOOT-GND<39V)

Package Power Dissipation at TA≦25°C P_TQFN40-5x5 4228 mW


Junction Temperature TJ - 45 ~ 150 °C
Storage Temperature TSTG - 55 ~ 150 °C
Lead Temperature (Soldering) 10S TLEAD 260 °C
ESD (Human Body Mode) (Note 2) VESD_HBM 2K V
ESD (Machine Mode) (Note 2) VESD_MM 200 V

Thermal Information (Note 3)


Parameter Symbol Limits Units

Thermal Resistance Junction to Ambient θJA_TQFN40-5x5 23.65 °C/W

Recommend Operating Condition (Note 4)


 

Parameter Symbol Limits Units

VIN to GND(Note 5) VIN 3~28 V


VDDP to GND VDDP 4.5~5.5 V
VDD5V to GND VDD5V 4.5~5.5 V
EN to GND VEN VEN=VDD V
 

Junction Temperature TJ - 40 ~ 125 °C


Ambient Temperature TA -40 ~ 85 °C

Rev.:0P12 (Preliminary Specification) 6 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Electrical Characteristics
(RTON=250KOhm, VDD5V=5V, VIN= 8V, EN=VDD, TA =25°C, unless otherwise specified)

Parameter Symbol Conditions Min Typ Max Units

SUPPLY VOLTAGE

Power Input Voltage VIN 3 8 28 V

Chip Supply Voltage VDDP 4.5 5 5.5 V

Reference Voltage

FB Reference Voltage VFB VDD= 4.5V ~ 5.5V 0.693 0.7 0.707 V

Enable Logic

EN Logic Low Voltage EN_L EN Falling(2V~0V), LGATE Falling 0.8 V

EN Floating Voltage EN_F VDD Power On, Stable State 2 V

 
EN Logic High Voltage EN_H EN Rising(2V~5V), LGATE Falling 3.3 V

Current Parameters

Quiescent IQ FB=0.73V, VDD 400 560 755 uA

EN=0, I(VDD) 0.5 1.43 3.55 uA

Shutdown Current ISHTDN EN=0, I(TON) 0.001 1 uA

EN=0,I(EN) -0.88 -0.35 -0.11 uA

RTON=300K,VIN=8V,
Ton Operating Current ITON 22.4 24 25.8 uA
VFB=0.73V

EN=5V 0.32 1.04 2.6 uA


Logic Input Current
EN=0V -0.88 -0.35 -0.11 uA

FB Input Bias Current IFB FB=0.7V 0.003 uA

System Time & Driver On-Resistance

VIN=8V,VFB=0.6V,
On-Time TON 245 350 455 ns
RTON=300K,VOUT=1.1V
 

Minimum Off-Time TOFFMIN VIN=8V, VFB=0.6V, RTON=300K 177 280 412 ns

TDL UGATE Falling to LGATE Rising 40 50 60 ns


Dead Time
TDH LGATE Falling to UGATE Rising 30 40 50 ns

UGATE Driver Pull Up RU_UP BOOT-PHASE=5V, UGATE=High 1.9 3.0 ohms

LGATE Driver Pull Down RL_DN BOOT-PHASE=5V, LGATE=Low 0.5 1.0 ohms

UGATE Driver Sink RU_SINK BOOT-PHASE=5V, UGATE=Low 0.7 1.4 ohms


 

LGATE Driver Pull Up RL_UP BOOT-PHASE=5V, LGATE=High 1.0 2 ohms

High side Driver(Note 6)

HDRV Rise time VPVCC=5V, 10%to 90% 30.0 ns

HDRV Fall time VPVCC=5V, 90%to 10% 25.0 ns

Rev.:0P12 (Preliminary Specification) 7 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Parameter Symbol Conditions Min Typ Max Units

Low side Driver (Note6)

LDRV Rise time VPVCC=5V, 10%to 90% 25.0 ns

LDRV Fall time VPVCC=5V, 90%to 10% 20.0 ns

Current Sensing

CS Source Current ICS VCS=1V 18 20 22 uA

ICS current temperature coefficient TCCS On the bias of 25C 4700 ppm/°C

Current Limit 1 (Rising) VILIM1 GND-PHASE, RCS(R3)=18K 324 360 396 mV

Current Limit 2 (Rising) VILIM2 GND-PHASE, RCS(R3)=10K 180 200 220 mV

Current Limit 3 (Rising) VILIM3 GND-PHASE, RCS(R3)=2.5K 35 50 65 mV

Zero Crossing Threshold VT_0 GND-PHASE -10 10 mV

Current Comparator Offset VOS_VCL GND-CS -10 10 mV

 
Voltage Fault Protection

VIN5V UVLO Threshold 1 UVLO_W Wake Up 4.2 4.38 4.5 V

VIN5V UVLO Threshold 2 UVLO_S Shutdown 3.7 3.93 4.1 V

PGOOD Falling Edge, PWM


UV Threshold UV_TH 60 70 80 %
Disable

UV Blank Time T_UV From EN Rising to PGOOD Rising 512CLKs ms

UV Fault Delay UV_DELAY 256CLKS ms

OVP Threshold OV_TH PGOOD Rising, LGATE Rising 120 125 130 %

OVP Delay T_OV PGOOD Falling to LGATE Rising 17 20 23 us

PGOOD Flag

PGOOD Trip Threshold PG_TH PGOOD Falling, Measured at FB 87 90 93 %

From FB Falling to PGOOD


PGOOD Fault Propagation Delay T_PG_F 1.87 2.5 4.11 us
Falling
 

Leakage Current ILEAK PGOOD=5V(To be Measured) 0.01 uA

Output Low Voltage VPG_LOW ISINK=1mA 0.4 V

Over Temperature Shutdown

Thermal Shutdown start threshold TTSDN 155 °C

Thermal Shutdown Hysteresis THYS_TSDN 10 °C

Out Voltage Discharge Resistance


 

VOUT Shutdown Discharge


RDISC IOUT=10mA 8 12 20 ohms
Resistance

Power MOS’s RDS(ON)

High side Switch On-Resistance RDS_ON_H IDS=1A (5) 15 30 mΩ

Low side Switch On-Resistance RDS_ON_L IDS=1A 7 15 mΩ

Rev.:0P12 (Preliminary Specification) 8 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Parameter Symbol Conditions Min Typ Max Units

Bootstrap Diode

Internal Boost Charging Switch


RBT_D VDD to BOOT, 10mA 100 ohms
On_Resistance

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the
device. These are for stress ratings. Functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may remain possibility to
affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. θJA is measured in the natural convection at TA=25°C on a high effective thermal conductivity
test board (4 Layers, 2S2P) of JEDEC 51-7 thermal measurement standard.

 
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Recommend the Pulse time<100ns when VIN over than 30V.
Note 6. Guaranteed by design.
Note 7. Recommend total power less than 30W.
Note 8. If V(BOOT)-V(PHASE)<4V, a diode is recommended.
 
 

Rev.:0P12 (Preliminary Specification) 9 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Typical Characteristics
On-time vs. Input Voltage Frequency vs. Input Voltage
(RTON=300K,ILOAD=10A,VOUT=1.04V) (RTON=300K,ILOAD=15A,VOUT=1.04V)

Frequency vs. Load Current Output Voltage vs. Load Current

 
(RTON=300K,VIN=8V,VOUT=1.04V) (RTON=300K,VIN=8V,VOUT=1.04V)

VOUT Efficiency vs. Load Current Power Off From EN


(RTON=300K,VIN=8V,VOUT=1.04V) CH1:VOUT CH2:PHASE CH3:EN CH4:PGOOD
 
 

Rev.:0P12 (Preliminary Specification) 10 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Power on from EN (CCM Mode, No Load) Power on from EN (DEM Mode, No Load)
CH1:VOUT CH2:PHASE CH3:EN CH4:PGOOD CH1:VOUT CH2:PHASE CH3:EN CH4:PGOOD

Power on from EN (15A Load) Power on from EN (73 mΩ Load)

 
CH1:VOUT CH2:IOUT CH3:UGATE CH4:PGOOD CH1:VOUT CH2:IOUT CH3:UGATE CH4:PGOOD

OVP UVP
CH1:VOUT CH2:UGATE CH3:LGATE CH4:PGOO CH1:VOUT CH2:IOUT CH3:UGATE CH4:LGATE
 
 

Rev.:0P12 (Preliminary Specification) 11 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Power ON in Short Condition Load Transient CCM Mode


CH1:VOUT CH2:IOUT CH3:UGATE CH4:LGATE CH1:VOUT CH2:IOUT CH3:UGATE CH4:LGATE

 
Load Transient DEM Mode
CH1:VOUT CH2:IOUT CH3:UGATE CH4:LGATE

 
 

Rev.:0P12 (Preliminary Specification) 12 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Application Information
The GS9215 is small size chip with a relative High Side Switch On-Time Count
constant on-time synchronous buck Converter The on-time is decided by the external setting resistor,
suitable for applications in notebook computers battery input voltage and output voltage. Looking at the
and other battery operated portable devices. TON pin, the battery input voltage is converted to
Features include very wide input voltage range, current which is inversely proportional to itself by
high efficiency and a fast dynamic response with dividing the external setting resistor. Simultaneously,
internal fast response scheme. the sample and hold module inside the chip samples
System Clock Generator and PWM Control the output voltage at each switching cycle. The input
The on-time of GS9215 can be set by an external voltage-proportional current is used to charge an
setting resistor from external Battery input voltage to internal capacitor from zero volts. When the voltage
TON pin and a sampled output voltage. The between two terminals of the capacitor reaches to the
controller maintains the duty-circle as loop feedback sampled output voltage, on-time one-shot pulse is

 
path exists between the GS9215 controller, the generated, and then upper power MOSFET is turned off
integrated power MOSFET, low pass filter and and lower power MOSFET is turned on.
voltage divider. For a given VIN to given VOUT buck We can count the on-time and switching frequency
application, the feedback maintains the constant according to the equations below:
duty-cycle. Due to the constant resistor, battery TON=8.22p×RTON×VOUT/ (VIN-0.8)
voltage and relative constant sampled output voltage, Here, the VOUT is the sampled output voltage of VOUT
the GS9215 based buck converter has the relative PIN.For output voltalge VOUT<2.5V, the VOUT Voltage
constant frequency. Moreover, the GS9215 can connects to VOUT PIN directly(refers to Figure 1a), the
increase the duty-cycle automatically as battery VOUT = VOUT(0.7~2.5). For output voltalge VOUT >2.5V,
voltage falls down. Because of the constant on-time the VOUT Voltage connects to VOUT PIN through the
in each switching period, the controller maintains the dividing resistors RVO1 and RVO2(refers to Figure 1b),
relative frequency when the battery input voltage the typical VOUT is set to 2.5V, choose the RVO1 and
changes. RVO2 as follows: VOUT=Vout*RVO2/(RVO1+RVO2).
At the beginning of each switching cycle, upper Then, the switching frequency is:
 

power MOSFET is turned on, after typical fixed Fsw=VOUT/ (VIN×TON)


on-time, the upper MOSFET is turned off, and then RTON is a resistor connected from the input supply
lower power MOSFET is turned on after internal (VIN) to the TON pin.
dead time. The upper MOSFET will not be turned on For heavy load (more than 10A) application, due to
at the beginning of next cycle until output voltage falls ground bounced and the high impedance of RTON, the
down below the preset voltage and the dead time TON pin should always be bypassed to GND using a
 

passes. The same events repeat the following several nF-order ceramic capacitor for reliable system
switching cycles. To avoid the surge inductor current operation.
during large load transient, a minimum Off-time is EN/DEM, DEM Mode and Shutdown
added. Typical minimum off-time is around 420ns. Soft-Discharge
The EN/DEM pin enables the power supply. When
Rev.:0P12 (Preliminary Specification) 13 Aug-12
GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

EN/DEM is tied to VDD the GS9215 controller is Current Limit


enabled and diode-emulated mode (DEM, which is The GS9215 uses the on-state resistance of the
power save mode) will be also enabled. When the low-side power MOSFET as a current-sense resistor. In
EN/DEM is floating or tri-stated, an internal tri-stated this case, the RCS resistor between the PHASE pin and
judged logic module will activate the controller and CS pin sets the over current threshold. This resistor RCS
the DEM Mode will be disabled. is connected to a 20uA current source within the
At light loads, GS9215 starts power save mode in GS9215 which is turned on when the low side power
order to maintain the on-time and decrease the MOSFET turns on. When the voltage drop across the
system clock frequency to skip PWM pulses for low side power MOSFET equals the voltage crossing
better efficiency. If DEM Mode is enabled, the the current limit resistor RCS, positive current limit will
GS9215 zero crossing comparator will sense the activate. The high side Power MOSFET will not be
inductor current and judge its value by comparing the turned on until both the voltage drop across the sense
phase node (PHASE) to PGND. Once the phase element (low side power MOSFET) falls below the

 
node voltage is equal to the PGND node voltage, the voltage across the RCS resistor and the output voltage
controller will enter the DEM Mode and turn off the falls to preset value. The current sensing circuit actually
low side power MOSFET. As the load current is regulates the inductor valley current. This means that if
further decreased, it takes longer time to discharge the magnitude of the current-sense signal at CS pin is
the output capacitor to the level than required the above the current-limit threshold, the PWM is not
next switching cycle. The on-time is kept the same as allowed to initiate a new switching cycle. The equation
that in the heavy-load condition. for the current limit threshold is as follows:
If the EN/DEM pin is pulled low, the GS9215 internal IL_LIMIT=20uA×RCS/RDS_ON_L
logic will shutdown the switching clock and stop the Where RCS is R3 and RDS_ON_L is the resistance of low
buck controller, the related output will be discharged side power MOSFET ML. Ensure that noise and DC
using a built-in switch resistor with a nominal errors do not corrupt the current-sense signal seen by
resistance of 12ohms. This will ensure that the output CS and PGND. Mount the IC close t the low side power
is in a defined state next time when it is enabled. MOSFET and sense resistor with short, direct traces,
Since this is a soft discharge, that there are no making a Kelvin sense connection to the sense resistor.
 

dangerous negative voltage excursions to be Power Good Indicator


concerned about. In order to maintain the correct When the output voltage is 25% above or 10% below its
function of the soft-discharge module, the chip power preset value, PGOOD gets pulled low. There is a 2.9us
supply must be online. delay built into the PGOOD module to prevent false
Output Voltage Selection operations. It is held low until the output voltage returns
The output voltage is set by the feedback resistors to above 93% below OVP trigger point. PGOOD flag is
 

R7 and R8 of Figure 2 or Figure 3 above. The also held low during soft-start .It will be pulled high
internal reference is 0.7V, so the voltage at the immediately when soft-start is over and the output
feedback pin is also 0.7V. Therefore the output can reaches 93% of its preset value. The Power Good
be set by the equation below: indicator is open-drain architecture and requires an
VOUT= (1+R6/R5) ×0.7V external pull-up resistor connected to PGOOD pin for
Rev.:0P12 (Preliminary Specification) 14 Aug-12
GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

system applications. used as high side and low side. External Boost diode
Output Over Voltage Protection and capacitor are need to power the internal floating
When the output voltage rises up to 125% of the drive module, A dead-time circuit is added to monitor
preset voltage, the internal fault-logic module delays the UGATE output and to prevent the high-side
about 20us and turns on the low side Power MOSFET from turning on until LGATE is fully off. The
MOSFET. It stays latched on and the GS9215 is internal pull-down transistor that drives LGATE low is
latched off until Power Reset or EN Reset. robust with a 0.5ohm typical on-resistance. The
Output Under Voltage Protection instantaneous drive current is supplied by the flying
When the output voltage falls down to 70% of the capacitor between VDDP and PGND. The dead-time
preset voltage, the internal fault-logic module counts circuit also monitors the LGATE output and prevents
256-CLKS and turns off both the high side and low the low-side MOSFET from turning on until UGATE is
side Power MOSFETs. Both switches stay latched off fully off. The typical dead time from UGATE-falling to
and the GS9215 is latched off until Power Reset or LGATE-rising is about 50ns.The typical dead time from

 
EN Reset. During soft-start, the UVP will be blanked LGATE-falling to UGATE-rising is about 40ns.
around 512CLKS. But if the output voltage rises up External Devices Selection
above the UVP threshold tolerance during the For loop stability, the 0 dB frequency (f0), defined in the
counter period, the UVP counter is released follow equation:
immediately. 1 f
f0   SW
UVLO and Soft-Start 2  RESR  COUT 4

An internal under voltage lockout (UVLO) module is The loop stability is determined by the output capacitor.
used to sense the VDD power supply. The PWM Specialty polymer capacitors have COUT in the order of
controller is forbidden by the under voltage lockout several 100uF and RESR in range of 10mohm is
module when VDD rises above 4.3V, the GS9215 will recommended. However, ceramic capacitors have f0 at
initial the control logic circuitries and soft-start more than 700 KHz, which is not recommended.
ramping generator, and then allows switching to In order for the right regulate manner, the ripple voltage
occur if both the device and VIN power Supply is at the feedback pin (FB), should be approximately
enabled. When VDD falls down to 3.9V, the PWM 15mV. This generates Vripple= (VOUT/0.7) ×15mV at
 

controller is forbidden again. At this time, both sides the output node. The output capacitor RESR should
drive signal UGATE and LGATE are low. meet this equation.
After soft-start module starting, the GS9215 The external device selection is list below:
controller will limit the output current by 3-step Choose Feedback Voltage Divider Resistor
current limiting logic cycle by cycle over a Set R5=1K~10K ohm
predetermined time period of 512CLKS. After UV (VOUT  0.7 )
 

R6   R5
blanking time (512CLKS), the output under voltage 0 .7
protection and power good indicator is enabled. For output voltage Vout > 2.5V, Set VOUT PIN’s
Power MOSFET Gate Drivers voltage VOUT=2.5V.
The GS9215 has UGATE and LGATE drivers built-in, Choose RVO2=1K~10K ohm
which can drive two large external N-type MOSFET
Rev.:0P12 (Preliminary Specification) 15 Aug-12
GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

(VOUT  2.5 )
RVO1   RVO 2
2 .5

Choose RTON
1 VOUT
TON ( Max )  
fSW VIN ( Min )

RON (Max) =TON× (VIN (Min)-0.8)/ (8.22P×VOUT)


Choose Inductor
Set the ripple current approximately 1/4 to 1/2 of the
maximum output current. 1/3 is recommended.
1 (VIN (max)  VOUT )  VOUT
LIND  
I IND( ripple )  f VIN (max)
3 (VIN (max)  VOUT )  VOUT
LIND  
I IOUT (max)  f VIN (max)

 
For applications that require fast transient response
with minimum VOUT overshoot, consider a smaller
inductance than above. The cost of a small
inductance value is higher steady state ripple, larger
line regulation, and higher switching loss.
The inductor also needs to have low DCR to achieve
good efficiency, as well as enough room above peak
inductor current before saturation. The peak inductor
current can be estimate as follows.
1 (VIN (max)  VOUT )  VOUT VOC
LIND( peak )   
Lf VIN (max) R DS ( on )

Choose Output Capacitors

1 VOUT
RESR    0.015
I ripple 0 .7
 

3 VOUT
   0.015
I OUT (max) 0 .7
VOUT
RESR   64 ( mohm )
I OUT (max)

Organic semiconductor capacitors or specialty


polymer capacitors are recommended.
 

Choose RCS
Use the same equation above at item "Current Limit”
section.

Rev.:0P12 (Preliminary Specification) 16 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

Package Dimensions, TQFN40-5x5

 
4.0 Dimensions in Millimeters
Symbol
30 21
Min. Max.
A 0.70 0.80
0.2

31 20
A1 0.00 0.05
3.9 A2 0.21 REF.
b 0.15 0.25
0.25
1.7

1.9

D 4.90 5.10
D2 3.70 4.00
1.77 D3 1.45 1.93
0.2
0.3

D4 1.67 1.88
0.3

1.83
4.0

1.77 D5 1.67 1.88


E 4.90 5.10
 
0.4
1.9

E2 1.60 1.80
1.7

E3 1.80 2.00
40
E4 1.55 1.80
11
E5 1.80 2.00
0.45
e 0.40 REF.
1 10
L 0.30 0.40
0.3

Unit: mm
 

Note

1. Min.: Minimum dimension specified.

2. Max.: Maximum dimension specified.

3. REF.: Reference. Normal/Regular dimension specified for reference.

Rev.:0P12 (Preliminary Specification) 17 Aug-12


GStek series
NIKO-SEM High Performance Single Synchronous GS9215
GStek series Buck Converter

 
DISCLAIMERS

Please read the notice stated in this preamble carefully before Admission e accessing any contents of the
document attached. Admission of NIKO-SEM’s statement therein is presumed once the document is
released to the receiver.
 
Notice: 
 
Firstly,  NIKO  SEMICONDUCTOR  CO.,  LTD.  (NIKO‐SEM)  reserves  the  right  to  make  corrections,  modifications,  enhancements, 
improvements,  and  other  changes  to  its  information  herein  without  notice..   And  the  aforesaid  information  does  not  form  any  part  or 
parts of any quotation or contract between NIKO‐SEM and the information receiver.    
 
 

Further,  no  responsibility  is  assumed  for  the  usage  of  the  aforesaid  information.   NIKO‐SEM  makes  no  representation  that  the 
interconnect of its circuits as described herein will not infringe on exiting or future patent rights and other intellectual property rights, nor 
do the descriptions contained herein express or imply that any licenses under any NIKO‐SEM patent right, copyright, mask work right, or 
other NIKO‐SEM intellectual property right relating to any combination, machine, or process in which NIKO‐SEM products or services are 
used. 
 
Besides, the product in this document is not designed for use in life support appliances, devices, or systems where malfunction of this 
product  can  reasonably  be  expected  to  result  in  personal  injury.   NIKO‐SEM  customers’  using  or  selling  this  product  for  use  in  such 
applications shall do so at their own risk and agree to fully indemnify NIKO‐SEM for any damage resulting from such improper use or sale. 
 

 
At last, the information furnished in this document is the property of NIKO‐SEM and shall be treated as highly confidentiality; any kind 
of distribution, disclosure, copying, transformation or use of whole or parts of this document without duly authorization from NIKO‐SEM by 
prior written consent is strictly  prohibited. The receiver shall fully compensate  NIKO‐SEM without any reservation for any losses thereof 
due  to  its  violation  of  NIKO‐SEM’s  confidential  request.  The  receiver  is  deemed  to  agree  on  NIKO‐SEM’s  confidential  request  therein 
suppose that said receiver receives this document without making any expressly opposition.   In the condition that aforesaid opposition is 
made, the receiver shall return this document to NIKO‐SEM immediately without any delay. 

Rev.:0P12 (Preliminary Specification) 18 Aug-12


GStek series

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