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CO Problems M3

The document describes the specifications of a computer's caches and memory. It provides: - The computer has L1 and L2 caches with 8-word blocks and hit rates of 95% for instructions and 90% for data. Access times are 1 cycle for L1 and 10 cycles for L2. - With memory interleaving, the average access time is 2.0585 cycles. Without interleaving, the average is 2.174 cycles, which is 1.056 times longer. - For a cache with 10us access and 12% miss rate with 0.015ms penalty, the average access time is 10.6us. - A described disk has a maximum storage of 68.

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Nidhi Srivastava
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108 views2 pages

CO Problems M3

The document describes the specifications of a computer's caches and memory. It provides: - The computer has L1 and L2 caches with 8-word blocks and hit rates of 95% for instructions and 90% for data. Access times are 1 cycle for L1 and 10 cycles for L2. - With memory interleaving, the average access time is 2.0585 cycles. Without interleaving, the average is 2.174 cycles, which is 1.056 times longer. - For a cache with 10us access and 12% miss rate with 0.015ms penalty, the average access time is 10.6us. - A described disk has a maximum storage of 68.

Uploaded by

Nidhi Srivastava
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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3.1. Assume a computer has L1 and L2 caches. The cache blocks consist of 8 words.

Assume that 30 percent of the instructions in a typical program perform a read or a write
operation and that the hit rate is the same for both caches and that it is equal to 0.95 for
instructions and 0.90 for data. Assume also that the times needed to access an 8-word
block in these caches are C1 = 1 cycle and C2 = 10 cycles.  
(a) What is the average access time experienced by the processor if the main memory
uses interleaving?  
(b) What is the average access time if the main memory is not interleaved? 
(c) What is the improvement obtained with interleaving? 
 
Solution: 
For Instructions:  For Data: 
h1 = h2 = 0.95  h1 = h2 = 0.90 
C1 = 1  C1 = 1 
C2 = 10  C2 = 10 
 

1. Main Memory Uses Interleaving. So, M = 17. 

tavg = tins + tdata 


=[h1C1 + (1 –h1) h2 C2 + (1 – h1)(1 – h2)M] + total_data[h1C1 + (1 – h1) h2C2 +
(1 – h1)(1 – h2)M] 
2.0585. 
 
(b)  Without Interleaving; M = 38 
Substitute M = 38 in the above equation: 
tavg = 2.174 
 

1. Without Interleaving the average access takes = 2.174/2.0585 =  1.056 times


longer. 

 
3.2. Calculate the total access time if miss rate is 0.12, Miss Penalty is 0.015ms and cache
access time is 10 microseconds. 
Solution: 
Hit Rate = h= 1 – Miss Rate = 1 – 0.12 = 0.88 
C =  10 microseconds 
M = 0.015 ms 
tave = hC + (1 – h) M 
=(0.88 * 10 * 10-6) + 0.12 * 0.015 * 10-3 = 10.6 microseconds 
 
3.3. A disk unit has 24 recording surfaces. It has a total of 14,000 cylinders. There is an
average of 400 sectors per track. Each sector contains 512 bytes of data. 

1. What is the maximum number of bytes that can be stored in this unit? 
2. What is the data transfer rate in bytes per second at a rotational speed of
7200 rpm? 
3. Using a 32-bit word, suggest a suitable scheme for specifying the disk
address, assuming that there are 512 bytes per sector. 

Solution: 

1. 24 * 14000 * 400 * 512 = 68.8 * 109 bytes 


2. rpm = 7200 rotations per minute =7200/60 rotations per second 

Data Transfer Rate = 400 sectors/track * 512 bytes/sector * 7000/60 rotations/


sec  

= 24.58 * 106  bytes/sec 

 
3. 400 sectors per track -> 9 bits to identify a sector within a track 

14,000 tracks per disk -> 14 bits to identify a track on disk 

24 disks per hard disk -> 5 bits to identify a disk. 

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