5 4 3 2 1

Version: 1.4
D
Intel APAC Lakeport CRB Schematic D

TITLE MODIFY SHEET

COVER SHEET
1
BLOCK DIAGRAM & SETTINGS 2

CK410 CLOCK GEN. / BUFFER V1.1 3

P4-775 PART A , B 4, 5

MCH-Lakeport part A & B & C V1.1, V1.3 6, 7, 8

C
DIMM1, 2, 3, 4 & TERMINATION 9, 10, 11 C

PCI EXPRESS X16 DISPLAY 12

VGA CONNECTOR 13

ICH7 PART A ,B & C V1.1, V1.2, V1.3, V1.4 14, 15, 16

PCI EXPRESS X1 SLOT 1 & 2,SATA 17

PCI 1, 2, 3 18

LAN Part A & B V1.1 ,V1.3 19, 20

ALC880 AUDIO CODEC & AUDIO LINE IN & OUT 21, 22

B B

LPC I/O, FDC, COM & LPT 23

KB, MS, FWH, SMB & AK2001 V1.1

24

USB,FPIO & MISC. V1.1, V1.2, V1.3 25

ATX POWER & FAN 26

VCORE V1.3 27

OTHER DC-DC CONVERTER V1.1, V1.3 28

MECHANICAL 29
A A

30

Title

COVER SHEET
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 1 of 30
5 4 3 2 1
 5 4 3 2 1

ICH7 GPIO SETTING

PINNAME WELL USAGE I/O NOTE

D
BLOCK DIAGRAM GPI0
GPI1
MAIN
MAIN
P_REQA
P_REQ5
I
I D

GPI2 MAIN P_REQE I

GPI3 MAIN P_REQF I
GPI4 MAIN P_REQG I
VRD 775-PIN P4 CK_410 GPI5 MAIN P_REQH I
10.1 GPI6 MAIN N/A I
GPI7 MAIN N/A I

ADDR

CTRL

DATA
GPI8 RESUME LPC_PME I
GPI9 RESUME 66DET I
GPI10 RESUME FWH_WP I
AGTL+ BUS FS B 533/800/1066 GPI11 RESUME SMB_ALERT I
GPI12 RESUME ACZ_DET I
ADDR

CTRL

DATA
GPI13 RESUME N/A I
GPI14 RESUME N/A I
GPI15 RESUME N/A I
4 DIMM GPO16 MAIN N/A O
DDR2 GPO17 MAIN N/A O
PCI EXPRESS X16 MCH GPO18 MAIN N/A O
Connector (VGA) GPO19 MAIN N/A O
C
8.4G Intel Lakeport GPO20 MAIN N/A O
C
GPO21 MAIN N/A O
GPO22 MAIN N/A OD
GPO23 MAIN LDQR1# O
DMI 2G/1G
GPO24 RESUME LAN_DISABLE I/O

PCI CONN 1

PCI CONN 2

PCI CONN 3
PCIE X4 GPO25 RESUME N/A I/O
GPO27 RESUME N/A I/O
PCI CNTRL GPO28 RESUME N/A I/O
IDE Primary UDMA/100
GPO32 MAIN N/A I/O
GPO33 MAIN N/A I/O
PCI ADDR/DATA GPO34 MAIN N/A I/O
ICH7

X1 CON
EXPRESS
PCI

X1 CON
EXPRESS
PCI
SATA 2 PCI EXPRESS X1
SATA/3Gb
4PORT

USB PORT 1-8

heard
CARD
NEW
USB
USB 2.0 PCI-EX1
PCI DEVICE SETTING
B B

DEVICE PCI1 PCI2 PCI3

LPC
FirmWare Hub IRQ F G F
| G F E
| H E H
| E H G
HD AUDIO LAN ID 21 22 23
SIO Intel 82573 REQ/GNT 0 1 2
ALC880D 82562EX/GX/GZ

Floopy
7.1 Channel
KB/MS
S/P DIF IN RJ45
S/P DIF OUT 10/100/1000Mb
A A

Title

BLOCK DIAGRAM & SETTING

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 2 of 30
5 4 3 2 1
 5 4 3 2 1

VCC3

4,6 CPU_FSA R190 1K FSA

D FB20 4,6 CPU_FSB R186 1K FSB D
30_OHM-0805 VCC3_CLK 4,6 CPU_FSC R182 1K FSC
L0805

C360 C307 C317 C348 C281 C293 R39

0805 4.7U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 10K
10V 16V 16V 16V 16V 16V
Y5V Y5V Y5V Y5V Y5V Y5V

VCC3_CLK

C361 C299 C201 C185

0603 0.1U 0603 0.1U 0805 4.7U 0603 0.1U
Y5V Y5V 10V 16V VCC3_CLK 22/X R385 CK_14M_AC97 21
16V 16V Y5V Y5V
U34 R355 22 CK_14M_ICH 15
10UF X1 47 57 FSC
0.1UF X7 VDDCPU FSLC/REF0_2x FSA R342 22
44 15 CK_48M_USB 14
VDDI/O FSLA/USB_48MHz
C 32 C
VDD_PCIEX R_H_MCH_P
42 49 CK_H_MCH_P 6
VDD_SRC CPUCLK0 R_H_MCH_N
48 CK_H_MCH_N 6
CPUCLK0#
14
VDD48 R_H_CPU_P
3 46 CK_H_CPU_P 4
VDD CPUCLK1 R_H_CPU_N
5 45 CK_H_CPU_N 4
VCC3_CLK VDDPCI CPUCLK1#
62
VCC3_CLK VDD25M_STB Freerun 33 R530
61 64 PCIE_25M 19
VDDSATA_STB 25Mhz_0F_2x/Freerun* GSEL
53 4
VDDREF_STB **GSEL/24.576Mhz
29 R_PE_MCH_P CK_PE_MCH_P 6
R388 PCIeT4 R_PE_MCH_N
30 CK_PE_MCH_N 6
R2 63 PCIeC4
1K GND
50 27 R_PE_ICH_P CK_PE_ICH_P 14
PMBS3904 1K GND PCIeT3 R_PE_ICH_N
58 28 CK_PE_ICH_N 14
GND PCIeC3
56
VCCP R375 Q38 GND R_PE_X16_P
43 24 CK_PE_X16_P 12
C

220 GNDA PCIeT2 R_PE_X16_N

2 25 CK_PE_X16_N 12
GND PCIeC2
B 6
TR-SOT23 Q1 GND R_SATA_P
17 60 CK_PE_SATA_P 14
C

C362SOT23 PMBS3904 GND SATACLKT R_SATA_N

21 59 CK_PE_SATA_N 14
E

0603 1U GND SATACLKC

B 26
Y5V TR-SOT23 31 GND 22 R_PE_S1_P
GND PCIeT1 CK_PE_S3_P 19
16V SOT23 37 23 R_PE_S1_N CK_PE_S3_N 19
E

GND PCIeC1
VTT_PG 18 34 R_PE_S2_P CK_PE_S2_P 17
VTTPWGD/WOL_STOP# PCIeT5 R_PE_S2_N
33 CK_PE_S2_N 17
9,10,12,15,17,18,19,23 SMBDATA PCIeC5
52
9,10,12,15,17,18,19,23 SMBCLK SDATA R_DOT96_P 0/X R383
51 19 CK_DOT96_P 6
SCLK 96MHz_T/PCIeT0 R_DOT96_N 0/X R384
B 20 CK_DOT96_N 6 B
CLK_X1 55 96MHz_C/PCIeC0
X1
36
Y2 PCIeT6 35
49US PCIeC6
39
CLK_X2 54 PCIeT7 38
X2 PCIeC7
14.318MHZ 7 12 33 R518 CK_33M_ICH 14
C358 XTAL-49US C359 **DOC_1 PCICLK4 SELRST
13 11 CK_33M_S4 29
20P 0603 0603 20P **DOC_0 SELRSET/RESET#/PCICLK3 10 FSB RN16-1 1 8 33-8P4R
FSLB/PCICLK2_2x CK_33M_S2 18
50V 50V R5 R6 9 RN16-2 2 7 33-8P4R CK_33M_S1 18
NPO NPO X10K PCICLK1_2x RN16-3 33-8P4R
X10K 1 8 3 6 CK_33M_S3 18
**RLATCH PCICLK0 RN16-4 33-8P4R
16 4 5 CK_33M_SIO 23
*SEL24_48#/24_48Mhz
R337
X10K ICS9LPRS511 R348 22 CK_48M_SIO 23

R306
VCC3_CLK 10K
VCC3_CLK

Freerun R370 X10K

VCC3_CLK

A A
GSEL R4 10K

R33 10K/X

SELRST R3 10K Title

CK505 CLOCK GEN. / BUFFER

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 3 of 30
5 4 3 2 1
 5 4 3 2 1

27 CPUVID7 IO_CPUVID7 23,27 GTLREF VOLTAGE SHOULD BE 0.63 x VTT = 0.75V

27 CPUVID6 IO_CPUVID6 23,27 VTT_OUT_RIGHT
H_REQ[0..4]
H_REQ[0..4] 6 27
27
CPUVID5
CPUVID4
IO_CPUVID5
IO_CPUVID4
23,27
23,27
V1.3
H_A[3..35]
H_A[3..35] 6 UPDATE 27 CPUVID3 IO_CPUVID3 23,27
R80
H_D[0..63]
H_D[0..63] 6
27
27
CPUVID2
CPUVID1
IO_CPUVID2
IO_CPUVID1
23,27
23,27 124_1%
V1.2
VTT_OUT_LEFT
27 CPUVID0 IO_CPUVID0 23,27

1%
R102 10 CPU_GTLREF_0
VTT12

SK1C C43 R85 C59 Close

D SK1A 14 H_SMI# P2 F26 TESTHI0 R146 62 1U 0603 210_1% 0603 X220P to PIN D
SMI* TESTHI00

1%
H_A3 L5 D2 H_ADS# 6 14 H_A20M# K3 W3 TESTHI1 R82 62 16V 16V H2
H_A4 A03* ADS* H_FERR# A20M* TESTHI01 Y5V X7R
P6 C2 H_BNR# 6 14 H_FERR# R3 F25
H_A5 A04* BNR* FREE*/PBE* TESTHI02 VTT_OUT_RIGHT
M5 D4 H_HIT# 6 14 H_INTR K1 G25
H_A6 A05* HIT* LINT0 TESTHI03 TESTHI2_7 R155 62
L4 H4 14 H_NMI L1 G27
H_A7 M4 A06* RSP* G8 N2 LINT1 TESTHI04 G26
H_A8 R4
A07* BPRI*
B2
H_BPRI#
H_DBSY#
6
6
14
14
H_IGNNE#
H_STPCLK# M3
IGNNE* TESTHI05
G24 R89 V1.2
H_A9 A08* DBSY* STPCLK* TESTHI06
T5 C1 H_DRDY# 6 F24 124_1%
A09* DRDY* TESTHI07

1%
H_A10 U6 E4 H_HITM# 6 5 H_VCCA A23 P1 TESTHI11 R93 62
H_A11 A10* HITM* VCCA TESTHI11
T4 AB2 H_IERR# 5 H_VSSA B23 W2 TESTHI12 R87 62 R100 10 CPU_GTLREF_1
H_A12 A11* IERR* VSSA TESTHI12 TESTHI13 R95 62
U5 P3 H_INIT# 14 5 H_VCCIOPLL C23 L2
H_A13 A12* INIT* VCC_PLL VCCIOPLL TESTHI13
U4 C3 H_LOCK# 6 8 VCC_PLL D23 AK6 H_FORCEPH
H_A14 A13* LOCK* VCC_PLL FORCEPH C47 R84 C58 Close
V5 E3 H_TRDY# 6 27 CPUVID0 AM2
H_A15 A14* TRDY* VID0 H_PWRGD 1U 0603 210_1% 0603 X220P to PIN
V4 AD3 27 CPUVID1 AL5 N1 H_PWRGD 15
A15* BINIT* VID1 PWRGOOD

1%
H_A16 W5 G7 H_DEFER# 6 27 CPUVID2 AM3 AL2 PROCHOT# PROCHOT# 16V 16V H1
N4 A16* DEFER* F2 GTLREF2 AL6 VID2 PROCHOT* M2 THRMTRIP# Y5V X7R
RSVD0 EDRDY* 27 CPUVID3 VID3 THERMTRIP* THRMTRIP# 14
P5 AB3 27 CPUVID4 AK4
H_REQ0 RSVD1 MCERR* VID4 COMP0 R164 1% 49.9_1%
K4 27 CPUVID5 AL4 A13
H_REQ1 REQ0* VID5 COMP0 COMP1 R90 1% 60.4_1%
J5 U2 27 CPUVID6 AM5 T1
H_REQ2 REQ1* AP0* VID6 COMP1 COMP2 R103 1% 60.4_1% R667 124/6/1/X R668 10/6 GTLREF2
M6 U3 G2 VTT_OUT_RIGHT
H_REQ3 REQ2* AP1* COMP2 COMP3 R92 1% 60.4_1%
K6 R1
H_REQ4 REQ3* H_BREQ0# COMP3 COMP4 R97 1% 60.4_1%
J6 F3 H_BREQ0# 6 J2 VTT_OUT_LEFT
REQ4* BR0* TESTHI8 COMP4 COMP5 R91 1% 60.4_1% R669 C349
6 H_ADSTB0 R6 G3 3 CK_H_CPU_P F28 T2
ADSTB0* TESTHI08 TESTHI9 R99 62 BLCK0 COMP5 COMP6 R81 1% 60.4-1% 210/6/1/X 1U/6/Y/10V/X
G5 G4 3 CK_H_CPU_N G28 Y3
PCREQ* TESTHI09 TESTHI10 R104 62 BLCK1 COMP6 COMP7 R78 1% 60.4-1%
H5 VTT_OUT_LEFT AE3 VTT_OUT_RIGHT
H_A17 TESTHI10 R96 62 COMP7 COMP8 R17 1% 24.9_1%
AB6 AE8 B13
H_A18 A17* SKTOCC* COMP8
W6 J16
H_A19 A18* DP0*
Y6 H15 23,26 THRMDA AL1 AL3
H_A20 A19* DP1* THERMDA VSS280
Y4 H16 23,26 THRMDC AK1 U1 CPU_U1
H_A21 A20* DP2* THERMDC VSS281
C AA4 J17 AJ7 G1 CPU_G1 C
H_A22 A21* DP3* VSS277 VSS282 R671 124/6/1/X R672 10/6 GTLREF3
AD6 AH7 E29 VTT_OUT_RIGHT
H_A23 A22* CPU_GTLREF_0 VSS278 VSS283 R79 X1K
AA5 H1 A24
H_A24 A23* GTLREF0 CPU_GTLREF_1 TP_VCCSENSE VSS284
AB5 H2 AN3 F29
H_A25 A24* GTLREF1 VCCP TP_VSSSENSE VCCSENSE RSVD12 R674 C354
AC5 E24 MCH_CPU_GTLREF 6 AN4 G6
H_A26 A25* GTLREF2 VCC_PKGSENSE VSSSENSE RSVD13 210/6/1/X 1U/6/Y/10V/X
AB4 H29 AN5 AH2
H_A27 A26* GTLREF_SEL VSS_PKGSENSE VCC_MB_REGULATION RSVD14
AF5 AN6
H_A28 A27* H_CPURST# VSS_MB_REGULATION VTT12
AF4 G23 H_CPURST# 6 AL8
H_A29 A28* RESET* VCC R88 62
AG6 AL7 V1
H_A30 A29* VSS279 MSID[1] R86 62 PROCHOT# R178 130
AG4 B3 H_RS0# 6 W1
H_A31 A30* RS0* R20 51 MSID[0]
AG5 F5 H_RS1# 6 F6
H_A32 A31* RS1* IMPSEL CPU_FSA R191 470
AH4 A3 H_RS2# 6
H_A33 AH5 A32* RS2* Y1
H_A34 A33* BOOTSELECT CPU_FSB R187 470
AJ5 V2
H_A35 A34* LL_ID0
AJ6 AA2
A35* LL_ID1 CPU_FSCCC R183 470
AC4
RSVD2 R31 0 VCC_PKGSENSE LGA_775
AE4 27 VCCSENSE BLACK
RSVD3 SOCKET_LGA775_DIP VTT_OUT_LEFT
6 H_ADSTB1 AD5
ADSTB1*
LGA_775 BLACK CPU_U1 R19 51
SOCKET_LGA775_DIP 27 VSSSENSE R30 0 VSS_PKGSENSE
CPU_G1 R18 47
VTT12
H_BREQ0# R105 62
SK1B SK1D R75 62
H_CPURST#
H_D0 B4 G16 H_D32 TCK TCK AE1 A29
H_D1 D00* D32* H_D33 TDI TCK VTT0 VTT_OUT_RIGHT
C5 E15 TDI AD1 B25
H_D2 D01* D33* H_D34 VCC15 TDO TDI VTT1
A4 E16 TDO AF1 B29
H_D3 D02* D34* H_D35 TMS TDO VTT2 VRD_SEL R47 1K
B C6 G18 TMS AC1 B30 B
H_D4 A5 D03* D35* G17 H_D36 TRST# AG1 TMS VTT3 C29
D04* D36* TRST# TRST* VTT4
H_D5 B6 F17 H_D37 R10 0 VCC_PLL A26 H_IERR# R83 62
H_D6 B7 D05* D37* F18 H_D38 H_BPM0 AJ2 VTT5 B27
D06* D38* H_BPM0 BPM0* VTT6
H_D7 A7 E18 H_D39 SHORT H_BPM1 H_BPM1 AJ1 C28 H_FORCEPH R69 X62
H_D8 A10 D07* D39* E19 H_D40 C2 H_BPM2 AD2 BPM1* VTT7 A25
D08* D40* H_BPM2 BPM2* VTT8 VTT_OUT_RIGHT
H_D9 A11 F20 H_D41 1U 0603 H_BPM3 H_BPM3 AG2 A28 H_BPM0 R61 62
H_D10 B10 D09* D41* E21 H_D42 16V H_BPM4 AF2 BPM3* VTT9 A27 H_BPM1 R62 62
D10* D42* H_BPM4 BPM4* VTT10
H_D11 C11 F21 H_D43 Y5V H_BPM5 H_BPM5 AG3 C30 H_BPM2 R57 62
H_D12 D8 D11* D43* G21 H_D44 BPM5* VTT11 A30 H_BPM3 R71 62
H_D13 D12* D44* H_D45 VTT12 C40 C42 H_BPM4 R70 62
B12 E22 15,25 FP_RST# AC2 C25
H_D14 D13* D45* H_D46 DBR* VTT13 0603 1U 0603 1U H_BPM5 R67 62
C12 D22 C26
H_D15 D14* D46* H_D47 VTT14 Y5V Y5V
D11 G22 AK3 C27
D15* D47* ITPCLKOUT0 VTT15 16V 16V TDI R77 62
6 H_DBI0 A8 D19 H_DBI2 6 AJ3 B26
DBI0* DBI2* ITPCLKOUT1 VTT16 TDO R74 62
6 H_STBN0 C8 G20 H_STBN2 6 D27
DSTBN0* DSTBN2* VTT17 TMS R76 62
6 H_STBP0 B9 G19 H_STBP2 6 R36 3,6 CPU_FSA G29 D28
DSTBP0* DSTBP2* BSEL0 VTT18 TCK R73 62
3,6 CPU_FSB H30 D25
H_D16 H_D48 CPU_FSCCC BSEL1 VTT19 TRST# R66 62
G9 D20 3,6 CPU_FSC G30 D26
H_D17 D16* D48* H_D49 BSEL2 VTT20 PLACE TCK/TDI/TMS
F8 D17 B28
H_D18 F9 D17* D49* A14 H_D50 0 VTT21 D29
D18* D50* VTT22 TERMINATION NEAR CPU
H_D19 E9 C15 H_D51 E7 D30 WITHIN 1.5" OF CPU.
H_D20 D7 D19* D51* C14 H_D52 R48 X1K N5 RSVD15 VTT23 AM6 VTT_OUT_RIGHT VTT_OUT_LEFT
D20* D52* RSVD16 VTTPWRGD VR_RDY 27
H_D21 E10 B15 H_D53 AE6
H_D22 D10 D21* D53* C18 H_D54 C9 RSVD17 AA1 VTT_OUT_RIGHT
H_D23 D22* D54* H_D55 GTLREF3 RSVD18 VTT_OUT_RIGHT VTT_OUT_LEFT VTT_OUT_RIGHT VTT_OUT_LEFT
F11 B16 G10 J1
H_D24 F12 D23* D55* A17 H_D56 D16 RSVD19 VTT_OUT_LEFT F27 R156 X1K
D24* D56* RSVD20 VTT_SEL VCC3
H_D25 D13 B18 H_D57 A20 C45 C50
H_D26 D25* D57* H_D58 RSVD21 0603 X0.1U 0603 X0.1U
E13 C21 E23 AN7 VRD_SEL 27
H_D27 D26* D58* H_D59 RSVD22 VID_SELECT 16V 16V
G13 B21 AM7 CPUVID7 27
H_D28 D27* D59* H_D60 RSVD23 Y5V Y5V
A F14 B19 A
H_D29 D28* D60* H_D61
G14 A19 1 F23
H_D30 F15 D29* D61* A22 H_D62 2 H1 RSVD24 D14
H_D31 D30* D62* H_D63 H2 RSVD25
G15 B22 3 E6
D31* D63* H3 RSVD26
6 H_DBI1 G11 C20 H_DBI3 6 4 E5
DBI1* DBI3* H4 RSVD27
6 H_STBN1 G12 A16 H_STBN3 6 D1
E12 DSTBN1* DSTBN3* C17 RSVD28 J3
6 H_STBP1 DSTBP1* DSTBP3* H_STBP3 6 RSVD29
LGA_775 BLACK Title
SOCKET_LGA775_DIP LGA_775
SOCKET_LGA775_DIP
BLACK
P4-775 PART A
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 4 of 30
5 4 3 2 1
 5 4 3 2 1

VCCP

VCCP VCCP VCCP

C64 C69 C74 C73 C70
SK1E SK1F SK1G
1206 10U 1206 10U 1206 10U 1206 10U 1206 10U
AG22 AK12 AF9 AL23 H22 D5 X5R X5R X5R X5R X5R
VCCP1 VCCP93 VCCP185 VSS41 VSS126 VSS211 16V-1206 16V-1206 16V-1206 16V-1206 16V-1206
K29 AH22 AF22 A12 H21 A9
VCCP2 VCCP94 VCCP186 VSS42 VSS127 VSS212
AM26 T29 AH11 L25 H20 D3
VCCP3 VCCP95 VCCP187 VSS43 VSS128 VSS213
D AM14 AJ14 J7 H19 B1 D
AE12 VCCP96 AM25 AH19 VCCP188 VSS44 AE28 H18 VSS129 VSS214 B5
VCCP5 VCCP97 VCCP189 VSS45 VSS130 VSS215
AE11 AE9 AH29 AE29 AB7 B8
VCCP6 VCCP98 VCCP190 VSS46 VSS131 VSS216 VCCP
W23 Y29 AH27 K5 H17 AJ4
VCCP7 VCCP99 VCCP191 VSS47 VSS132 VSS217
W24 AK25 AG28 J4 AJ24 AE26
W25 VCCP8 VCCP100 AK19 AL26 VCCP192 VSS48 AE30 AM17 VSS133 VSS218 AH1
VCCP9 VCCP101 VCCP193 VSS49 VSS134 VSS219
T25 AG15 AM12 AN20 AC3
VCCP10 VCCP102 VCCP194 VSS50 VSS135
Y28 J22 J24 AF10 H14 V7
VCCP11 VCCP103 VCCP195 VSS51 VSS136 VSS221 C31 C104 C32 C53
AL18 T24 J13 AE24 P28 C13
VCCP12 VCCP104 VCCP196 VSS52 VSS137 VSS222 1206 10U 1206 10U 1206 10U 1206 10U
AC25 AG21 T28 AM24 V6 AK24
VCCP13 VCCP105 VCCP197 VSS53 VSS138 VSS223 X5R X5R X5R X5R
W30 AM21 W28 AN23 AK2 AB30
VCCP14 VCCP106 VCCP198 VSS54 VSS139 VSS224 16V-1206 16V-1206 16V-1206 16V-1206
Y30 J25 J12 H9 P27 L6
VCCP15 VCCP107 VCCP199 VSS55 VSS140 VSS225
AN14 U30 J27 H8 P26 L7
VCCP16 VCCP108 VCCP200 VSS56 VSS141 VSS226
AD28 AL21 AG19 H13 AM28 AB29
VCCP17 VCCP109 VCCP201 VSS57 VSS142 VSS227
Y26 AG25 AL9 AC6 AJ13 M1
AC29 VCCP18 VCCP110 AJ18 AD30 VCCP202 VSS58 AC7 W4 VSS143 VSS228 AB28
VCCP19 VCCP111 VCCP203 VSS59 VSS144 VSS229
M29 J19 AF21 AH6 P25 E8
VCCP20 VCCP112 VCCP204 VSS60 VSS145 VSS230 VCCP
U24 AH30 Y24 C16 AJ20 AG20
VCCP21 VCCP113 VCCP205 VSS61 VSS146 VSS231
J23 J15 AK14 AM16 W7 AN17
VCCP22 VCCP114 VCCP206 VSS62 VSS147 VSS232
AC27 AG12 J9 AE25 P23 AB27
VCCP23 VCCP115 VCCP207 VSS63 VSS148 VSS233
AM18 AJ22 M27 AE27 AG13 AB26
VCCP24 VCCP116 VCCP208 VSS64 VSS149 VSS234 C88 C61
AM19 J20 AF14 AJ28 AG16 AN16
VCCP25 VCCP117 VCCP209 VSS65 VSS150 VSS235 1206 10U 1206 10U
AB8 AH18 J30 AG17 M7
VCCP26 VCCP118 VCCP210 VSS151 VSS236 X5R X5R
AC26 AH26 AG18 F19 C7 AB25
VCCP27 VCCP119 VCCP211 VSS67 VSS152 VSS237 16V-1206 16V-1206
J8 W27 AA8 AH13 AB24
VCCP28 VCCP120 VCCP212 VSS68 VSS238
J28 AL25 AG8 AD7 L30 AB23
VCCP29 VCCP121 VCCP213 VSS69 VSS154 VSS239
T30 AN8 AL29 AH16 L29 N3
VCCP30 VCCP122 VCCP214 VSS70 VSS155 VSS240
AM9 AH14 AD29 AK17 D15 AA30
VCCP31 VCCP123 VCCP215 VSS71 VSS156 VSS241
AF15 U27 W8 E17 AL27 F4
VCCP32 VCCP124 VCCP216 VSS72 VSS157 VSS242
C AC8 T23 AH8 AH17 Y7 AG10 C
VCCP33 VCCP125 VCCP217 VSS73 VSS158 VSS243
AE14 R8 N24 AH20 L27 AE13
VCCP34 VCCP126 VCCP218 VSS74 VSS159 VSS244
N23 AK22 AN22 AE5 AA29 AF30
VCCP35 VCCP127 VCCP219 VSS75 VSS160 VSS245
W29 AN29 J14 AH23 N6 H28
VCCP36 VCCP128 VCCP220 VSS76 VSS161 VSS246
U29 AG11 K26 AE7 N7 F7
VCCP37 VCCP129 VCCP221 VSS77 VSS162 VSS247
AC24 AK26 AF19 AM13 AA28 AF29
VCCP38 VCCP130 VCCP222 VSS78 VSS163 VSS248
AC23 J10 N8 AH24 AN13 AF28
VCCP39 VCCP131 VCCP223 VSS79 VSS164 VSS249
Y23 AJ15 AF12 AJ30 AA27
VCCP40 VCCP132 VCCP224 VSS80 VSS165
AN26 AG26 M28 AJ10 AA26 AF27
VCCP41 VCCP133 VCCP225 VSS81 VSS166 VSS251
AN25 AN9 AK9 AF3 P4 AF26
VCCP42 VCCP134 VCCP226 VSS82 VSS167 VSS252
AN11 AH15 AK5 AA25 AF25
VCCP43 VCCP135 VSS83 VSS168 VSS253
AN18 AF18 AJ16 AA24 AN28
Y27 VCCP44 VCCP136 AL15 C10 VSS84 AF6 P7 VSS169 VSS254 AN27
VCCP45 VCCP137 VSS1 VSS85 VSS170 VSS255
Y25 J26 D12 AK29 E26 AF24
VCCP46 VCCP138 VSS2 VSS86 VSS171 VSS256
AD24 J18 Y2 AJ17 V30 AF23
VCCP47 VCCP139 VSS3 VSS87 VSS172 VSS257
AE23 J21 C24 F22 R2 AG24
VCCP48 VCCP140 VSS4 VSS88 VSS173 VSS258
AE22 AG27 K2 AH3 V29 AF17
VCCP49 VCCP141 VSS5 VSS89 VSS174 VSS259
AN19 AK15 C22 AK10 V28 AN24
VCCP50 VCCP142 VSS6 VSS90 VSS175 VSS260
V8 AF11 AN1 AM10 R5 H3
VCCP51 VCCP143 VSS7 VSS91 VSS176 VSS261
K8 AD23 B14 F16 V27
VCCP52 VCCP144 VSS8 VSS92 VSS177
AE21 AM15 K7 AJ23 R7 P24
VCCP53 VCCP145 VSS9 VSS93 VSS178 VSS263
AM30 AF8 AE16 F13 E20 AE20
AE19 VCCP54 VCCP146 AK21 B11 VSS10 VSS94 AG7 AN10 VSS179 VSS264 AE17
VCCP55 VCCP147 VSS11 VSS95 VSS180 VSS265
AC30 AG30 AL10 F10 V25 E27
VCCP56 VCCP148 VSS12 VSS96 VSS181 VSS266
AE15 AJ21 AK23 L26 T3 T7
VCCP57 VCCP149 VSS13 VSS97 VSS182 VSS267
M30 AM11 H12 AD4 V24 R30
VCCP58 VCCP150 VSS14 VSS98 VSS183 VSS268
K27 AL11 AF7 H11 V23 AJ27
VCCP59 VCCP151 VSS15 VSS99 VSS184 VSS269
M24 AJ11 AK7 L24 T6 AB1
VCCP60 VCCP152 VSS16 VSS100 VSS185 VSS270
AN21 K30 H7 L23 AM4
VCCP61 VCCP153 VSS17 VSS101 VSS271
B T8 AL14 E14 AM23 E25 V26 B
AC28 VCCP62 VCCP154 AN30 L28 VSS18 VSS102 A15 VSS187 VSS272 AA23
VCCP63 VCCP155 VSS19 VSS103 VSS273
N25 AH25 Y5 AH10 R29 AL28
AE18 VCCP64 VCCP156 AL12 E11 VSS20 VSS104 R28 VSS189 VSS274 AF20 VTT12 PLL SUPPLY FILTER
VCCP65 VCCP157 VSS21 VSS190 VSS275
W26 AJ9 AL16 B24 R27 AG23
AD25 VCCP66 VCCP158 AK11 AL24 VSS22 VSS106 L3 R26 VSS191 VSS276 L7 10UH
VCCP67 VCCP159 VSS23 VSS107 VSS192 H_VCCIOPLL 4
M8 AG14 AK13 H27 R25
N30 VCCP68 VCCP160 N29 VSS24 VSS108 A21 U7 VSS193 SHORT
VCCP69 VCCP161 VSS109 VSS194
AD26 AL30 D21 AE2 R24
AJ26 VCCP70 VCCP162 AJ25 AL20 VSS26 VSS110 AJ29 R23 VSS195
VCCP71 VCCP163 VSS27 VSS111 VSS196
AM29 AH9 D18 P30
VCCP72 VCCP164 VSS28 VSS197 VTT12
M25 J29 AN2 AK27 V3
VCCP73 VCCP165 VSS29 VSS113 VSS198
M26 J11 AK16 AK28 P29
VCCP74 VCCP166 VSS30 VSS114 VSS199
L8 K25 AK20 B20 AF16 H_VCCA 4
VCCP75 VCCP167 VSS31 VSS115 VSS200
U25 P8 AM27 AM20 AE10
VCCP76 VCCP168 VSS32 VSS116 VSS201
Y8 K23 AM1 H26 AF13
VCCP77 VCCP169 VSS33 VSS117 VSS202 C55 C14
AJ12 AL19 AL13 B17 H6
VCCP78 VCCP170 VSS34 VSS118 VSS203 1206 10U 0805 1U
AD27 AM8 AL17 H25 A18
VCCP79 VCCP171 VSS35 VSS119 VSS204 X5R 25V
U23 T26 C19 H24 A2
M23 VCCP80 VCCP172 N28 E28 VSS36 VSS120 AA3 E2 VSS205 16V-1206 Y5V
VCCP81 VCCP173 VSS37 VSS121 VSS206
AG29 AH12 AA7 D9 H_VSSA 4
N27 VCCP82 VCCP174 AL22 AK30 VSS122 H23 C4 VSS207 CAD NOTE :
VCCP83 VCCP175 VSS39 VSS123 VSS208
AM22 AN15 D24 AA6 A6
U28 VCCP84 VCCP176 AJ8 VSS40 VSS124 H10 D6 VSS209 TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MIL
VCCP85 VCCP177 VSS125 VSS210 PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
K28 U26
U8 VCCP86 VCCP178 AJ19 LGA_775 LGA_775
BLACK BLACK
VCCP87 VCCP179 SOCKET_LGA775_DIP SOCKET_LGA775_DIP
AK18 T27
VCCP88 VCCP180
AD8 AK8
VCCP89 VCCP181
K24 AN12
VCCP90 VCCP182
A AH28 AG9 A
VCCP91 VCCP183
AH21 N26
VCCP92 VCCP184
LGA_775 BLACK
SOCKET_LGA775_DIP

Title

P4-775 PART B
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 5 of 30
5 4 3 2 1
 5 4 3 2 1

H_A[3..35]
4 H_A[3..35]
H_D[0..63]
4 H_D[0..63]
H_REQ[0..4]
4 H_REQ[0..4]
U1MCH U1MCH U6E
U6B U6A
H_A3 J42 R40 H_D0 12 GEXP_RXP_0 F15 D11 GEXP_TXP_0 12 3,4 CPU_FSA R201 10K G20 C15 HSYNC 13
H_A4 L39 HA3# HD0# P41 H_D1 G15 EXP_RXP0 EXP_TXP0 D12 R206 10K J20 BSEL0 HSYNC D15
HA4# HD1# 12 GEXP_RXN_0 EXP_RXN0* EXP_TXN0* GEXP_TXN_0 12 3,4 CPU_FSB BSEL1 VSYNC VSYNC 13
H_A5 J40 R41 H_D2 12 GEXP_RXP_1 K15 B11 GEXP_TXP_1 12 3,4 CPU_FSC R212 10K J18
H_A6 HA5# HD2# H_D3 EXP_RXP1 EXP_TXP1 BSEL2
L37 N40 12 GEXP_RXN_1 J15 A10 GEXP_TXN_1 12 K20 B18 RED 13
H_A7 HA6# HD3# H_D4 EXP_RXN1* EXP_TXN1* VCC1_25 ALLZTEST RED
D L36 R42 12 GEXP_RXP_2 F12 C10 GEXP_TXP_2 12 F20 C19 GREEN 13 D
H_A8 K42 HA7# HD4# M39 H_D5 E12 EXP_RXP2 EXP_TXP2 D9 R223 1K G18 XORTEST GREEN B20
HA8# HD5# 12 GEXP_RXN_2 EXP_RXN2* EXP_TXN2* GEXP_TXN_2 12 RESERVED_24 BLUE BLUE 13
H_A9 N32 N41 H_D6 12 GEXP_RXP_3 J12 B9 GEXP_TXP_3 12 R221 EXP_SLR E18 C18
H_A10 HA9# HD6# H_D7 EXP_RXP3 EXP_TXP3 X1K EXP_SLR RED#
N34 N42 12 GEXP_RXN_3 H12 B7 GEXP_TXN_3 12 K17 D19
H_A11 HA10# HD7# H_D8 EXP_RXN3* EXP_TXN3* R217 0 RESERVED_25 GREEN#
M38 L41 12 GEXP_RXP_4 J11 D7 GEXP_TXP_4 12 12 EXP_EN_HDR J17 D20

VGA
H_A12 N37 HA11# HD8# J39 H_D9 H11 EXP_RXP4 EXP_TXP4 D6 H18 EXP_EN BLUE#

FSB
HA12# HD9# 12 GEXP_RXN_4 EXP_RXN4* EXP_TXN4* GEXP_TXN_4 12 RESERVED
H_A13 M36 L42 H_D10 12 GEXP_RXP_5 F7 B5 GEXP_TXP_5 12 L13 DDC_DATA 13
H_A14 HA13# HD10# H_D11 EXP_RXP5 EXP_TXP5 DDC_DATA
R34 J41 12 GEXP_RXN_5 E7 B6 GEXP_TXN_5 12 L17 M13 DDC_CLK 13
H_A15 HA14# HD11# H_D12 EXP_RXN5* EXP_TXN5* RESERVED_1 DDC_CLK
N35 K41 12 GEXP_RXP_6 E5 B3 GEXP_TXP_6 12 N17
H_A16 HA15# HD12# H_D13 EXP_RXP6 EXP_TXP6 RESERVED_2 R220 1% R0603 PLEASE
N38 G40 12 GEXP_RXN_6 F6 B4 GEXP_TXN_6 12 N18 A20
H_A17 HA16# HD13# H_D14 EXP_RXN6* EXP_TXN6* VCC1_25 RESERVED_3 REFSET 1.3K_1% CLOSE TO
U37 F41 12 GEXP_RXP_7 C2 F2 GEXP_TXP_7 12 N15
H_A18 HA17# HD14# H_D15 EXP_RXP7 EXP_TXP7 RESERVED_4
N39 F42 12 GEXP_RXN_7 D2 E2 GEXP_TXN_7 12 M20 C14 CK_DOT96_P 3 MCH
H_A19 HA18# HD15# H_D16 EXP_RXN7* EXP_TXN7* RESERVED_5 DREFCLKP
R37 C42 G6 F4 L15 D13

PCIE
HA19# HD16# 12 GEXP_RXP_8 EXP_RXP8 EXP_TXP8 GEXP_TXP_8 12 RESERVED_6 DREFCLKN CK_DOT96_N 3
H_A20 P42 D41 H_D17 12 GEXP_RXN_8 G5 G4 GEXP_TXN_8 12 L18 L12 VCC1_25
H_A21 HA20# HD17# H_D18 EXP_RXN8* EXP_TXN8* RESERVED_7 VCC
R39 F38 12 GEXP_RXP_9 L9 J4 GEXP_TXP_9 12 M18 M11
H_A22 V36 HA21# HD18# G37 H_D19 L8 EXP_RXP9 EXP_TXP9 K3 R320 RESERVED_8 VSS
HA22# HD19# 12 GEXP_RXN_9 EXP_RXN9* EXP_TXN9* GEXP_TXN_9 12
H_A23 R38 E42 H_D20 12 GEXP_RXP_10 M8 L2 GEXP_TXP_10 12 1K/6/1
H_A24 HA23# HD20# H_D21 EXP_RXP10 EXP_TXP10
U36 E39 12 GEXP_RXN_10 M9 K1 GEXP_TXN_10 12
H_A25 HA24# HD21# H_D22 EXP_RXN10* EXP_TXN10*
U33 E37 12 GEXP_RXP_11 M4 N2 GEXP_TXP_11 12 AD12 F13
H_A26 HA25# HD22# H_D23 EXP_RXP11 EXP_TXP11 RESERVED_28 RESERVED_001
R35 C39 12 GEXP_RXN_11 L4 M2 GEXP_TXN_11 12 0.352V AD13 F17
H_A27 HA26# HD23# H_D24 EXP_RXN11* EXP_TXN11* RESERVED_27 RESERVED_23
V33 B39 12 GEXP_RXP_12 M5 P3 GEXP_TXP_12 12 AM5 A14

MISC
H_A28 HA27# HD24# H_D25 EXP_RXP12 EXP_TXP12 -CL_RST VREF2 RESERVED_26
V35 G33 12 GEXP_RXN_12 M6 N4 GEXP_TXN_12 12 AA12 AM18 PLTRST# 12,15,17,19,23
H_A29 HA28# HD25# H_D26 EXP_RXN12* EXP_TXN12* V_1P25_PLTRST# RSTIN# M_PWOK
Y34 A37 12 GEXP_RXP_13 R9 R2 GEXP_TXP_13 12 15,23 PWROK1 AM15 AM17
H_A30 HA29# HD26# H_D27 EXP_RXP13 EXP_TXP13 PWROK2 PWROK
V42 F33 12 GEXP_RXN_13 R10 P1 GEXP_TXN_13 12 J13 ICH_SYNC# 15
H_A31 HA30# HD27# H_D28 EXP_RXN13* EXP_TXN13* R321 ICH_SYNC#
V38 E35 12 GEXP_RXP_14 T4 U2 GEXP_TXP_14 12
H_A32 HA31# HD28# H_D29 EXP_RXP14 EXP_TXP14 392/6/1
Y36 K32 12 GEXP_RXN_14 R4 T2 GEXP_TXN_14 12 A42
H_A33 HA32# HD29# H_D30 EXP_RXN14* EXP_TXN14* NC
Y38 H32 12 GEXP_RXP_15 R6 V3 GEXP_TXP_15 12
H_A34 HA33# HD30# H_D31 EXP_RXP15 EXP_TXP15
Y39 B34 12 GEXP_RXN_15 R7 U4 GEXP_TXN_15 12 AA10
H_A35 HA34# HD31# H_D32 EXP_RXN15* EXP_TXN15* RESERVED_9
AA37 J31 AA9 BC43
HA35# HD32# H_D33 RESERVED_10 TEST0

0603
C F32 14 DMI_TXP0 W2 V7 DMI_RXP0 14 C501 0.1U 16V Y5V AA11 BC1 C
HD33# DMI_RXP0 DMI_TXP0 RESERVED_11 TEST1

0603
M31 H_D34 14 DMI_TXN0 V1 V6 DMI_RXN0 C502
14 0.1U 16V Y5V Y12 A43
HD34# DMI_RXN0* DMI_TXN0* RESERVED_12 TEST2

0603
H_REQ0 F40 E31 H_D35 14 DMI_TXP1 Y8 W4 DMI_RXP1 14 C503 0.1U 16V Y5V
HREQ0# HD35# DMI_RXP1 DMI_TXP1

0603
H_REQ1 L35
HREQ1# HD36#
K31 H_D36 14 DMI_TXN1 Y9
DMI_RXN1* DMI_TXN1*
Y4 DMI_RXN1 14 C504 0.1U 16V Y5V U30
RESERVED_13

DMI
H_REQ2 H_D37

0603
L38 G31 14 DMI_TXP2 AA7 AC8 DMI_RXP2 14 C505 0.1U 16V Y5V U31 N20
HREQ2# HD37# DMI_RXP2 DMI_TXP2 RESERVED_14 NC_1

0603
H_REQ3 G43 K29 H_D38 14 DMI_TXN2 AA6 AC9 DMI_RXN2 C506 0.1U 16V Y5V
14 R29 BC42
H_REQ4 HREQ3# HD38# H_D39 DMI_RXN2* DMI_TXN2* RESERVED_15 NC_2

0603
J37 F31 14 DMI_TXP3 AB3 Y2 DMI_RXP3 14 C507 0.1U 16V Y5V R30 BC2
HREQ4# HD39# DMI_RXP3 DMI_TXP3 RESERVED_16 NC_3

0603
HD40#
J29 H_D40 14 DMI_TXN3 AA4
DMI_RXN3* DMI_TXN3*
AA2 DMI_RXN3 14 C508 0.1U 16V Y5V NC_4
BB43
4 H_ADSTB0 M34 F29 H_D41 U12 BB1
HADSTB0# HD41# H_D42 RESERVED_17 NC_5
4 H_ADSTB1 U34 L27 U11 B43
HADSTB1# HD42# H_D43 RESERVED_18 NC_6
K27 B12 R12 B42
4 H_STBP0 L40
HD43#
H26 H_D44 V1.3 3 CK_PE_MCH_P
3 CK_PE_MCH_N B13
GCLKP
AC11 EXP_COMP R243 1% VCC1_25PCIEX R13
RESERVED_19 NC_7
B2
M43 HDSTBP0# HD44# L26 H_D45 GCLKN* EXP_COMPO AC12 24.9_1% RESERVED_20 5 OF 7 NC_8
4 H_STBN0 HDSTBN0# HD45# EXP_COMPI
4 H_DBI0 M40 J26 H_D46 12 SDVO_DATA R548 220 G17
HDINV0# HD46# H_D47 R561 220 SDVO_CTRLDATA
4 H_STBP1 G35 M26 12 SDVO_CLK E17
HDSTBP1# HD47# H_D48 SDVO_CTRLCLK 2 OF 7
4 H_STBN1 H33 C33 946GZ(PL)
HDSTBN1# HD48# H_D49
4 H_DBI1 J33 C35
HDINV1# HD49# H_D50
4 H_STBP2 G27 E41 946GZ(PL)
HDSTBP2# HD50# H_D51
4 H_STBN2 H27
HDSTBN2# HD51#
B41 PLACED AS CLOSE
G29 D42 H_D52 VCC1_25
4 H_DBI2 HDINV2# HD52# H_D53
AS POSSIBLE TO THE GMCH
4 H_STBP3 B38 C40
HDSTBP3# HD53# H_D54 DMI_TXP0 R119 4.7K/6
4 H_STBN3 D38 D35
E33 HDSTBN3# HD54# B40 H_D55
4 H_DBI3 HDINV3# HD55#
C38 H_D56 DMI_TXP1 R120 4.7K/6
HD56# H_D57
4 H_ADS# W40 D37
HADS# HD57# H_D58 DMI_TXP2 R121 4.7K/6 VCC3
4 H_TRDY# Y40 B33
HTRDY# HD58# H_D59
4 H_DRDY# W41 D33
HDRDY# HD59# H_D60 DMI_TXP3 R122 4.7K/6
4 H_DEFER# T43 C34
HDEFER# HD60# H_D61 R322 1.65K/6/1 -CL_RST
Y43 B35
B
4
4
H_HITM#
H_HIT# U42
HHITM# HD61#
A32 H_D62 V1.1 12,15,17,19,23 PLTRST#
R8 B
HHIT# HD62# H_D63 1K
4 H_LOCK# V41
HLOCK# HD63#
D32 GTLREF VOLTAGE SHOULD BE 0.63 x VTT = 0.75V

1%
4 H_BREQ0# AA42 R323
W42 HBREQ0# B25 MCH_SWING 1K/6/1
4 H_BNR# HBNR# HSWING VTT12
4 H_BPRI# G39 D23 MCH_RCOMP R200 1% 16.5_1% ICH_SYNC# 15
U40 HBPRI# HRCOMP C25 MCH_SCOMP
4 H_DBSY# HDBSY# HSCOMP
4 H_RS0# U41 D25 MCH_SCOMPB
AA41 HRS0# HSCOMP# D24 MCH_GTLREF0
4 H_RS1# HRS1# HDVREF
4 H_RS2# U39 B24 R203
C31 HRS2# HACCVREF R32 124_1%
4 H_CPURST# HCPURST# HCLKP CK_H_MCH_P 3

1%
U32 CK_H_MCH_N 3
HCLKN R197 51 MCH_GTLREF0
1 OF 7
C160 1% C157
946GZ(PL) 0603 0.1U R199 Close to 0603 X220P R152 0 MCH_CPU_GTLREF 4
16V 210_1% pin D27 16V M_PWOK PWROK1 15,23
Y5V X7R
C18
0603 10P
16V
Y5V

VTT12

R209
301_1% VTT12 VTT12
1%

R211 R11
A R205 49.9_1% MCH_SWING 1% MCH_SCOMP 1% MCH_SCOMPB A
1%

C162 R210 CAD NOTE : 49.9_1% 49.9_1%

0603 0.01U 100_1%
HD_SWING Voltage C161 PLEASE DRIVER C3
16V 0603 X2.2P 0603 X2.2P
Y5V routed 10 mils / 7mils 50V
RESISTORS 50V
TRACE X7R NEAR VTT X7R

Title
0.22 x VTT
MCH LAKEPORT PART A
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 6 of 30
5 4 3 2 1
 5 4 3 2 1
U6C U1MCH U6D U1MCH

M_MAA_A[0..14]
M_MAA_A[0..14] 9,11
M_MAA_A0 BA31 AU4 M_DQS_P_A0 M_MAA_B0 BB17 AV6 M_DQS_P_B0
M_MAA_A1 SMA_A0 SDQS_A0 M_DQS_N_A0 M_MAA_B1 SMA_B0 SDQS_B0 M_DQS_N_B0 M_DQS_P_A[0..7]
BB25 AR3 AY17 AU5 M_DQS_P_A[0..7] 9
M_MAA_A2 SMA_A1 SDQS_A0# M_DQM_A0 M_MAA_B2 SMA_B1 SDQS_B0# M_DQM_B0
BA26 AR2 BA17 AR7
M_MAA_A3 SMA_A2 SDM_A0 M_MAA_B3 SMA_B2 SDM_B0 M_DQS_N_A[0..7]
BA25 BC16 M_DQS_N_A[0..7] 9
M_MAA_A4 AY25 SMA_A3 AR5 M_DATA_A0 M_MAA_B4 AW15 SMA_B3 AN7 M_DATA_B0
M_MAA_A5 SMA_A4 SDQ_A0 M_DATA_A1 M_MAA_B5 SMA_B4 SDQ_B0 M_DATA_B1 M_DQM_A[0..7]
BA23 AR4 BA15 AN8 M_DQM_A[0..7] 9
M_MAA_A6 SMA_A5 SDQ_A1 M_DATA_A2 M_MAA_B6 SMA_B5 SDQ_B1 M_DATA_B2
AY24 AV3 BB15 AW5
M_MAA_A7 SMA_A6 SDQ_A2 M_DATA_A3 M_MAA_B7 SMA_B6 SDQ_B2 M_DATA_B3 M_DATA_A[0..63]
AY23 AV2 BA14 AW7 M_DATA_A[0..63] 9
M_MAA_A8 BB23 SMA_A7 SDQ_A3 AP3 M_DATA_A4 M_MAA_B8 AY15 SMA_B7 SDQ_B3 AN5 M_DATA_B4
M_MAA_A9 SMA_A8 SDQ_A4 M_DATA_A5 M_MAA_B9 SMA_B8 SDQ_B4 M_DATA_B5
BA22 AP2 BB14 AN6
M_MAA_A10 SMA_A9 SDQ_A5 M_DATA_A6 M_MAA_B10 SMA_B9 SDQ_B5 M_DATA_B6
AY33 AU1 AW18 AN9
M_MAA_A11 SMA_A10 SDQ_A6 M_DATA_A7 M_MAA_B11 SMA_B10 SDQ_B6 M_DATA_B7
D BB22 AV4 BB13 AU7 D
M_MAA_A12 AW21 SMA_A11 SDQ_A7 M_MAA_B12 BA13 SMA_B11 SDQ_B7
M_MAA_A13 SMA_A12 M_DQS_P_A1 M_MAA_B13 SMA_B12 M_DQS_P_B1
AY38 BB3 AY29 AR12
M_MAA_A14 SMA_A13 SDQS_A1 M_DQS_N_A1 M_MAA_B14 SMA_B13 SDQS_B1 M_DQS_N_B1
BA21 BA4 AY13 AP12
SMA_A14 SDQS_A1# M_DQM_A1 SMA_B14 SDQS_B1# M_DQM_B1
BA2 AW9
BB34 SDM_A1 BA27 SDM_B1 M_MAA_B[0..14]
9,11 M_WE_A SWE_A# 10,11 M_WE_B SWE_B# M_MAA_B[0..14] 10,11
9,11 M_CAS_A AY35 AY2 M_DATA_A8 10,11 M_CAS_B AW29 AT11 M_DATA_B8
SCAS_A# SDQ_A8 M_DATA_A9 SCAS_B# SDQ_B8 M_DATA_B9 M_DQS_P_B[0..7]
9,11 M_RAS_A BB33 AY3 10,11 M_RAS_B AW26 AU11 M_DQS_P_B[0..7] 10
SRAS_A# SDQ_A9 M_DATA_A10 SRAS_B# SDQ_B9 M_DATA_B10
BB5 AP13
SDQ_A10 M_DATA_A11 SDQ_B10 M_DATA_B11 M_DQS_N_B[0..7]
9,11 M_SBA_A0 BA33 AY6 10,11 M_SBA_B0 AY19 AR13 M_DQS_N_B[0..7] 10
SBS_A0 SDQ_A11 M_DATA_A12 SBS_B0 SDQ_B11 M_DATA_B12
9,11 M_SBA_A1 AW32 AW2 10,11 M_SBA_B1 BA18 AR11
SBS_A1 SDQ_A12 M_DATA_A13 SBS_B1 SDQ_B12 M_DATA_B13 M_DQM_B[0..7]
9,11 M_SBA_A2 BB21 AW3 10,11 M_SBA_B2 BC12 AU9 M_DQM_B[0..7] 10
SBS_A2 SDQ_A13 M_DATA_A14 SBS_B2 SDQ_B13 M_DATA_B14
BA5 AV12
SDQ_A14 M_DATA_A15 SDQ_B14 M_DATA_B15 M_DATA_B[0..63]
9,11 M_SCS_A0 AW35 BB4 10,11 M_SCS_B0 BB27 AU12 M_DATA_B[0..63] 10
SCS_A0# SDQ_A15 SCS_B0# SDQ_B15
9,11 M_SCS_A1 BA35 10,11 M_SCS_B1 BB30
BA34 SCS_A1# BB9 M_DQS_P_A2 AY27 SCS_B1# AP15 M_DQS_P_B2
M_SCS_A2 RESERVED_11 SDQS_A2 M_SCS_B2 RESERVED_13 SDQS_B2
M_SCS_A3 BB38 BA9 M_DQS_N_A2 M_SCS_B3 AY31 AR15 M_DQS_N_B2
RESERVED_12 SDQS_A2# M_DQM_A2 RESERVED_10 SDQS_B2# M_DQM_B2
AY9 AW13
SDM_A2 SDM_B2
9,11 M_SCKE_A0 BC20 10,11 M_SCKE_B0 AY12
SCKE_A0 M_DATA_A16 SCKE_B0 M_DATA_B16
9,11 M_SCKE_A1 AY20 AY7 10,11 M_SCKE_B1 AW12 AU15
SCKE_A1 SDQ_A16 M_DATA_A17 SCKE_B1 SDQ_B16 M_DATA_B17
M_SCKE_A2 AY21 BC7 M_SCKE_B2 BB11 AV13
RESERVED_9 SDQ_A17 M_DATA_A18 RESERVED_11 SDQ_B17 M_DATA_B18
M_SCKE_A3 BA19 AW11 M_SCKE_B3 BA11 AU17
RESERVED_10 SDQ_A18 M_DATA_A19 RESERVED_12 SDQ_B18 M_DATA_B19
AY11 10,11 M_SODT_B0 BA29 AT17
SDQ_A19 M_DATA_A20 SODT_B0 SDQ_B19 M_DATA_B20
9,11 M_SODT_A0 AY37 BB6 10,11 M_SODT_B1 BA30 AU13
SODT_A0 SDQ_A20 M_DATA_A21 SODT_B1 SDQ_B20 M_DATA_B21 PLACE
9,11 M_SODT_A1 BA38 BA6 M_SODT_B2 BB29 AM13
SODT_A1 SDQ_A21 M_DATA_A22 RESERVED_14 SDQ_B21 M_DATA_B22
M_SODT_A2 BB35 BA10 M_SODT_B3 BB31 AV15 0.1UF CAP
RESERVED_2 SDQ_A22 M_DATA_A23 RESERVED_15 SDQ_B22 M_DATA_B23
M_SODT_A3 BA39 BB10 AW17 CLOSE TO
RESERVED_1 SDQ_A23 SDQ_B23
10 CK_M_DDR_P_B0 AV31 MCH
M_DQS_P_A3 SCLK_B0 M_DQS_P_B3
9 CK_M_DDR_P_A0 AU31 AT20 10 CK_M_DDR_N_B0 AW31 AT24
SCLK_A0 SDQS_A3 M_DQS_N_A3 SCLK_B0# SDQS_B3 M_DQS_N_B3 VCCDDR
C 9 CK_M_DDR_N_A0 AR31 AU18 10 CK_M_DDR_P_B1 AU27 AU26 C
SCLK_A0# SDQS_A3# M_DQM_A3 SCLK_B1 SDQS_B3# M_DQM_B3
9 CK_M_DDR_P_A1 AP27 AN18 10 CK_M_DDR_N_B1 AT27 AP23
SCLK_A1 SDM_A3 SCLK_B1# SDM_B3 R283 1% SMRCOMPVOH
9 CK_M_DDR_N_A1 AN27 10 CK_M_DDR_P_B2 AV32
SCLK_A1# M_DATA_A24 SCLK_B2 M_DATA_B24
9 CK_M_DDR_P_A2 AV33 AT18 10 CK_M_DDR_N_B2 AT32 AV24
SCLK_A2 SDQ_A24 M_DATA_A25 SCLK_B2# SDQ_B24 M_DATA_B25 1K-1%
9 CK_M_DDR_N_A2 AW33 AR18 CK_M_DDR_P_B3 AU29 AT23
SCLK_A2# SDQ_A25 M_DATA_A26 RESERVED_16 SDQ_B25 M_DATA_B26 C196
CK_M_DDR_P_A3 AP29 AU21 CK_M_DDR_N_B3 AR29 AT26
RESERVED_3 SDQ_A26 M_DATA_A27 RESERVED_17 SDQ_B26 M_DATA_B27 0603 0.01U
CK_M_DDR_N_A3 AP31 AT21 CK_M_DDR_P_B4 AV29 AP26
RESERVED_4 SDQ_A27 M_DATA_A28 RESERVED_18 SDQ_B27 M_DATA_B28 R12 16V
CK_M_DDR_P_A4 AM26 AP17 CK_M_DDR_N_B4 AW27 AU23
RESERVED_5 SDQ_A28 M_DATA_A29 RESERVED_19 SDQ_B28 M_DATA_B29 Y5V
CK_M_DDR_N_A4 AM27 AN17 CK_M_DDR_P_B5 AN33 AW23 3.01K-1%
RESERVED_6 SDQ_A29 RESERVED_20 SDQ_B29

1%
CK_M_DDR_P_A5 AT33 AP20 M_DATA_A30 CK_M_DDR_N_B5 AP32 AR24 M_DATA_B30
RESERVED_7 SDQ_A30 M_DATA_A31 RESERVED_21 SDQ_B30 M_DATA_B31
CK_M_DDR_N_A5 AU33 AV20 AN26
RESERVED_8 SDQ_A31 SDQ_B31
AR41 M_DQS_P_A4 AW39 M_DQS_P_B4 R284 1% SMRCOMPVOL
SDQS_A4 M_DQS_N_A4 SDQS_B4 M_DQS_N_B4
AR40 AU39
SDQS_A4# M_DQM_A4 SDQS_B4# M_DQM_B4 1K-1%
AU43 AU37
SDM_A4 SDM_B4 C11
AV42 M_DATA_A32 AW37 M_DATA_B32 0603 0.01U
SDQ_A32 M_DATA_A33 SDQ_B32 M_DATA_B33 16V
AU40 AV38
SDQ_A33 M_DATA_A34 SDQ_B33 M_DATA_B34 Y5V
AP42 BB2 AN36
SDQ_A34 M_DATA_A35 RESERVED_1 SDQ_B34 M_DATA_B35
AN39 AW42 AN37
SDQ_A35 M_DATA_A36 RESERVED_2 SDQ_B35 M_DATA_B36
AV40 AN32 AU35
SDQ_A36 M_DATA_A37 RESERVED_3 SDQ_B36 M_DATA_B37
AV41 AM31 AR35
SDQ_A37 AR42 M_DATA_A38 AG32 RESERVED_4 SDQ_B37 AN35 M_DATA_B38
SDQ_A38 M_DATA_A39 RESERVED_5 SDQ_B38 M_DATA_B39
AP41 AF32 AR37
SDQ_A39 RESERVED_6 SDQ_B39
AP21
M_DQS_P_A5 RESERVED_9 M_DQS_P_B5
AL41 AA39 AL35
SDQS_A5 M_DQS_N_A5 RESERVED_8 SDQS_B5 M_DQS_N_B5
AL40 AL34
SDQS_A5# M_DQM_A5 SDQS_B5# M_DQM_B5
AM43 AM37
SDM_A5 SDM_B5
B AN41 M_DATA_A40 AM35 M_DATA_B40 B
SDQ_A40 AM39 M_DATA_A41 SDQ_B40 AM38 M_DATA_B41
SDQ_A41 M_DATA_A42 SDQ_B41 M_DATA_B42
AK42 AJ34
SDQ_A42 AK41 M_DATA_A43 SDQ_B42 AL38 M_DATA_B43
SDQ_A43 M_DATA_A44 SDQ_B43 M_DATA_B44
AN40 AR39
SDQ_A44 AN42 M_DATA_A45 SDQ_B44 AM34 M_DATA_B45
VCCDDR SDQ_A45 M_DATA_A46 SDQ_B45 M_DATA_B46
AL42 AL37
SDQ_A46 AL39 M_DATA_A47 SDQ_B46 AL32 M_DATA_B47
SDQ_A47 SDQ_B47
1%

AG42 M_DQS_P_A6 AG35 M_DQS_P_B6

R295 SDQS_A6 M_DQS_N_A6 SDQS_B6 M_DQS_N_B6
1K-1% SDQS_A6#
SDM_A6
AG41
AG40 M_DQM_A6 DDR_1 SDQS_B6#
SDM_B6
AG36
AG39 M_DQM_B6

MCH_VREF AJ40 M_DATA_A48 AG38 M_DATA_B48

SDQ_A48 M_DATA_A49 SDQ_B48 M_DATA_B49
AH43 AJ38
1%

C197 PLACE SDQ_A49 M_DATA_A50 SDQ_B49 M_DATA_B50

AF39 AF35
R294 0603 0.1U SDQ_A50 M_DATA_A51 SDQ_B50 M_DATA_B51
0.1UF CAP AE40 AF33
1K-1% 16V SDQ_A51 M_DATA_A52 SDQ_B51 M_DATA_B52
CLOSE TO AJ42 AJ37
Y5V SDQ_A52 M_DATA_A53 SDQ_B52 M_DATA_B53
MCH AJ41 AJ35
SDQ_A53 AF41 M_DATA_A54 SDQ_B53 M_DATA_B54
AM21 AG33
SDQ_A54 M_DATA_A55 RESERVED_7 SDQ_B54 M_DATA_B55
AF42 AF34
CAD NOTES : SDQ_A55 MCH_VREF AM6 SDQ_B55
M_DQS_P_A7 SVREF M_DQS_P_B7
PLASE CLOSE TO MCH DDR_0 SDQS_A7
SDQS_A7#
AC42
AC41 M_DQS_N_A7 SDQS_B7
SDQS_B7#
AC36
AC37 M_DQS_N_B7
AC40 M_DQM_A7 AD38 M_DQM_B7
SDM_A7 SDM_B7
AN21 AD40 M_DATA_A56 VCCDDR AD36 M_DATA_B56
RESERVED SDQ_A56 M_DATA_A57 20_1% SMRCOMP0 SDQ_B56 M_DATA_B57
AD43 AN2 AC33
SDQ_A57 M_DATA_A58 R285 1% SMRCOMP1 SRCOMP0 SDQ_B57 M_DATA_B58
AB41 AN3 AA34
SDQ_A58 M_DATA_A59 SMRCOMP2 BB40 SRCOMP1 SDQ_B58 M_DATA_B59
A AA40 AA36 A
SDQ_A59 M_DATA_A60 1% SMRCOMP3 BA40 SRCOMP2 SDQ_B59 M_DATA_B60
AE42 AD34
SDQ_A60 AE41 M_DATA_A61 R287 SMRCOMPVOL AM8 SRCOMP3 SDQ_B60 AF38 M_DATA_B61
SDQ_A61 M_DATA_A62 20_1% SMRCOMPVOH AM10 SMRCOMPVOL SDQ_B61 M_DATA_B62
AC39 AC34
1%

1%

SDQ_A62 M_DATA_A63 C223 SMRCOMPVOH SDQ_B62 M_DATA_B63

AB42 BB19 AA33
SDQ_A63 0603 0.1U R286 R288 RESERVED SDQ_B63
3 OF 7 16V 20_1% 20_1% 4 OF 7
Y5V
Title
946GZ(PL) 946GZ(PL)
MCH LAKEPORT PART B
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 7 of 30
5 4 3 2 1
 A
B
C
D

VCCDDR
VCCDDR
6 OF 7

VCC3

VCC1_25

16V

Y5V
Y5V
0603 0.1U

C176
C221
AJ32 D16

VCC1_25

0805 2.2UF
RESERVED_2 VSS_1
AL31 B21

16V-0805
RESERVED_1 VCCDQ_CRT C21
VCCD_CRT A16

FB6
VCCA_EXP

R261
BA43 B16

16V
Y5V
VCC_SMCLK_5 VCCA_DAC_18

0603 0.1U
SHORT

C156
FB0805_S
BB42 C17

V_CKDDR

MCH MEMORY DECOUPLING

AY42 VCC_SMCLK_4 VCCA_DAC_17 AE2

30_OHM-0805
VCC_SMCLK_3 VCC_EXP_16
BA42 AE3
BB41 VCC_SMCLK_2 VCC_EXP_15 AE4

L1206_S
VCC_SMCLK_1 VCC_EXP_14 AC2
VCC_EXP_13

SHORT
AC3

VCC1_25

16V
25V

Y5V
VCC_EXP_12

0603 0.1U

CAPS FOR SPECIFIC CORE MCH

C224
+ EC29
AL27 AC4

100UF
VCC2_249 VCC_EXP_11
AL29 AD1

X0-SHORT

5
5

VCC2_248 VCC_EXP_10

0603
AK14 AD2

ECD-6-2_5
VCC2_247 VCC_EXP_9
VCC3_DAC
VCCD_CRT

AL13 AD4

0/6
VCCDQ_CRT

R13

Y5V
Y5V
VCC2_246 VCC_EXP_8

0603

C147
U27 AD5

16V
Y5V
VCC2_245 VCC_EXP_7

0603 0.1U
C198
C4
U29 AD6

16V

16V-0805
Y5V
VCC2_244 VCC_EXP_6

0.1U
16V 0.1U

C179
V29 AD7
V30 VCC2_243 VCC_EXP_5 AD8

PCI EXPRESS FILTER

VCC2_242 VCC_EXP_4
Y29 AD9

10V
0805 10U

Y5V
Y5V
VCC2_241 VCC_EXP_3

0603
0805

C154
C261
Y30 AD10

0805 2.2UF 0805 2.2UF

16V
Y5V
VCC2_240 VCC_EXP_2

0603 0.1U
C257
AA29 AD11

16V
10V
10U

Y5V
Y5V

16V-0805
VCC2_239 VCC_EXP_1

C181
C205
AA30 AV18

0.01U
VCC2_238 VCCSM_22
AJ14 AV26
VCC1_25PCIEX

VCC2_237 VCCSM_21
AJ15 AW20

16V
0/6 R14

Y5V
VCC3_DAC
VCC2_236 VCCSM_20

0603 0.1U
C146
AJ17 AW24
VCC2_235 VCCSM_19
AJ18 AY32

VCC1_25PCIEX
VCC2_234 VCCSM_18
AJ20 BB12
VCC2_233 VCCSM_17
AJ21 BB16
VCC2_232 VCCSM_16
VCC3_DAC

AJ23 BB18
VCC2_231 VCCSM_15
AJ24 BB20
VCC2_230 VCCSM_14
AJ26 BB24
VCC2_229 VCCSM_13
Y31 BB26
VCC2_228 VCCSM_12
AA31 BB28

VTT12
VCC2_227 VCCSM_11
AC31 BB32

0805 10U
Y5V
VCC2_226 VCCSM_10

C158
AD31 BB37
VCC2_225 VCCSM_9
AJ13 BB39

0805 10U
VCCDDR

10V-0805
Y5V
VCC2_224 VCCSM_8

C191
AK1 BC14
VCC2_223 VCCSM_7
AK2 BC18

10V-0805
VCC2_222 VCCSM_6
AK3 BC22
VCC2_221 VCCSM_5
AK15 BC26

0805 10U
Y5V
VCC2_220 VCCSM_4

C150
VCC1_25
AK17 BC30

0805 10U

Y5V
VCC2_219 VCCSM_3

6.3V
C266
AK18 BC34

10V-0805
VCC2_218 VCCSM_2
AK20 BC39
VCC2_217 VCCSM_1
AK21 R23
VCC2_216 VTT_46
AK23 R24
VCC2_215 VTT_45
AK24 R26

0805 10U
Y5V
VCC2_214 VTT_44

C145
AK26 R27

4
VCC2_213 VTT_43
AL2 A28

10V-0805
VCC2_212 VTT_42
AL3 A30
VCC2_211 VTT_41
AL4 B27
VCC2_210 VTT_40
AL5 B28
VCC2_209 VTT_39
AL6 B29

4
4

16V
Y5V
VCC2_208 VTT_38

0603 0.1U
C166
AL7 B30

VCC_PLL
VCC2_207 VTT_37
AL8 C27
VCC2_206 VTT_36
AL9 C29
VCC2_205 VTT_35
AL10 C30

0805 10U

Y5V
VCC2_204 VTT_34

6.3V
C276
AL11 D27

16V
Y5V
VCC2_203 VTT_33

0603 0.1U
C168
AL12 D28
AC29 VCC2_202 VTT_32 D29
VCC2_201 VTT_31
AC30 E23

R16
VCC2_200 VTT_30
AD29 E26

16V
Y5V
VCC2_199 VTT_29

0603 0.1U
C277
AD30 E27

16V
Y5V
VCC2_198 VTT_28

0603 0.1U
C167
AF27 E29
FB7

VCC2_197 VTT_27
150 MILS

AF29 F23
and be separate under the MCH

VCC2_196 VTT_26
SHORT

SHORT
FB0805_S

AF30 F24
AG26 VCC2_195 VTT_25 F26
0/6

16V
Y5V
VCC2_194 VTT_24

0603 0.1U
C278
AG27 G23
AG29 VCC2_193 VTT_23 G24
VCC2_192 VTT_22
AG30 G26
VTT12

VCC2_191 VTT_21
VCC1_25

C6
C5

AJ27 H23
16V
16V

Y5V
Y5V

VCC2_190 VTT_20
AJ29 H24
0603 X0.1U
30_OHM-0805 0603 X0.1U

16V
Y5V
VCC2_189 VTT_19

0603 0.1U
C279
AJ30 J23
VCC2_188 VTT_18
VCCD_CRT

AA32 J24
VCCDQ_CRT

VCC2_187 VTT_17
AC32 K23
VCC2_186 VTT_16
AD32 K24
VCC2_185 VTT_15
AF31 L23
VCC2_184 VTT_14
AG31 L24
VCC2_183 VTT_13
AJ31 M23
AK27 VCC2_182 VTT_12 M24
VCC2_181 VTT_11
AK29 M29
VCC2_180 VTT_10
AK30 N23
AL15 VCC2_179 VTT_9 N24
VCC2_178 VTT_8
AL17 N26
VCC2_177 VTT_7
AL18 N29
V_CKDDR

VCC2_176 VTT_6
The plane must be split at the edge of the package

AL20 P23
AL21 VCC2_254 VTT_5 P24
VCC2_253 VTT_4
0603

AL23 P26
VCC2_252 VTT_3
C9
1U

AL24 P27
16V
Y5V

AL26 VCC2_251 VTT_2 P29

VCC2_250 VTT_1
L1
1UH

P14 B17

3
3

VCC_171 VCC3_3
VCC3

P15
VCC_170
FB0603_S
SHORT

R14
VCC_169
R15 C22
VCC_168 VCCA_DPLLB
R17 A22
VCC_167 VCCA_DPLLA
0805

R18 A24
VCC_166 VCCA_MPLL
1U

R20 V31
10V
C10

Y5V

VCC_165 RESERVED_002
U14 C23
U15 VCC_164 VCCA_HPLL B15
VCC_163 VCCA_EXPPLL
VCCDDR

U17 Y32
U18 VCC_162 VCC2 Y11
VCC_161 VCC_79
U19
VCC1_25

VCC_160
U20
U21 VCC_159 P20
L14

VCC_158 VCC_78
1UH

U22 C9

L12
VCC_157 VCC_77
SHORT

10UH
U23 C13
VCC_156 VCC_76
4 mils

FB0805_S

U24 D4
VCC_155 VCC_75

SHORT
FB0805_S
U25 F9
VCC_154 VCC_74
R232

U26 F11
VCC_153 VCC_73
SR1

V14 G2
V15 VCC_152 VCC_72 J2
VCC_151 VCC_71
V17 J3
VCC_150 VCC_70
V18 J6
VCC_149 VCC_69
SHORT

V19 L6
VCC_148 VCC_68
V20 N3
VCCA_HPLL
VCCA_GPLL
VCCA_MPLL

VCC_147 VCC_67
1% 0.5-1%
VCCA_DPLLA
VCCA_DPLLB

V21 N6
0/6S/X

VCC_146 VCC_66
V22 N8
VCC_145 VCC_65

YXG
6.3V
+ EC26 V23 N9
220UF V24 VCC_144 VCC_64 N11
VCC_143 VCC_63
V25 N12
VCC_142 VCC_62
V26 U3
VCC_141 VCC_61

0603
0603
0603
0603
0603

V27 U6
VCC_140 VCC_60

1U
1U

W17 U9

16V
16V
16V
16V
16V

Y5V
Y5V
Y5V
Y5V
Y5V

VCC_139 VCC_59
0.1U
0.1U
0.1U
VCC1_25

C174
C177
C175
C171
C184

W18 U10
VCC_138 VCC_58
W19 U13
VCC_137 VCC_57
W21 V9
VCC_136 VCC_56
W23 V10
W25 VCC_135 VCC_55 V12
VCCA_MPLL
VCCA_HPLL
VCCA_GPLL

VCC_134 VCC_54
VCCA_DPLLB
VCCA_DPLLA

W26 V13
VCC_133 VCC_53
W27 Y6
Y14 VCC_132 VCC_52 Y13

2
2

VCC_131 VCC_51
Y15 Y20
VCC_130 VCC_50
Y17 Y22
VCC_129 VCC_49
Y18 Y24
VCC_128 VCC_48
Y26 AA3
VCC_127 VCC_47
Y27 AA13
VCC_126 VCC_46
AA14 AA19
VCC_125 VCC_45
AA15 AA21
VCC_124 VCC_44
AA17 AA23
VCC_123 VCC_43
AA26 AA25
VCC_122 VCC_42
as short as possible

AA27 AB20
VCC_121 VCC_41
AB17 AB22
VCC_120 VCC_40
AB18 AB24
VCC_119 VCC_39
AB26 AC6
VCC_118 VCC_38
AB27 AC13
VCC_117 VCC_37
AC14 AC19
VCC_116 VCC_36
AC15 AC21
VCC_115 VCC_35
AC17 AC23
AC26 VCC_114 VCC_34 AC25
VCC_113 VCC_80
AC27 AD20
VCC1_25

AD14 VCC_112 VCC_32 AD22

VCC_111 VCC_31
AD15 AD24
VCC_110 VCC_30
AD17 AF11
AD18 VCC_109 VCC_29 AF12
VCC_108 VCC_28
AD26 AF13
VCC_107 VCC_27
AD27 AG2
Title

VCC_106 VCC_26
Size

Date:
C

AE17 AG3
VCC_105 VCC_25
AE19 AG4
VCC_104 VCC_24
AE21 AG5
VCC_103 VCC_23
AE23 AG6
VCC_102 VCC_22
VCC1_25

AE25 AG7
VCC_101 VCC_21
AE26 AG8
VCC_100 VCC_20
AE27 AG9
VCC_99 VCC_19
AF14 AG10
VCC_98 VCC_18
AF15 AG11
VCC_97 VCC_17
Document Number

AF17 AG12
VCC_96 VCC_16
AF18 AG13
VCC_95 VCC_15
AF20 AH1
POWER

AF22 VCC_94 VCC_14 AH2

VCC_93 VCC_13
AH4
Wednesday, July 09, 2008

VCC_12
AF24 AJ2
1
1

VCC_91 VCC_11
COVER SHEET

AF25 AJ3
VCC_90 VCC_10
AF26 AJ4
VCC_89 VCC_9
AG14 AJ5
AG15 VCC_88 VCC_8 AJ6
VCC_87 VCC_7
AG17 AJ7
AG18 VCC_86 VCC_6 AJ8
Sheet
MCH POWER

VCC_85 VCC_5
AG19 AJ9
VCC_84 VCC_4
AG20 AJ10
VCC_83 VCC_3
AG21 AJ11
8

VCC_82 VCC_2
AG22 AJ12
VCC_174 VCC_1
AG23
VCC_173
AG24
VCC_172
of

AG25
VCC_81
1.4
Rev

30
U6F
946GZ(PL)

A
B
C
D
 5 4 3 2 1

241

242

243
M_MAA_A[0..14]
DDR2-A1A
Channel A DIMM1 Channel A DIMM2 M_MAA_A[0..14] 7,11
M_DQS_N_A0 6 236 M_DATA_A63 M_DQS_N_A0 M_DATA_A63 M_DQS_P_A[0..7]

H1

H2

H3
DQS0-(B) DQ63(B) M_DQS_P_A[0..7] 7
M_DQS_P_A0 7 235 M_DATA_A62 M_DQS_P_A0 M_DATA_A62
M_DQS_N_A1 DQS0(B) DQ62(B) M_DATA_A61 M_DQS_N_A1 M_DATA_A61 M_DQS_N_A[0..7]
15 230 M_DQS_N_A[0..7] 7
M_DQS_P_A1 16 DQS1-(B) DQ61(B) 229 M_DATA_A60 M_DQS_P_A1 M_DATA_A60
M_DQS_N_A2 DQS1(B) DQ60(B) M_DATA_A59 M_DQS_N_A2 M_DATA_A59 M_DQM_A[0..7]
27 117 M_DQM_A[0..7] 7
M_DQS_P_A2 DQS2-(B) DQ59(B) M_DATA_A58 M_DQS_P_A2 M_DATA_A58
28 116
M_DQS_N_A3 DQS2(B) DQ58(B) M_DATA_A57 M_DQS_N_A3 M_DATA_A57 M_DATA_A[0..63]
36 111 M_DATA_A[0..63] 7
M_DQS_P_A3 37 DQS3-(B) DQ57(B) 110 M_DATA_A56 M_DQS_P_A3 M_DATA_A56
M_DQS_N_A4 DQS3(B) DQ56(B) M_DATA_A55 M_DQS_N_A4 M_DATA_A55
83 227
M_DQS_P_A4 DQS4-(B) DQ55(B) M_DATA_A54 M_DQS_P_A4 M_DATA_A54
84 226
M_DQS_N_A5 DQS4(B) DQ54(B) M_DATA_A53 M_DQS_N_A5 M_DATA_A53
D 92 218 D
M_DQS_P_A5 93 DQS5-(B) DQ53(B) 217 M_DATA_A52 M_DQS_P_A5 M_DATA_A52
M_DQS_N_A6 DQS5(B) DQ52(B) M_DATA_A51 M_DQS_N_A6 M_DATA_A51 M_SBA_A2
104 108 M_SBA_A2 7,11
M_DQS_P_A6 DQS6-(B) DQ51(B) M_DATA_A50 VCCDDR M_DQS_P_A6 M_DATA_A50
105 107
M_DQS_N_A7 DQS6(B) DQ50(B) M_DATA_A49 M_DQS_N_A7 M_DATA_A49 SMBDATA
113 99 SMBDATA 3,10,12,15,17,18,19,23
M_DQS_P_A7 114 DQS7-(B) DQ49(B) 98 M_DATA_A48 M_DQS_P_A7 M_DATA_A48 SMBCLK
DQS7(B) DQ48(B) SMBCLK 3,10,12,15,17,18,19,23
45 215 M_DATA_A47 M_DATA_A47
DQS8-(B) DQ47(B) M_DATA_A46 M_DATA_A46
46 214
M_DQM_A0 DQS8(B) DQ46(B) M_DATA_A45 R260 M_DQM_A0 M_DATA_A45
125 209
DQS9(B) DQ45(B) M_DATA_A44 1K-1% M_DATA_A44
126 208
DQS9-(B) DQ44(B)

1%
M_DQM_A1 134 96 M_DATA_A43 M_DQM_A1 M_DATA_A43
DQS10(B) DQ43(B) M_DATA_A42 M_DATA_A42
135 95
M_DQM_A2 DQS10-(B) DQ42(B) M_DATA_A41 DIMM_VREF_A M_DQM_A2 M_DATA_A41
146 90
DQS11(B) DQ41(B) M_DATA_A40 M_DATA_A40
147 89
M_DQM_A3 DQS11-(B) DQ40(B) M_DATA_A39 M_DQM_A3 M_DATA_A39
155 206
156 DQS12(B) DQ39(B) 205 M_DATA_A38 C200 R253 M_DATA_A38 VCCDDR
M_DQM_A4 DQS12-(B) DQ38(B) M_DATA_A37 0603 0.1U 1K-1% M_DQM_A4 M_DATA_A37
202 200
DQS13(B) DQ37(B)

1%
203 199 M_DATA_A36 Y5V M_DATA_A36
M_DQM_A5 DQS13-(B) DQ36(B) M_DATA_A35 16V M_DQM_A5 M_DATA_A35
211 87
DQS14(B) DQ35(B) M_DATA_A34 M_DATA_A34
212 86
M_DQM_A6 DQS14-(B) DQ34(B) M_DATA_A33 M_DQM_A6 M_DATA_A33
223 81
DQS15(B) DQ33(B) M_DATA_A32 M_DATA_A32
224 80
M_DQM_A7 DQS15-(B) DQ32(B) M_DATA_A31 M_DQM_A7 M_DATA_A31
232 159
DQS16(B) DQ31(B) M_DATA_A30 M_DATA_A30
233 158
DQS16-(B) DQ30(B) M_DATA_A29 M_DATA_A29
164 153
DQS17(B) DQ29(B) M_DATA_A28 M_DATA_A28
165 152
DQS17-(B) DQ28(B) M_DATA_A27 M_DATA_A27
40
DQ27(B) M_DATA_A26 M_DATA_A26
42 39
CB0(B) DQ26(B) M_DATA_A25 M_DATA_A25
43 34
CB1(B) DQ25(B) M_DATA_A24 M_DATA_A24
C 48 33 C
CB2(B) DQ24(B) M_DATA_A23 VCCDDR M_DATA_A23
49 150
CB3(B) DQ23(B) M_DATA_A22 M_DATA_A22
161 149
CB4(B) DQ22(B) M_DATA_A21 M_DATA_A21
162 144
CB5(B) DQ21(B) M_DATA_A20 DDR2-A1B M_DATA_A20
167 143
CB6(B) DQ20(B) M_DATA_A19 M_DATA_A19
168 31 51 2
CB7(B) DQ19(B) M_DATA_A18 VDDQ1 (P) VSS1(P) M_DATA_A18
30 56 5
DQ18(B) M_DATA_A17 VDDQ2 (P) VSS2(P) M_DATA_A17
55 25 170 8
SMBDATA RC02(B) DQ17(B) M_DATA_A16 VDDQ3 (P) VSS3(P) SMBDATA M_DATA_A16
119 24 175 11
SMBCLK SDA(B) DQ16(B) M_DATA_A15 VDDQ4 (P) VSS4(P) SMBCLK M_DATA_A15 VCC3
120 141 62 14
SCL(B) DQ15(B) M_DATA_A14 VDDQ5 (P) VSS5(P) M_DATA_A14
140 72 17
M_MAA_A0 DQ14(B) M_DATA_A13 VDDQ6 (P) VSS6(P) M_MAA_A0 M_DATA_A13
188 132 75 20
M_MAA_A1 183 A0(I) DQ13(B) 131 M_DATA_A12 78 VDDQ7 (P) VSS7(P) 23 M_MAA_A1 M_DATA_A12
M_MAA_A2 A1(I) DQ12(B) M_DATA_A11 VDDQ8 (P) VSS8(P) M_MAA_A2 M_DATA_A11
63 22 181 29
M_MAA_A3 A2(I) DQ11(B) M_DATA_A10 VDDQ9 (P) VSS9(P) M_MAA_A3 M_DATA_A10
182 21 191 32
M_MAA_A4 A3(I) DQ10(B) M_DATA_A9 VDDQ10 (P) VSS10(P) M_MAA_A4 M_DATA_A9 VCC3
61 13 194 35
M_MAA_A5 A4(I) DQ9(B) M_DATA_A8 VDDQ11 (P) VSS11(P) M_MAA_A5 M_DATA_A8
60 12 53 38
M_MAA_A6 A5(I) DQ8(B) M_DATA_A7 VDD1 (P) VSS12(P) M_MAA_A6 M_DATA_A7
180 129 59 41
M_MAA_A7 A6(I) DQ7(B) M_DATA_A6 VDD2 (P) VSS13(P) M_MAA_A7 M_DATA_A6
58 128 64 44
M_MAA_A8 A7(I) DQ6(B) M_DATA_A5 VDD3 (P) VSS62(P) M_MAA_A8 M_DATA_A5
179 123 67 47
M_MAA_A9 A8(I) DQ5(B) M_DATA_A4 VDD4 (P) VSS14(P) M_MAA_A9 M_DATA_A4
177 122 69 50
M_MAA_A10 A9(I) DQ4(B) M_DATA_A3 VDD5 (P) VSS15(P) M_MAA_A10 M_DATA_A3
70 10 172 65 7,11 M_SCKE_A1
M_MAA_A11 57 A10(I) DQ3(B) 9 M_DATA_A2 178 VDD6 (P) VSS16(P) 66 M_MAA_A11 M_DATA_A2
A11(I) DQ2(B) VDD7(P) VSS17(P) 7,11 M_SCKE_A0
M_MAA_A12 176 4 M_DATA_A1 184 79 M_MAA_A12 M_DATA_A1
M_MAA_A13 A12(I) DQ1(B) M_DATA_A0 VCC3 VDD8(P) VSS18(P) M_MAA_A13 M_DATA_A0
196 3 189 82 7,11 M_SBA_A0
M_MAA_A14 A13(I) DQ0(B) VDD9(P) VSS19(P) M_MAA_A14
174 19 197 85 7,11 M_SBA_A1
A14(I) NC1(B) VDD10(P) VSS20(P)
173 102 187 88
M_SBA_A2 A15(I) NC2(B) VDD11(P) VSS21(P) M_SBA_A2
54 68 238 91
A16(I) BLACK NC3(B) VDDSPD(P) VSS22(P)
94 7,11 M_WE_A
VSS23(P)
B 97 7,11 M_RAS_A B
SK-D240P VSS24(P) 100
DDRII DIMM
ADDRESS=000 VSS25(P) ADDRESS=001 7,11 M_CAS_A
103 7,11 M_SCS_A1
239 VSS26(P) 106
SA0 (B) VSS27(P) 7,11 M_SCS_A0
240 109
101 SA1 (B) VSS28(P) 112
SA2 (B) VSS29(P) 7,11 M_SODT_A1
115 7,11 M_SODT_A0
52 VSS30(P) 118
7,11 M_SCKE_A0 CKE0(I) VSS31(P)
7,11 M_SCKE_A1 171 121 DIMM_VREF_A
CKE1(I) VSS32(P) 124
VSS33(P)
7,11 M_SBA_A0 71 127
BA0 (I) VSS34(P)
7,11 M_SBA_A1 190 130
BA1 (I) VSS35(P)
133
VSS36(P)
18 136
RESET-(I) VSS37(P)
7,11 M_WE_A 73 139
WE-(I) VSS38(P)
7,11 M_RAS_A 192 142
RAS-(I) VSS39(P)
7,11 M_CAS_A 74 145
CAS-(I) VSS40(P)
7,11 M_SCS_A0 193 148 7 CK_M_DDR_P_A1
S-0(I) VSS41(P)
7,11 M_SCS_A1 76 154 7 CK_M_DDR_N_A1
S-1(I) VSS42(P) 157
VSS43(P) 7 CK_M_DDR_P_A0
7,11 M_SODT_A0 195 160 7 CK_M_DDR_N_A0
77 ODT0(I) VSS44(P) 163
7,11 M_SODT_A1 ODT1(I) VSS45(P) 7 CK_M_DDR_P_A2
166 7 CK_M_DDR_N_A2
DIMM_VREF_A 1 VSS46(P) 169
VREF(B) VSS47(P)
198
C211 VSS48(P) 201
PLACE CLOSE 0603 0.1U VSS49(P)
204
TO DIMM PIN 16V VSS50(P)
207
Y5V VSS51(P)
210
VSS52(P)
A 213 A
VSS53(P)
216
VSS54(P) 219
VSS55(P)
7 CK_M_DDR_P_A1 137 222
CK1(I) VSS56(P)
7 CK_M_DDR_N_A1 138 225
CK-1(I) VSS57(P)
7 CK_M_DDR_P_A0 185 228
186 CK0(I) VSS58(P) 231
7 CK_M_DDR_N_A0 CK-0(I) VSS59(P)
7 CK_M_DDR_P_A2 220 234
221 CK2(I) VSS60(P) 237 Title
7 CK_M_DDR_N_A2 CK-2(I) VSS61(P)
26
VSS63(P)
VSS64(P)
151 DDR II CHANNEL A
Size Document Number Rev
DDRII DIMM Custom 1.4
Lakeport CRB
Date: Wednesday, July 09, 2008 Sheet 9 of 30
5 4 3 2 1
 5 4 3 2 1

241

242

243
DDR2-B1A
Channel B DIMM1 Channel B DIMM2
M_DQS_N_B0 6 236 M_DATA_B63 M_DQS_N_B0 M_DATA_B63 M_MAA_B[0..14]

H1

H2

H3
DQS0-(B) DQ63(B) M_MAA_B[0..14] 7,11
M_DQS_P_B0 7 235 M_DATA_B62 M_DQS_P_B0 M_DATA_B62
M_DQS_N_B1 DQS0(B) DQ62(B) M_DATA_B61 M_DQS_N_B1 M_DATA_B61 M_DQS_P_B[0..7]
15 230 M_DQS_P_B[0..7] 7
M_DQS_P_B1 16 DQS1-(B) DQ61(B) 229 M_DATA_B60 M_DQS_P_B1 M_DATA_B60
M_DQS_N_B2 DQS1(B) DQ60(B) M_DATA_B59 M_DQS_N_B2 M_DATA_B59 M_DQS_N_B[0..7]
27 117 M_DQS_N_B[0..7] 7
M_DQS_P_B2 DQS2-(B) DQ59(B) M_DATA_B58 M_DQS_P_B2 M_DATA_B58
28 116
M_DQS_N_B3 DQS2(B) DQ58(B) M_DATA_B57 M_DQS_N_B3 M_DATA_B57 M_DQM_B[0..7]
36 111 M_DQM_B[0..7] 7
M_DQS_P_B3 37 DQS3-(B) DQ57(B) 110 M_DATA_B56 M_DQS_P_B3 M_DATA_B56
M_DQS_N_B4 DQS3(B) DQ56(B) M_DATA_B55 M_DQS_N_B4 M_DATA_B55 M_DATA_B[0..63]
83 227 M_DATA_B[0..63] 7
M_DQS_P_B4 DQS4-(B) DQ55(B) M_DATA_B54 M_DQS_P_B4 M_DATA_B54
84 226
M_DQS_N_B5 DQS4(B) DQ54(B) M_DATA_B53 M_DQS_N_B5 M_DATA_B53
D 92 218 D
M_DQS_P_B5 93 DQS5-(B) DQ53(B) 217 M_DATA_B52 M_DQS_P_B5 M_DATA_B52
M_DQS_N_B6 DQS5(B) DQ52(B) M_DATA_B51 M_DQS_N_B6 M_DATA_B51
104 108
M_DQS_P_B6 DQS6-(B) DQ51(B) M_DATA_B50 M_DQS_P_B6 M_DATA_B50 M_SBA_B2
105 107 M_SBA_B2 7,11
M_DQS_N_B7 DQS6(B) DQ50(B) M_DATA_B49 M_DQS_N_B7 M_DATA_B49
113 99
M_DQS_P_B7 114 DQS7-(B) DQ49(B) 98 M_DATA_B48 M_DQS_P_B7 M_DATA_B48 SMBDATA
DQS7(B) DQ48(B) SMBDATA 3,9,12,15,17,18,19,23
45 215 M_DATA_B47 M_DATA_B47 SMBCLK SMBCLK 3,9,12,15,17,18,19,23
DQS8-(B) DQ47(B) M_DATA_B46 M_DATA_B46
46 214
M_DQM_B0 DQS8(B) DQ46(B) M_DATA_B45 M_DQM_B0 M_DATA_B45
125 209
DQS9(B) DQ45(B) M_DATA_B44 M_DATA_B44
126 208
M_DQM_B1 DQS9-(B) DQ44(B) M_DATA_B43 M_DQM_B1 M_DATA_B43
134 96
DQS10(B) DQ43(B) M_DATA_B42 M_DATA_B42
135 95
M_DQM_B2 DQS10-(B) DQ42(B) M_DATA_B41 M_DQM_B2 M_DATA_B41
146 90
DQS11(B) DQ41(B) M_DATA_B40 M_DATA_B40
147 89
M_DQM_B3 DQS11-(B) DQ40(B) M_DATA_B39 M_DQM_B3 M_DATA_B39
155 206
156 DQS12(B) DQ39(B) 205 M_DATA_B38 M_DATA_B38
M_DQM_B4 DQS12-(B) DQ38(B) M_DATA_B37 M_DQM_B4 M_DATA_B37
202 200
DQS13(B) DQ37(B) M_DATA_B36 M_DATA_B36
203 199
M_DQM_B5 DQS13-(B) DQ36(B) M_DATA_B35 M_DQM_B5 M_DATA_B35 VCCDDR
211 87
DQS14(B) DQ35(B) M_DATA_B34 M_DATA_B34
212 86
M_DQM_B6 DQS14-(B) DQ34(B) M_DATA_B33 M_DQM_B6 M_DATA_B33
223 81
DQS15(B) DQ33(B) M_DATA_B32 M_DATA_B32
224 80
M_DQM_B7 DQS15-(B) DQ32(B) M_DATA_B31 M_DQM_B7 M_DATA_B31
232 159
DQS16(B) DQ31(B) M_DATA_B30 M_DATA_B30
233 158
DQS16-(B) DQ30(B) M_DATA_B29 M_DATA_B29
164 153
DQS17(B) DQ29(B) M_DATA_B28 M_DATA_B28
165 152
DQS17-(B) DQ28(B) M_DATA_B27 M_DATA_B27
40
DQ27(B) M_DATA_B26 M_DATA_B26
42 39
CB0(B) DQ26(B) M_DATA_B25 M_DATA_B25
43 34
CB1(B) DQ25(B) M_DATA_B24 VCCDDR M_DATA_B24
C 48 33 C
CB2(B) DQ24(B) M_DATA_B23 M_DATA_B23
49 150
CB3(B) DQ23(B) M_DATA_B22 M_DATA_B22
161 149
CB4(B) DQ22(B) M_DATA_B21 DDR2-B1B M_DATA_B21
162 144
CB5(B) DQ21(B) M_DATA_B20 M_DATA_B20
167 143 51 2
CB6(B) DQ20(B) M_DATA_B19 VDDQ1 (P) VSS1(P) M_DATA_B19
168 31 56 5
CB7(B) DQ19(B) M_DATA_B18 VDDQ2 (P) VSS2(P) M_DATA_B18
30 170 8
DQ18(B) M_DATA_B17 VDDQ3 (P) VSS3(P) M_DATA_B17
55 25 175 11
SMBDATA RC02(B) DQ17(B) M_DATA_B16 VDDQ4 (P) VSS4(P) SMBDATA M_DATA_B16
119 24 62 14
SMBCLK SDA(B) DQ16(B) M_DATA_B15 VDDQ5 (P) VSS5(P) SMBCLK M_DATA_B15
120 141 72 17
SCL(B) DQ15(B) M_DATA_B14 VDDQ6 (P) VSS6(P) M_DATA_B14
140 75 20
M_MAA_B0 DQ14(B) M_DATA_B13 VDDQ7 (P) VSS7(P) M_MAA_B0 M_DATA_B13
188 132 78 23
M_MAA_B1 183 A0(I) DQ13(B) 131 M_DATA_B12 181 VDDQ8 (P) VSS8(P) 29 M_MAA_B1 M_DATA_B12 VCC3
M_MAA_B2 A1(I) DQ12(B) M_DATA_B11 VDDQ9 (P) VSS9(P) M_MAA_B2 M_DATA_B11
63 22 191 32
M_MAA_B3 A2(I) DQ11(B) M_DATA_B10 VDDQ10 (P) VSS10(P) M_MAA_B3 M_DATA_B10
182 21 194 35
M_MAA_B4 A3(I) DQ10(B) M_DATA_B9 VDDQ11 (P) VSS11(P) M_MAA_B4 M_DATA_B9
61 13 53 38
M_MAA_B5 A4(I) DQ9(B) M_DATA_B8 VDD1 (P) VSS12(P) M_MAA_B5 M_DATA_B8
60 12 59 41
M_MAA_B6 A5(I) DQ8(B) M_DATA_B7 VDD2 (P) VSS13(P) M_MAA_B6 M_DATA_B7
180 129 64 44
M_MAA_B7 A6(I) DQ7(B) M_DATA_B6 VDD3 (P) VSS62(P) M_MAA_B7 M_DATA_B6
58 128 67 47
M_MAA_B8 A7(I) DQ6(B) M_DATA_B5 VDD4 (P) VSS14(P) M_MAA_B8 M_DATA_B5
179 123 69 50
M_MAA_B9 A8(I) DQ5(B) M_DATA_B4 VDD5 (P) VSS15(P) M_MAA_B9 M_DATA_B4
177 122 172 65
M_MAA_B10 A9(I) DQ4(B) M_DATA_B3 VDD6 (P) VSS16(P) M_MAA_B10 M_DATA_B3
70 10 178 66
M_MAA_B11 57 A10(I) DQ3(B) 9 M_DATA_B2 184 VDD7(P) VSS17(P) 79 M_MAA_B11 M_DATA_B2
M_MAA_B12 A11(I) DQ2(B) M_DATA_B1 VCC3 VDD8(P) VSS18(P) M_MAA_B12 M_DATA_B1
176 4 189 82
M_MAA_B13 A12(I) DQ1(B) M_DATA_B0 VDD9(P) VSS19(P) M_MAA_B13 M_DATA_B0
196 3 197 85 7,11 M_SCKE_B1
M_MAA_B14 A13(I) DQ0(B) VDD10(P) VSS20(P) M_MAA_B14
174 19 187 88 7,11 M_SCKE_B0
A14(I) NC1(B) VDD11(P) VSS21(P)
173 102 238 91
M_SBA_B2 A15(I) NC2(B) VDDSPD(P) VSS22(P) M_SBA_B2
54 68 94 7,11 M_SBA_B0
A16(I) BLACK NC3(B) VSS23(P)
97 7,11 M_SBA_B1
VSS24(P)
B 100 B
SK-D240P VSS25(P) 103
DDRII DIMM
ADDRESS=010 VSS26(P)
239 106 ADDRESS=011 7,11 M_WE_B
240 SA0 (B) VSS27(P) 109
SA1 (B) VSS28(P) 7,11 M_RAS_B
101 112 7,11 M_CAS_B
SA2 (B) VSS29(P) 115
VSS30(P) 7,11 M_SCS_B1
7,11 M_SCKE_B0 52 118 7,11 M_SCS_B0
171 CKE0(I) VSS31(P) 121
7,11 M_SCKE_B1 CKE1(I) VSS32(P)
124 7,11 M_SODT_B1
71 VSS33(P) 127
7,11 M_SBA_B0 BA0 (I) VSS34(P) 7,11 M_SODT_B0
7,11 M_SBA_B1 190 130
BA1 (I) VSS35(P) DIMM_VREF_B
133
VSS36(P)
18 136
RESET-(I) VSS37(P)
7,11 M_WE_B 73 139
WE-(I) VSS38(P)
7,11 M_RAS_B 192 142
VCCDDR RAS-(I) VSS39(P)
7,11 M_CAS_B 74 145
CAS-(I) VSS40(P)
7,11 M_SCS_B0 193 148
S-0(I) VSS41(P)
7,11 M_SCS_B1 76 154
S-1(I) VSS42(P)
157
195 VSS43(P) 160
7,11 M_SODT_B0 ODT0(I) VSS44(P)
R259 7,11 M_SODT_B1 77 163 7 CK_M_DDR_P_B1
1K-1% ODT1(I) VSS45(P) 166
VSS46(P) 7 CK_M_DDR_N_B1
1%

DIMM_VREF_B 1 169 7 CK_M_DDR_P_B0

VREF(B) VSS47(P) 198
VSS48(P) 7 CK_M_DDR_N_B0
DIMM_VREF_B C199 201 7 CK_M_DDR_P_B2
PLACE CLOSE 0603 0.1U VSS49(P) 204
VSS50(P) 7 CK_M_DDR_N_B2
TO DIMM PIN 16V 207
C210 R252 Y5V VSS51(P)
210
0603 0.1U 1K-1% VSS52(P)
213
VSS53(P)
1%

A Y5V 216 A
16V VSS54(P)
219
137 VSS55(P) 222
7 CK_M_DDR_P_B1 CK1(I) VSS56(P)
7 CK_M_DDR_N_B1 138 225
CK-1(I) VSS57(P)
7 CK_M_DDR_P_B0 185 228
CK0(I) VSS58(P)
7 CK_M_DDR_N_B0 186 231
220 CK-0(I) VSS59(P) 234
7 CK_M_DDR_P_B2 CK2(I) VSS60(P)
7 CK_M_DDR_N_B2 221 237
CK-2(I) VSS61(P) 26 Title
VSS63(P)
151
VSS64(P) DDR II CHANNEL B
DDRII DIMM Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 10 of 30
5 4 3 2 1
 5 4 3 2 1

M_MAA_A[0..14] DDRVTT
M_MAA_A[0..14] 7,9 DDRVTT

M_MAA_A2 R145 33 M_MAA_B2 R149 33

M_MAA_A6 2 33/8P4R
1
M_MAA_B[0..14] M_MAA_A4 4 3 M_MAA_B5 2 33/8P4R
1
M_MAA_B[0..14] 7,10
D M_MAA_A3 6 5 M_MAA_B4 4 3 D
M_MAA_A1 8 7 M_MAA_B3 6 5
M_MAA_A9 RN26 2 33/8P4R
1 M_MAA_B1 8 7
M_MAA_A7 4 3 M_MAA_B9 RN36 2 33/8P4R
1
M_MAA_A8 6 5 M_MAA_B7 4 3
M_MAA_A5 8 7 M_MAA_B8 6 5
VCCDDR M_MAA_A14 RN27 2 33/8P4R
1 M_MAA_B6 8 7
4 3 RN37 2 33/8P4R
1
7,9 M_SBA_A2 7,10 M_SBA_B2
M_MAA_A12 6 5 M_MAA_B14 4 3
M_MAA_A11 8 7 M_MAA_B12 6 5
M_MAA_A0 RN28 2 33/8P4R
1 M_MAA_B11 8 7
C172 C265 C180 4 3 M_MAA_B0 RN38 2 33/8P4R
1
7,9 M_SBA_A1
0603 1U 0603 1U 0603 1U M_MAA_A10 6 5 7,10 M_SBA_B1 4 3
16V 16V 16V 7,9 M_SBA_A0 8 7 M_MAA_B10 6 5
Y5V Y5V Y5V RN30 7,10 M_SBA_B0 8 7
RN39

VCCDDR

2 33/8P4R
1 2 33/8P4R
1
7,9 M_RAS_A 7,10 M_RAS_B
7,9 M_WE_A 4 3 7,10 M_WE_B 4 3
7,9 M_CAS_A 6 5 7,10 M_CAS_B 6 5
C183 C108 C216 C264 C263 M_MAA_A13 8 7 M_MAA_B13 8 7
0603 1U 0603 1U 0603 1U 0603 1U 0603 1U RN31 RN40
16V 16V 16V 16V 16V
Y5V Y5V Y5V Y5V Y5V

C C

2 43/8P4R
1 2 43/8P4R
1
7,9 M_SCS_A0 7,10 M_SCS_B1
7,9 M_SCS_A1 4 3 7,10 M_SCS_B0 4 3
Place Near DIMM 7,9 M_SODT_A0 6 5 7,10 M_SODT_B0 6 5
7,9 M_SODT_A1 8 7 7,10 M_SODT_B1 8 7
RN33 RN42
7,9 M_SCKE_A0 R172 43 7,10 M_SCKE_B0 R114 43
7,9 M_SCKE_A1 R177 43 7,10 M_SCKE_B1 R112 43

VCCDDR

C87 C77 C86 C109 C258 C67

0603 0.1U 0603 0.1U 0603 0.1U 0603 1U 0603 1U 0603 0.1U
16V Y5V 16V 16V 16V Y5V
DDRVTT Y5V 16V Y5V Y5V Y5V 16V DDRVTT
CH_A TERMINATION USE CH_B TERMINATION USE
B B

C117 C84 C116 C96 C76 C68 C133 C112 C60 C85
0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U
16V 16V 16V 16V Y5V Y5V 16V 16V Y5V Y5V
Y5V Y5V Y5V Y5V 16V 16V Y5V Y5V 16V 16V

place at left place at left

and right ends Channel B Address / and right ends
of VTT island Control stitching Caps of VTT island

A A

Title

DDR II TERMINATION
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 11 of 30
5 4 3 2 1
 5 4 3 2 1

3V_DUAL
+12V
VCC3 VCC3

C274 PLTRST# PLTRST# 6,15,17,19,23

1
2
3
4
0603 0.1U PCIEXP1
16V WAKE#

H1
H2
H3
H4
WAKE# 15,17,19
Y5V B1 A1
12V_1(P) PRSNT1#(B)
B2 A2
B3 12V_2(P) 12V_4(P) A3
12V_3(P) 12V_5(P)
B4 A4
SMBCLK GND_1(P) GND_3(P)
B5 A5
SMCLK(B) JTAG2(B)

0402 0402
D 6 GEXP_TXP_0 C227 0.1U GEXP_TXP_C_0 SMBDATA B6 A6 SMBDATA SMBDATA 3,9,10,15,17,18,19,23 D
16V Y5V B7 SMDAT(B) JTAG3(B) A7 SMBCLK
GND_2(P) JTAG4(B) SMBCLK 3,9,10,15,17,18,19,23
6 GEXP_TXN_0 C228 0.1U GEXP_TXN_C_0 B8 A8
16V Y5V 3_3V_1(P) JTAG5(B)
B9 A9
JTAG1(B) 3_3V_2(P)
B10 A10
3_3VAUX(I) 3_3V_3(P)
0402 0402
6 GEXP_TXP_1 C243 0.1U GEXP_TXP_C_1 WAKE# B11 A11 PLTRST#
16V Y5V WAKE*(B) PWRGD(I)
6 GEXP_TXN_1 C244 0.1U GEXP_TXN_C_1
16V Y5V KEY
B12 A12
RSVD_1(B) GND_7(P)
0402 0402

6 GEXP_TXP_2 C229 0.1U GEXP_TXP_C_2 B13 A13 CK_PE_X16_P 3

16V Y5V GEXP_TXP_C_0 GND_4(P) REFCLK+(I)
B14 A14 CK_PE_X16_N 3
C230 0.1U GEXP_TXN_C_2 GEXP_TXN_C_0 HSOP0(I) REFCLK-(I)
6 GEXP_TXN_2 B15 A15
16V Y5V HSON0(I) GND_8(P)
B16 A16 GEXP_RXP_0 6
GND_5(P) HSIP0(O)
6 SDVO_CLK B17 A17 GEXP_RXN_0 6
PRSNT2#_1(I) HSIN0(O)
0402 0402

6 GEXP_TXP_3 C231 0.1U GEXP_TXP_C_3 B18 A18

16V Y5V GND_6(P) GND_9(P)
6 GEXP_TXN_3 C232 0.1U GEXP_TXN_C_3
16V Y5V
GEXP_TXP_C_1 B19 A19
HSOP1(I) RSVD_3(B)
0402 0402

6 GEXP_TXP_4 C233 0.1U GEXP_TXP_C_4 GEXP_TXN_C_1 B20 A20

16V Y5V HSON1(I) GND_16(P)
B21 A21 GEXP_RXP_1 6
C234 0.1U GEXP_TXN_C_4 GND_10(P) HSIP1(O)
6 GEXP_TXN_4 B22 A22 GEXP_RXN_1 6
16V Y5V GEXP_TXP_C_2 GND_11(P) HSIN1(O)
B23 A23
GEXP_TXN_C_2 HSOP2(I) GND_17(P)
B24 A24
HSON2(I) GND_18(P)
0402 0402

6 GEXP_TXP_5 C237 0.1U GEXP_TXP_C_5 B25 A25 GEXP_RXP_2 6

16V Y5V GND_12(P) HSIP2(O)
B26 A26 GEXP_RXN_2 6
C238 0.1U GEXP_TXN_C_5 GEXP_TXP_C_3 GND_13(P) HSIN2(O)
6 GEXP_TXN_5 B27 A27
16V Y5V GEXP_TXN_C_3 HSOP3(I) GND_19(P)
B28 A28
HSON3(I) GND_20(P)
C B29 A29 GEXP_RXP_3 6 C
GND_14(P) HSIP3(O) +12V
0402 0402

6 GEXP_TXP_6 C239 0.1U GEXP_TXP_C_6 B30 A30 GEXP_RXN_3 6

16V Y5V RSVD_2(B) HSIN3(O)
6 SDVO_DATA B31 A31
C240 0.1U GEXP_TXN_C_6 PRSNT2#_2(I) GND_21(P)
6 GEXP_TXN_6 B32 A32
16V Y5V GND_15(P) RSVD_4(B)
0402 0402

6 GEXP_TXP_7 C235 0.1U GEXP_TXP_C_7 C340 + EC31

16V Y5V GEXP_TXP_C_4 B33 A33 0603 0.1U 470UF
C236 0.1U GEXP_TXN_C_7 GEXP_TXN_C_4 HSOP4(I) RSVD_5(B) 16V 16V
6 GEXP_TXN_7 B34 A34
16V Y5V HSON4(I) GND_30(P) Y5V
B35 A35 GEXP_RXP_4 6 PS
GND_22(P) HSIP4(O)
B36 A36 GEXP_RXN_4 6
GEXP_TXP_C_5 GND_23(P) HSIN4(O)
B37 A37
GEXP_TXP_C_8 GEXP_TXN_C_5 B38 HSOP5(I) GND_31(P) A38
6 GEXP_TXP_8 HSON5(I) GND_32(P)
B39 A39 GEXP_RXP_5 6
GEXP_TXN_C_8 GND_24(P) HSIP5(O)
6 GEXP_TXN_8 B40 A40 GEXP_RXN_5 6
GEXP_TXP_C_6 GND_25(P) HSIN5(O)
B41 A41
GEXP_TXN_C_6 HSOP6(I) GND_33(P)
B42 A42
GEXP_TXP_C_9 HSON6(I) GND_34(P)
6 GEXP_TXP_9 B43 A43 GEXP_RXP_6 6
GND_26(P) HSIP6(O) VCC3
B44 A44 GEXP_RXN_6 6
GEXP_TXN_C_9 GEXP_TXP_C_7 GND_27(P) HSIN6(O)
6 GEXP_TXN_9 B45 A45
GEXP_TXN_C_7 HSOP7(I) GND_35(P)
B46 A46
HSON7(I) GND_36(P)
B47 A47 GEXP_RXP_7 6
GEXP_TXP_C_10 B48 GND_28(P) HSIP7(O) A48
6 GEXP_TXP_10 6 EXP_EN_HDR PRSNT2#_3(B) HSIN7(O) GEXP_RXN_7 6
B49
GND_29(P) GND_37(P)
A49 + EC32
6 GEXP_TXN_10 GEXP_TXN_C_10 1000UF
6.3V
ECD-8-3_5
6 GEXP_TXP_11 GEXP_TXP_C_11 GEXP_TXP_C_8 B50 A50
GEXP_TXN_C_8 HSOP8(I) RSVD_7(B)
B51 A51
GEXP_TXN_C_11 HSON8(I) GND_53(P)
B 6 GEXP_TXN_11 B52 A52 GEXP_RXP_8 6 B
B53 GND_38(P) HSIP8(O) A53
GND_39(P) HSIN8(O) GEXP_RXN_8 6
GEXP_TXP_C_9 B54 A54
GEXP_TXP_C_12 GEXP_TXN_C_9 B55 HSOP9(I) GND_54(P) A55
6 GEXP_TXP_12 HSON9(I) GND_55(P)
B56 A56 GEXP_RXP_9 6
GEXP_TXN_C_12 B57 GND_40(P) HSIP9(O) A57
6 GEXP_TXN_12 GND_41(P) HSIN9(O) GEXP_RXN_9 6
GEXP_TXP_C_10 B58 A58
GEXP_TXN_C_10 B59 HSOP10(I) GND_56(P) A59
GEXP_TXP_C_13 HSON10(I) GND_57(P)
6 GEXP_TXP_13 B60 A60 GEXP_RXP_10 6
B61 GND_42(P) HSIP10(O) A61
GND_43(P) HSIN10(O) GEXP_RXN_10 6
6 GEXP_TXN_13 GEXP_TXN_C_13 GEXP_TXP_C_11 B62 A62
GEXP_TXN_C_11 HSOP11(I) GND_58(P)
B63 A63
HSON11(I) GND_59(P)
B64 A64 GEXP_RXP_11 6
GEXP_TXP_C_14 GND_44(P) HSIP11(O)
6 GEXP_TXP_14 B65 A65 GEXP_RXN_11 6
GEXP_TXP_C_12 GND_45(P) HSIN11(O)
B66 A66
GEXP_TXN_C_14 GEXP_TXN_C_12 HSOP12(I) GND_60(P)
6 GEXP_TXN_14 B67 A67
HSON12(I) GND_61(P)
B68 A68 GEXP_RXP_12 6
GND_46(P) HSIP12(O)
B69 A69 GEXP_RXN_12 6
GEXP_TXP_C_15 GEXP_TXP_C_13 GND_47(P) HSIN12(O)
6 GEXP_TXP_15 B70 A70
GEXP_TXN_C_13 B71 HSOP13(I) GND_62(P) A71
GEXP_TXN_C_15 HSON13(I) GND_63(P)
6 GEXP_TXN_15 B72 A72 GEXP_RXP_13 6
B73 GND_48(P) HSIP13(O) A73
GND_49(P) HSIN13(O) GEXP_RXN_13 6
GEXP_TXP_C_14 B74 A74
GEXP_TXN_C_14 B75 HSOP14(I) GND_64(P) A75
HSON14(I) GND_65(P)
B76 A76 GEXP_RXP_14 6
B77 GND_50(P) HSIP14(O) A77
GND_51(P) HSIN14(O) GEXP_RXN_14 6
GEXP_TXP_C_15 B78 A78
GEXP_TXN_C_15 HSOP15(I) GND_66(P)
B79 A79
HSON15(I) GND_67(P)
B80 A80 GEXP_RXP_15 6
GND_52(P) HSIP15(O)
A B81 A81 GEXP_RXN_15 6 A
PRSNT2#_4(I) HSIN15(O)
B82 A82
RSVD_6(I) GND_68(P)

164PIN
SL-PCIE164P

Title

PCI EXPRESS X16 DISPLAY

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 12 of 30
5 4 3 2 1
 5 4 3 2 1

FB5 VCC
6 RED

1%

1%
X47_OHM
R226 R218 C173 L0603 C105
X150_1% X150_1% 0603 X10P 0603 X10P FB2
R0603 R0603 X30_OHM-0805
D FB0603_S D

SHORT
C80
0603 X0.1U

VGA1

9
VCC
FB4 1
R
6 GREEN 2
G
3

1%

1%
X47_OHM B 16
R224 R213 C165 L0603 C101 13
X150_1% X150_1% 0603 X10P 0603 X10P 14 HS
VS 1 6 11
R0603 R0603
12 2 7 12
DDCDA
15 3 8 13
DDCCL
4 4 9 14
NC1
11
NC2
5 10 15
5
GND1
6
GND2 17
7
FB3 GND3
8
GND4
6 BLUE 10 2.0mm
RED GND5
C 6 RED C

1%

1%
X47_OHM 16
GREEN R222 R204 C163 L0603 C97 H1
6 GREEN 17
H2
X150_1% X150_1% 0603 X10P 0603 X10P
6 BLUE BLUE R0603 R0603
X15PIN
COD15P-3R
6 HSYNC HSYNC

6 VSYNC VSYNC

6 HSYNC R236 X39

6 VSYNC R233 X39

B B

VCC3 VCC

VCC3
R196 R189 R198 R184
X2.7K X2.7K Q27 X2.2K X2.2K
G
SOT23

X2N7002
FET-SOT23
6 DDC_DATA S D

VCC3

Q24
G
SOT23

X2N7002
FET-SOT23
6 DDC_CLK S D

A A

Title

VGA CONNECTOR
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 13 of 30
5 4 3 2 1
 5 4 3 2 1

AD[0..31]
AD[0..31] 18,29
U15B
V26 F1
U15A
16V
16V
C510
6
C509
6
DMI_RXN0
DMI_RXP0 V25
DMI0RXN
DMI0RXP
USBP0N
USBP0P
F2
USB_0N
USB_0P
25
25 Close to ICH

0603
E10 E18 AD0 DMI_TN0 U28 G4
18,29 PAR PAR AD0 AD1
6 DMI_TXN0 DMI0TXN USBP1N USB_1N 25
as short as possible

0603
18,29 DEVSEL# A12 C18 6 DMI_TXP0 Y5V 0.1U DMI_TP0 U27 G3 USB_1P 25
DEVSEL* AD1 AD2 Y5V 0.1U DIM0TXP USBP1P
3 CK_33M_ICH A9 A16 6 DMI_RXN1 Y26 H1 USB_2N 25
PCICLK AD2 AD3 16V C511 DMI1RXN USBP2N
18,29 PCI_RST# B18 F18 6 DMI_RXP1 Y25 H2 USB_2P 25
PCIRST* AD3 16V C512 DMI1RXP USBP2P

0603
18,29 IRDY# A7 E16 AD4 6 DMI_TXN1 DMI_TN1 W28 J4 USB_3N 25 R308 5.1K DMI_RXP0
IRDY* AD4 DMI1TXN USBP3N

DMI
AD5

0603
18,29 PCI_PME# B19 A18 6 DMI_TXP1 Y5V 0.1U DMI_TP1 W27 J3 USB_3P 25 R309 5.1K DMI_RXP1
PME* AD5 AD6 Y5V 0.1U DMI1TXP USBP3P R310 5.1K DMI_RXP2
18,29 SERR# B10 E17 6 DMI_RXN2 AB26 K1 USB_4N 25
SERR* AD6 AD7 16V C513 DMI2RXN USBP4N R311 5.1K DMI_RXP3
18,29 STOP# F15 A17 6 DMI_RXP2 AB25 K2 USB_4P 25
STOP* AD7 16V C514 DMI2RXP USBP4P

0603
D 18,29 PLOCK# E11 A15 AD8 6 DMI_TXN2 DMI_TN2 AA28 L4 USB_5N 25 R312 5.1K DMI_TP0 D
PLOCK* AD8 AD9 DMI2TXN USBP5N

0603
18,29 TRDY# F14 C14 6 DMI_TXP2 Y5V 0.1U DMI_TP2 AA27 L5 USB_5P 25 R313 5.1K DMI_TP1
TRDY* AD9 AD10 Y5V 0.1U DMI2TXP USBP5P R314 5.1K DMI_TP2
18,29 PERR# C9 E14 6 DMI_RXN3 AD25 M1 USB_6N 25
PERR* AD10 AD11 16V C515 DMI3RXN USBP6N R315 5.1K DMI_TP3
18,29 FRAME# F16 D14 6 DMI_RXP3 AD24 M2 USB_6P 25
FRAME* AD11 16V C516 DMI3RXP USBP6P

0603
B12 AD12 6 DMI_TXN3 DMI_TN3 AC28 N4 USB_7N 25
AD12 AD13 DMI3TXN USBP7N

0603
18 PGNT#0 E7 C13 6 DMI_TXP3 Y5V 0.1U DMI_TP3 AC27 N3 USB_7P 25
GNT0* AD13 AD14 Y5V 0.1U DMI3TXP USBP7P
18 PGNT#1 D16 G15

USB
GNT1* AD14 AD15
18 PGNT#2 D17 G13 F26
GNT2* AD15 AD16 PERN_1
29 PGNT#3 F13 E12 F25
GNT3* AD16 AD17 PERP_1 USB_OC#
A14 C11 E28 D3 3V_DUAL
PGNT#5 GNT4*/GPIO48 AD17 AD18 PETN_1 OC0*
D8 D11 E27 C4
GNT5*/GPIO17 AD18 AD19 PETP_1 OC1* R193
A11 19 HSI_N0 H26 D5 4.7K
AD19 AD20 PERN_2 OC2*
A10 19 HSI_P0 H25 D4
AD20 PERP_2 OC3*

0402
18 PREQ#0 PREQ#0 D7 F11 AD21 19 HSO_N0 C331 0.1U G28 E5
REQ0* AD21 PETN_2 OC4*

0402
18 PREQ#1 PREQ#1 C16 F10 AD22 19 HSO_P0 C332 0.1U 16V Y5V G27 C3
PREQ#2 C17 REQ1* AD22 E9 AD23 16V Y5V K26 PETP_2 OC5*/GPIO29 A2
18 PREQ#2 REQ2* AD23 17 HSI_N2 PERN_3 OC6*/GPIO30

PCI-E
PREQ#3 E13 D9 AD24 17 HSI_P2 K25 B3
29 PREQ#3 REQ3* AD24 PERP_3 OC7*/GPIO31
PREQ#4 A13 B9 AD25 17 HSO_N2 J28
PREQ#5 REQ4*/GPIO22 AD25 AD26 PETN_3
C8 A8 17 HSO_P2 J27
GPIO1/REQ5* AD26 AD27 PETP_3
A6 M26 D1
AD27 AD28 PERN_4 USBRBIAS R450 1% 22.6_1%
C7 M25 D2
PIRQ#A AD28 AD29 PERP_4 USBRBIAS*
A3 B6 L28
PIRQ#B PIRQA* AD29 AD30 PETN_4
B4 E6 L27
PIRQ#C C5
PIRQB* AD30
D6 AD31 V1.1 P26
PETP_4
PIRQ#D PIRQC* AD31 PERN_5
B5 P25 B2 CK_48M_USB 3
PIRQD* PERP_5 CLK48
18,29 PIRQ#E G8 N28
GPIO2/PIRQE* PETN_5
18,29 PIRQ#F F7 B15 C_BE#0 18,29 N27
GPIO3/PIRQF* C/BE0* PETP_5 TRACS TIED TOGETHER CLOSE TO PINS.
18,29 PIRQ#G F8 C12 C_BE#1 18,29 T25
GPIO4/PIRQG* C/BE1* PERN_6
18,29 PIRQ#H G7 D12 C_BE#2 18,29 T24 LENGTH NO LONGER THAN 200MIL TO
GPIO5/PIRQH* C/BE2* PERP_6
C C15 C_BE#3 18,29 R28 RESISTOR. C
C/BE3* V_1P5_PCIE_ICH PETN_6
R27
ICH7 R360 PETP_6
1% 24.9_1% DMI_ZCOMP C25
DMI_ZCOMP VCC3
D25
DMI_IRCOMP

AE28 PIRQ#A RN24-1 1 8 8.2K

V1.2 3
3
CK_PE_ICH_N
CK_PE_ICH_P AE27
DMI_CLKN PIRQ#B RN24-2 2 7 8.2K
DMI_CLKP PIRQ#C RN24-3 3 8.2K
6
ICH7 PIRQ#D RN24-4 4 5 8.2K
PIRQ#E R462 8.2K
PGNT#5 GNT5# Boot BIOS Destination Selection PIRQ#F R488 8.2K
R175 PIRQ#G R461 8.2K
1K PIRQ#H R489 8.2K
NO JUMPER LPC (DEFAULT)
PREQ#0 R464 8.2K
PREQ#1 R480 8.2K
JUMPER SPI PREQ#2 R506 8.2K
U15C R430 8.2K
PREQ#3
DD0 AB15 AF3 SATA_RXN0 17 PREQ#4 R428 8.2K
DD1 DD0 SATA0RXN PREQ#5 R432 8.2K
AE14 AE3 SATA_RXP0 17
DD2 AG13 DD1 SATA0RXP AG2
DD2 SATA0TXN SATA_TXN0 17
DD3 AF13 AH2 SATA_TXP0 17 SATA_LED# R422 10K
DD4 DD3 SATA0TXP
AD14 AE5 SATA_RXN1 17
DD5 DD4 RSVD/SATA1RXN A20GATE R389 10K
AC13 AD5 SATA_RXP1 17
DD6 DD5 RSVD/SATA1RXP
AD12 AG4 SATA_TXN1 17
IDE1 DD7 DD6 RSVD/SATA1TXN SERIRQ R394 8.2K
AC12 AH4 SATA_TXP1 17
R142 33 DD8 DD7 RSVD/SATA1TXP
23 IDERST# 1 1 2 2 AE12 AF7 SATA_RXN2 17
DD7 RST# (I) GND1 (P) DD8 DD9 DD8 SATA2RXN SATA0GP R407 10K
3 4 AF12 AE7

SATA
B D7 (B) D8 (B) DD9 SATA2RXP SATA_RXP2 17 B
DD6 5 6 DD9 DD10 AB13 AG6 SATA_TXN2 17 SATA1GP R412 10K
DD5 D6 (B) D9 (B) DD10 DD11 DD10 SATA2TXN SATA2GP R411 10K
7 8 AC14 AH6 SATA_TXP2 17
DD4 9 D5 (B) D10 (B) 10 DD11 DD12 AF14 DD11 SATA2TXP AD9 SATA3GP R400 10K
D4 (B) D11 (B) DD12 RSVD/SATA3RXN SATA_RXN3 17

IDE
DD3 11 12 DD12 DD13 AH13 AE9 SATA_RXP3 17
VCC3 DD2 13 D3 (B) D12 (B) 14 DD13 DD14 AH14 DD13 RSVD/SATA3RXP AG8
D2 (B) D13 (B) DD14 RSVD/SATA3TXN SATA_TXN3 17
DD1 15 16 DD14 DD15 AC15 AH8 SATA_TXP3 17
DD0 17 D1 (B) D14 (B) 18 DD15 DD15 RSVD/SATA3TXP AF1
D0 (B) D15 (B) SATACLKN CK_PE_SATA_N 3
19 DDACK# AF16 AE1 CK_PE_SATA_P 3
R106 DDREQ 21 GND2 (P) 22 DDREQ AE15 DDACK* SATACLKP VTT12
DIOW# DRQ# (O) GND3 (P) DIOR# DDREQ R431 1% 24.9_1%
4.7K 23 24 AF15 AH10
DIOR# IOW# (I) GND4 (P) DIOW# DIOR* SATARBIASN
25 26 AH15 AG10
IORDY IOR# (I) GND5 (P) IORDY DIOW* SATARBIASP SATA_LED# THRMTRIP# R372 62
27 28 AG16 AF18 SATA_LED# 25
DDACK# IRDY (O) DIAG (I) IORDY SATALED*
29 30
IDEIRQ ACK# (I) GND6 (P) DA0 SATA0GP H_FERR# R376 62
31 32 AH17 AF19
DA1 IRQ (O) NC DA1 DA0 GPIO21/SATA0GP SATA1GP
33 34 66DET 15 AE17 AH18
R101 8.2K DA0 A1 (I) DET (O) DA2 DA2 DA1 GPIO19/SATA1GP SATA2GP
VCC3 35 36 AF17 AH19
DCS1# A0 (I) A2 (I) DCS3# DA2 GPIO36/SATA2GP SATA3GP
37 38 AE19
CS1# (I) CS3# (I) R98 DCS1# GPIO37/SATA3GP
25 IDEACT# 39 40 AE16
ACT# (O) 39 40 GND7 (P) 15K DCS3# AD16 DCS1* AE22 A20GATE
DCS3* A20GATE A20GATE 23
GREEN AH28 H_A20M# 4
20*2PIN IDEIRQ AH16 A20M* AG27 TP_CPUSLP_N
COB2X20P-2_54-CP20 IDEIRQ CPUSLP*
AG22
HOST
IGNNE* H_IGNNE# 4
AG21 ICH_INIT3_3V#
INIT3_3V*
AF22 H_INIT# 4
INIT* AF25
INIR H_INTR 4
AG26 H_FERR# H_FERR# 4
FERR*
AH24 H_NMI 4
NMI
AG23 KBRST# 23
RCIN* SERIRQ
A AH21 SERIRQ 23 A
SERIRQ
AF23 H_SMI# 4
SMI* AH22
STPCLK* H_STPCLK# 4
AF26 THRMTRIP# THRMTRIP# 4
THERMTRIP*
ICH7

Title

ICH7 PART A
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 14 of 30
5 4 3 2 1
 5 4 3 2 1

VCC3 3V_DUAL
U15D
TP_L_DRQ1_N AA5 AB18 GPIO0
LDRQ1*/GPIO23 GPIO/BM_BUSY* GPIO6 GPIO6 R390 8.2K SMB_ALERT R392 10K
23 LAD0 AA6 AC21 DEBUG_GPI1
LAD0 GPIO6 GPIO7
23 LAD1 AB5 AC18 DEBUG_GPI2
LAD1 GPIO7

LPC
23 LAD2 AC4 E21 GPIO7 R406 8.2K SMBCLK R397 1K
LAD2 GPIO8 LPC_PME# 23
23 LAD3 Y6 E20 66DET 14
LAD3 GPIO9 THRM# R402 10K SMBDATA R399 1K
23 LDRQ#0 AC3 A20 FWH_WP#
LDRQ0* GPIO10
D 23 LFRAME# AB3 F19 ACZ_DET D
PLACE CLOSE TO ICH LFRAME* GPIO12 E19 GPIO13 GPIO33 R408 4.7K SMLINK0 R373 10K
R460 33 GPIO13 GPIO14
21 ACZ_BIT_CLK U1 R4
R448 33 ACZ_BCLK GPIO14 GPIO15 GPIO38 R401 8.2K SMLINK1 R379 10K
21 ACZ_RST# R5 E22
ACZ_RST* GPIO15

AUDIO
R467 X33 T2 AC22
T3 ACZ_SDI_0 GPIO16/DPRSLPVR AC20 GPIO39 R395 8.2K LINKALERT# R374 10K
R457 33 ACZ_SDI_1 GPIO18/STPPCI*
21 ACZ_SDIN2 T1 AF21
R468 33 ACZ_SDI_2 GPIO20/STPCPU* LAN_DISABLE# GPIO0 R474 8.2K WAKE# R413 1K
21 ACZ_SDOUT T4 R3
R452 33 ACZ_SDOUT GPIO24 TP_ICH_GPIO25_R
21 ACZ_SYNC R6 D20
ACZ_SYNC GPIO25 GPIO26 I_SYN R9 8.2K SYS_RESET# R404 8.2K
AC1 A21
3 CK_14M_ICH CLK14 EL_RSVD/GPIO26
B21 GPIO27 V1.1
EL_STATE0/GPIO27 GPIO28 ICH_RI# R365 8.2K
W1 E23
EE_CS EL_STATE1GPIO28

EPROM
W3 AG18 TP_GPIO32
EE_DIN GPIO32/CLKRUN* GPIO33 LPC_PME# R391 10K
Y2 AC19
EE_DOUT GPIO33/AZ_DOCK_EN* TP_GPIO34 V_3P0_BAT_VREG
Y1 U2
EE_SHCLK GPIO34/AZ_DOCK_RST* AD21 TP_GPIO35 66DET R398 8.2K
GPIO35 GPIO38
V3 AD20
LAN_CLK GPIO38 GPIO39 INTRUDER# R473 1M FWH_WP# R410 8.2K
U3 AE20
R415 8.2K LAN_RSTSYNC GPIO39
23 ITE_RSMRST# C19 AG24 H_PWRGD 4
LAN_RST* CPUPWRGD_GPIO49

LAN
U5 INTVRMEN R469 390K ACZ_DET R405 8.2K

MISC
LAN_RXD0 THRM#
V4 AF20 THRM# 23
LAN_RXD1 THRM* TP_ICH_GPIO25_R R23 1K GPIO13 R414 8.2K
T5 AD22 VRM_PWRGD 27
LAN_RXD2 VRMPWRGD
U7 AH20 I_SYN R346 0 ICH_SYNC# 6
LAN_TXD0 MCH_SYNC* GPIO14 R456 8.2K
V6 C23 ITE_PWRBTN# 23
LAN_TXD1 PWRBIN* ICH_RI#
V7 A28 ICH_RI# 23
LAN_TXD2 RI* GPIO15 R396 8.2K
A27
RTCX1 SUS_STAT*
AB1 C20
RTCX1 SUSCLK

RTC
RTCX2 AB2 A22 SYS_RESET# R403 0 LAN_DISABLE# R470 8.2K
RTCX2 SYSRST* FP_RST# 4,25
RTCRST# AA3 C26 PLTRST# 6,12,17,19,23
RTCRST* PLTRST* WAKE# ICH_BATLOW_PU R409 10K
C F20 WAKE# 12,17,19 C
SMB_ALERT WAKE* INTRUDER#
B23 Y5
3,9,10,12,17,18,19,23 SMBCLK SMBCLK C22
SMBALERT*/GPIO11 INTRUDER*
AA4 PWROK1 6,23
V1.1 GPIO26 R558 X8.2K
SMBDATA SMBCLK PWROK
3,9,10,12,17,18,19,23 SMBDATA B22 Y4 ITE_RSMRST# 23
SMBDATA RSMRST*

SMB
LINKALERT# A26 W4 INTVRMEN GPIO27 R559 X8.2K
SMLINK0 LINKALERT* INTVRMEN
B25 A19 ICH_SPKR 25
SMLINK1 SMLINK0 SPKR GPIO28 R560 X8.2K
A25
SMLINK1
B24 SLP_S3# 23
SPI_MOS_I SLP_S3*
P5 D23 SLP_S4#
SPI_MOS_O SPI_MOSI SLP_S4* TP_SLP_S5_N
P2 F22
SPI_MISO SLP_S5*
SPI
SPI_CS# P6 ITE_RSMRST# R525 X10K
SPI_CLK SPI_CS* ICH_BATLOW_PU
R2 C21
P1 SPI_CLK TP0/BATLOW* AF24 TP_AF24 PWROK1 R482 X10K
SPI_ARB TP1/DPRSTP* TP_AH25
AH25
TP2/DPSLP* TP_F21
F21
TP3
ICH7

3V_DUAL
V1.2

10K

10K

10K
V_3P0_BAT_VREG
B
V1.1 3V_DUAL
B

R454

R455

R371
C467
1U 3V_DUAL
0603 16V U19
Y5V SPI_CS# ICHSPI_CS# 1 8 ICHSPI_VCC R484 C320
D16 CCMOS1(1-2)1 CS* VCC
RTCX1 SOT23 SPI_CLK 15 R477 ICHSPI_SK 6 3.3K 0.1U 0603
CCMOS1 SPI_MOS_I 47 R475 ICHSPI_SI SCK Y5V
A1 5
RTCX2 1 R497 20K K SPI_MOS_O 47 R478 ICHSPI_SO 2 SI 7 ICHSPI_HOLD# 16V
S0 HOLD*
2 A2
3
JUMPER_1X2P_YELLOW 3V_DUAL 3.3K R485 ICHSPI_WP# 3 4 ICHSPI_GND
3*1 PIN BAT54C R504 PCB Footprint WP* GND
Y3 32.768KHZ D-SOT23-A1KA2 1K XS2A_SPI-EEPROM
1 2
1

RTCRST# 1 U28
3

BATTERY1 ICHSPI_CS# 1 8 ICHSPI_VCC

CR2032 ICHSPI_SK 6 CS* VCC
BAT1 2 SK-BAT ICHSPI_SI SCK
5
2

R446 10M C466 SK-BAT-CR2032 ICHSPI_SO 2 SI 7 ICHSPI_HOLD#

R498 0603 1U SK-BAT S0 HOLD*
C429 C430 4.7K 16V
0603 15P 0603 15P Y5V ICHSPI_WP# 3 4 ICHSPI_GND
50V 50V V1.2 WP* GND
NPO NPO XSA_SPI-EEPROM
U19,U28 CO-LAY
A A

Title

ICH7 PART B
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 15 of 30
5 4 3 2 1
 5 4 3 2 1

VCCREF VCC

VCCREF PLACE CLOSE AD17 R426 1K

U15F VCC15
E4 A4 U15E C381 VCC3
VSS1 VSS95 0603 0.1U SDO80
AG11 A23 A1 AD17
VSS2 VSS96 VCC1_5_A_1 VSREF1 16V D10 K
C27 B1 AB10 G10 A
VSS3 VSS97 C421 C420 VCC1_5_A_2 VSREF2 Y5V
R14 B8 AB17
R15 VSS4 VSS98 B11 0603 0.1U 0603 0.1U AB7 VCC1_5_A_3 F6 PLACE CLOSE W5 BAS32L D-SOD80
VSS5 VSS99 VCC1_5_A_4 VSREF_SUS V5REF_SBY
R16 B14 Y5V Y5V AB8
VSS6 VSS100 16V 16V VCC1_5_A_5
R17 B17 AB9 W5 V_3P0_BAT_VREG
VSS7 VSS101 VCC1_5_A_6 VCCRTC
D R18 B20 AC10 D
T6 VSS8 VSS102 B26 USB HS (HI-SPEED) FILTER AC17 VCC1_5_A_7 C1 VCCUSBPLL C452 C451
VSS9 VSS103 CORE / PLL (NEAR A1) VCC1_5_A_8 VCCUSBPLL 0603 1U 0603 0.1U
T12 B28 AC6
VSS10 VSS104 VCC1_5_A_9 VCCSATAPLL Y5V Y5V
T13 C2 AC7 AD2
VSS11 VSS105 VCC1_5_A_10 VCCSATAPLL 16V 16V
T14 C6 AC8
T15 VSS12 VSS106 D10 AD10 VCC1_5_A_11 AG28 VCCDMIPLL V5REF_SBY 5VSB
VSS13 VSS107 VCC1_5_A_12 VCCDMIPLL
T16 D13 AD6
VSS14 VSS108 VCC1_5_A_13 R472 10
T17 D18 AE10 L11 VCC_1.05V
VSS15 VSS109 VCC1_5_A_14 VCC1_05_1 SDO80
U4 D21 AE6 L12
VSS16 VSS110 VCC1_5_A_15 VCC1_05_2 C426 D11 K
U12 D24 AF10 L14 A 3V_DUAL
VSS17 VSS111 VCC1_5_A_16 VCC1_05_3 C297 C298 0603 0.1U
U13 E1 AF5 L16
VSS18 VSS112 VCC1_5_A_17 VCC1_05_4 0603 0.1U 0603 0.01U Y5V BAS32L D-SOD80
U14 E2 AF6 L17
VSS19 VSS113 SATA FILTER (C392 CLOSE VCC1_5_A_18 VCC1_05_5 Y5V Y5V 16V
U15 E8 AF9 L18
VSS20 VSS114 AH9) VCC1_5_A_19 VCC1_05_6 16V 16V
U16 E15 AG5 M11
VSS21 VSS115 VCC1_5_A_20 VCC1_05_7 PLACE CLOSE F6
U17 F3 AG9 M18
U24 VSS22 VSS116 F4 AH5 VCC1_5_A_21 VCC1_05_8 P11
U25
VSS23 VSS117
F5
V1.4 AH9
VCC1_5_A_22 VCC1_05_9
P18
VSS24 VSS118 C392 VCC1_5_A_23 VCC1_05_10
U26 F12 F17 T11
VSS25 VSS119 0603 1U VCC1_5_A_24 VCC1_05_11
V2 F27 G17 T18
VSS26 VSS120 Y5V VCC1_5_A_25 VCC1_05_12 VCC15
V13 F28 H6 U11
VSS27 VSS121 16V VCC1_5_A_26 VCC1_05_13
V15 G1 H7 U18
VSS28 VSS122 VCC1_5_A_27 VCC1_05_14 L18
V24 G2 J6 V11
VSS29 VSS123 VCC15 V_1P5_PCIE_ICH VCC1_5_A_28 VCC1_05_15 VCCDMIPLL R356 1
V27 G5 J7 V12
VSS30 VSS124 VCC1_5_A_29 VCC1_05_16
V28 G6 T7 V14
VSS31 VSS125 VCC1_5_A_30 VCC1_05_17 C323 C325 1UH
W6 G9 V16
VSS32 VSS126 FB16 VCC1_05_18 10U 0805 0603 0.01U FB0805_S
W24 G14 D26 V17
VSS33 VSS127 VCC1_5_B_1 VCC1_05_19 6.3V 16V
W25 G18 D27 V18
VSS34 VSS128 30_OHM-0805 VCC1_5_B_2 VCC1_05_20 Y5V Y5V
W26 G21 D28 SHORT
VSS35 VSS129 C318 C327 C312 VCC1_5_B_3
Y3 G24 E24 AE23 VTT12
VSS36 VSS130 SHORT 0603 0.1U 0603 0.1U 0603 0.1U VCC1_5_B_4 V_CPU_IO_1 PCI (NEAR A5, B7, PLACE CLOSE AG28
C Y24 G25 E25 AE26 C
VSS37 VSS131 16V 16V 16V VCC1_5_B_5 V_CPU_IO_2 B13, and B16)
Y27 G26 E26 AH26
VSS38 VSS132 Y5V Y5V Y5V VCC1_5_B_6 V_CPU_IO_3
Y28 H3 F23
VSS39 VSS133 VCC1_5_B_7
AA1 H4 F24 A5 VCC3
VSS40 VSS134 VCC1_5_B_8 VCC3_3_1
AA24 H5 G22 AA7
VSS41 VSS135 VCC1_5_B_9 VCC3_3_2 C384
AA25 H24 G23 AB12
VSS42 VSS136 PCIE DECOUPLING FILTER VCC1_5_B_10 VCC3_3_3 0603 0.1U
AA26 H27 H22 AB20
VSS43 VSS137 VCC1_5_B_11 VCC3_3_4 16V
AB4 H28 PLACE THERE CAP AT H23 AC16
VSS44 VSS138 VCC1_5_B_12 VCC3_3_5 Y5V
AB6 J1 ENDS OF POWER J22 AD13

POWER
VSS45 VSS139 VCC1_5_B_13 VCC3_3_6
AB11 J2 CORRIDORS(NEAR D28) J23 AD18
VSS46 VSS140 VCC1_5_B_14 VCC3_3_7
AB14 J5 K22 AG12
VSS47 VSS141 VCC1_5_B_15 VCC3_3_8 AUDIO (NEAR
AB16 J24 K23 AG15
AB19 VSS48 VSS142 J25 L22 VCC1_5_B_16 VCC3_3_9 AG19 U6) VTT12
VSS49 VSS143 VCC1_5_B_17 VCC3_3_10 C351 C383 C387
AB21 J26 L23 AH11
VSS50 VSS144 VCC1_5_B_18 VCC3_3_11 0603 0.1U 0603 0.1U 0603 0.1U
AB24 K24 M22 B13
VSS51 VSS145 VCC1_5_B_19 VCC3_3_12 Y5V Y5V Y5V
AB27 K27 M23 B16
VSS52 VSS146 VCC1_5_B_20 VCC3_3_13 16V 16V 16V C324 C346 C356
AB28 K28 N22 B27
VSS53 VSS147 VCC1_5_B_21 VCC3_3_14 0603 0.1U 0603 0.1U 0805 4.7U
AC2 L13 N23 B7
VSS54 VSS148 VCC1_5_B_22 VCC3_3_15 16V 16V Y5V
AC5 L15 P22 C10
VSS55 VSS149 VCC1_5_B_23 VCC3_3_16 PCI-E BG P-ATA FILTER SATA BG Y5V Y5V 10V-0805
AC9 L24 P23 D15
VSS56 VSS150 VCC1_5_B_24 VCC3_3_17 (NEAR B27) (NEAR AG15) (NEAR AH11)
AC11 L25 R22 F9
VSS57 VSS151 VCC1_5_B_25 VCC3_3_18
AD1 L26 R23 G11
AD3 VSS58 VSS152 M3 R24 VCC1_5_B_26 VCC3_3_19 G12 PLACE CLOSE TO ICH
VSS59 VSS153 VCC1_5_B_27 VCC3_3_20
AD4 M4 R25 G16
VSS60 VSS154 VCC1_5_B_28 VCC3_3_21
AD7 M5 R26 U6
VSS61 VSS155 VCC1_5_B_29 VCC3_3_22
AD8 M12 T22 A24 3V_DUAL
VSS62 VSS156 VCC1_5_B_30 VCCSUS3_3_1
AD11 M13 T23 C24
AD15
VSS63 VSS157
M14 T26
VCC1_5_B_31 VCCSUS3_3_2
D19 C350 C423 C424 C428 V1.3, V1.4
VSS64 VSS158 VCC1_5_B_32 VCCSUS3_3_3 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U
AD19 M15 T27 D22
VSS65 VSS159 VCC1_5_B_33 VCCSUS3_3_4 16V 16V 16V 16V VCC15
B AD23 M16 T28 E3 B
AE2 VSS66 VSS160 M17 U22 VCC1_5_B_34 VCCSUS3_3_5 G19 Y5V Y5V Y5V Y5V
VSS67 VSS161 VCC1_5_B_35 VCCSUS3_3_6 VCCSATAPLL L22
AE4 M24 U23 K3
AE8 VSS68 VSS162 M27 V22 VCC1_5_B_36 VCCSUS3_3_7 K4 USB PLACE FB0805_S
VSS69 VSS163 VCC1_5_B_37 VCCSUS3_3_8 NEAR E3 C489 C419 10UH C402
AE11 M28 V23 K5
AE13 VSS70 VSS164 N1 W22 VCC1_5_B_38 VCCSUS3_3_9 K6 0603 0.1U 0805 10U 0805 2.2UF
VSS71 VSS165 VCC1_5_B_39 VCCSUS3_3_10 SHORT
AE18 N2 W23 L1 Y5V Y5V Y5V
AE21 VSS72 VSS166 N5 Y22 VCC1_5_B_40 VCCSUS3_3_11 L2 16V 10V-0805 16V-0805
VSS73 VSS167 VCC1_5_B_41 VCCSUS3_3_12 C425
AE24 N6 Y23 L3
AE25 VSS74 VSS168 N11 AA22 VCC1_5_B_42 VCCSUS3_3_13 L6 0603 0.1U
VSS75 VSS169 VCC1_5_B_43 VCCSUS3_3_14 Y5V VCCSATAPLL PLACE CLOSE TO AH5
AF2 N12 AA23 L7
VSS76 VSS170 VCC1_5_B_44 VCCSUS3_3_15 16V PLACE CLOSE TO
AF4 N13 AB22 M6
VSS77 VSS171 VCC1_5_B_45 VCCSUS3_3_16 PIN AD2
AF8 N14 AB23 M7
VSS78 VSS172 VCC1_5_B_46 VCCSUS3_3_17
AF11 N15 AC23 N7
VSS79 VSS173 VCC1_5_B_47 VCCSUS3_3_18 LAN PLACE
AF27 N16 AC24 P7
VSS80 VSS174 VCC1_5_B_48 VCCSUS3_3_19 NEAR V1 R429,R438 CO-LAY
AF28 N17 AC25 R7
VSS81 VSS175 VCC1_5_B_49 VCCSUS3_3_20 VCC15
AG1 N18 AC26 V1
VSS82 VSS176 VCC1_5_B_50 VCCSUS3_3_21
AG3 N24 AD26 V5
VSS83 VSS177 VCC1_5_B_51 VCCSUS3_3_22 VCCUSBPLL
AG7 N25 AD27 W2
AG14 VSS84 VSS178 N26 AD28 VCC1_5_B_52 VCCSUS3_3_23 W7
VSS85 VSS179 VCC1_5_B_53 VCCSUS3_3_24 C422
AG17 P3
AG20 VSS86 VSS180 P4 AA2 TP_ICH_AA2 0603 0.01U
VSS87 VSS181 VCCSUS1_05_1 TP_ICH_C28 Y5V
AG25 P12 C28
AH1 VSS88 VSS182 P13 VCCSUS1_05_2 G20 TP_ICH_G20 16V
VSS89 VSS183 VCCSUS1_05_3 TP_ICH_K7
AH3 P14 K7
VSS90 VSS184 P15 VCCSUS1_05_4 Y7 TP_ICH_Y7 VCCUSBPLL
VSS185 VCCSUS1_05_5 PLACE CLOSE TO
AH7 P16
VSS91 VSS186 ICH7
AH23 P17 PIN C1
VSS92 VSS187
AH27 P24
VSS93 VSS188
A P27 A
VSS189
P28
VSS190 R1
VSS191
R11
VSS192
R12
VSS193
AH12 R13
VSS94 VSS194
ICH7
Title

ICH7 PART C
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 16 of 30
5 4 3 2 1
 5 4 3 2 1

0402
C440 0.01UF-10% SATA1
14 SATA_TXP0 50V X7R SATA_TXP0_C 2
SATA_TXN0_C TX+ (I)
14 SATA_TXN0 3 8
TX- (I)

0402 0402
C441 0.01UF-10%
50V X7R
1
C442 0.01UF-10%
2
D 14 SATA_RXN0 50V X7R SATA_RXN0_C 5 D
RX- (O) 3
14 SATA_RXP0 SATA_RXP0_C 6 4
RX+ (O)

0402
C443 0.01UF-10%
5
50V X7R 1
GND1 (P) 6
4 7
7 GND2 (P)
GND3 (P)
8 9
H1
9
H2
7PIN
Sata_d_v

14 SATA_TXP1 SATA_TXP1_C
14 SATA_TXN1 SATA_TXN1_C

14 SATA_RXN1 SATA_RXN1_C
14 SATA_RXP1 SATA_RXP1_C

C C
0402

C388 0.01UF-10% SATA2

14 SATA_TXP2 50V X7R SATA_TXP2_C 2
SATA_TXN2_C TX+ (I)
14 SATA_TXN2 3 8
TX- (I) 3V_DUAL VCC3 +12V +12V VCC3
0402 0402

C389 0.01UF-10%
50V X7R
1
C390 0.01UF-10%
2
14 SATA_RXN2 50V X7R SATA_RXN2_C 5
RX- (O) 3
14 SATA_RXP2 SATA_RXP2_C 6 4
RX+ (O)
0402

C391 0.01UF-10%
5
50V X7R 1
GND1 (P) 6
4 7
GND2 (P)
7
GND3 (P)
8 9
H1
9 3,9,10,12,15,18,19,23 SMBCLK
H2
3,9,10,12,15,18,19,23 SMBDATA
7PIN
Sata_d_v

12,15,19 WAKE# WAKE#

PLTRST# 6,12,15,19,23

B 14 SATA_TXP3 SATA_TXP3_C CK_PE_S2_P 3 B

14 SATA_TXN3 SATA_TXN3_C 14 HSO_P2 CK_PE_S2_N 3
14 HSO_N2
HSI_P2 14
HSI_N2 14
14 SATA_RXN3 SATA_RXN3_C
14 SATA_RXP3 SATA_RXP3_C

VCC3 +12V

A A
C291 C273 C385 C341 C292 C272 C400
0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U
16V 16V 16V 16V 16V 16V 16V
Y5V Y5V Y5V Y5V Y5V Y5V Y5V

FOR PCI EXPRESS X1 Title

PCI EXPRESS X1 SLOT & SATA

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 17 of 30
5 4 3 2 1
 5 4 3 2 1

14,29 AD[0..31]
3V_DUAL VCC3 -12V 3V_DUAL VCC3 -12V
+12V +12V 3V_DUAL VCC3 -12V
VCC VCC +12V
VCC

H1

H2
C459

H1

H2
PCI2 0603 0.1U
AD0 A58 A14 AD0 16V PCI1

H1

H2
AD1 B58 AD0 (B) 3VSB (P) B4 AD1 Y5V AD0 A58 A14

H1

H2
AD2 AD1 (B) TDO (O) AD2 AD1 AD0 (B) 3VSB (P)
A57 B9 B58 B4
AD3 AD2 (B) PRST-1 (O) AD3 AD2 AD1 (B) TDO (O)
B56 B11 A57 B9
AD4 AD3 (B) PRST-2 (O) AD4 AD3 AD2 (B) PRST-1 (O)
D A55 A9 B56 B11 D
AD5 B55 AD4 (B) RSV1 B10 AD5 AD4 A55 AD3 (B) PRST-2 (O) A9
AD6 AD5 (B) RSV3 AD6 AD5 AD4 (B) RSV1
A54 A11 B55 B10
AD7 AD6 (B) RSV2 AD7 AD6 AD5 (B) RSV3
B53 B14 A54 A11
AD8 AD7 (B) RSV4 AD8 AD7 AD6 (B) RSV2
B52 B2 B53 B14
AD9 A49 AD8 (B) TCK (I) A1 AD9 AD8 B52 AD7 (B) RSV4 B2
AD10 AD9 (B) TRST# (I) AD10 AD9 AD8 (B) TCK (I)
B48 A3 A49 A1
AD11 AD10 (B) TMS (I) AD11 AD10 AD9 (B) TRST# (I)
A47 A4 B48 A3
AD12 AD11 (B) TDI (I) AD12 AD11 AD10 (B) TMS (I)
B47 A2 A47 A4
AD13 AD12 (B) +12V (P) AD13 AD12 AD11 (B) TDI (I)
A46 B1 B47 A2
AD14 AD13 (B) -12V (P) AD14 AD13 AD12 (B) +12V (P)
B45 B5 A46 B1
AD15 AD14 (B) VCC8 (P) AD15 AD14 AD13 (B) -12V (P)
A44 B6 B45 B5
AD16 AD15 (B) VCC9 (P) AD16 AD15 AD14 (B) VCC8 (P)
A32 A5 A44 B6
AD17 AD16 (B) VCC1 (P) AD17 AD16 AD15 (B) VCC9 (P)
B32 A8 A32 A5
AD18 AD17 (B) VCC2 (P) AD18 AD17 AD16 (B) VCC1 (P)
A31 A10 B32 A8
AD19 B30 AD18 (B) VCC3 (P) B61 AD19 AD18 A31 AD17 (B) VCC2 (P) A10
AD20 AD19 (B) VCC12 (P) AD20 AD19 AD18 (B) VCC3 (P)
A29 A16 B30 B61
AD21 AD20 (B) VCC4 (P) AD21 AD20 AD19 (B) VCC12 (P)
B29 B62 A29 A16
AD22 AD21 (B) VCC13 (P) AD22 AD21 AD20 (B) VCC4 (P)
A28 A59 B29 B62
AD23 AD22 (B) VCC5 (P) AD23 AD22 AD21 (B) VCC13 (P)
B27 B59 A28 A59
AD24 AD23 (B) VCC11 (P) AD24 AD23 AD22 (B) VCC5 (P)
A25 A61 B27 B59
AD25 AD24 (B) VCC6 (P) AD25 AD24 AD23 (B) VCC11 (P)
B24 B19 A25 A61
AD26 AD25 (B) VCC10 (P) AD26 AD25 AD24 (B) VCC6 (P)
A23 A62 B24 B19
AD27 AD26 (B) VCC7 (P) AD27 AD26 AD25 (B) VCC10 (P)
B23 A21 A23 A62
AD28 AD27 (B) 3V1 (P) AD28 AD27 AD26 (B) VCC7 (P)
A22 A27 B23 A21
AD29 AD28 (B) 3V2 (P) AD29 AD28 AD27 (B) 3V1 (P)
B21 A33 A22 A27
AD30 AD29 (B) 3V3 (P) AD30 AD29 AD28 (B) 3V2 (P)
A20 A39 B21 A33
AD31 AD30 (B) 3V4 (P) AD31 AD30 AD29 (B) 3V3 (P)
B20 A45 A20 A39
AD21 R463 100 AD31 (B) 3V5 (P) AD22 AD31 AD30 (B) 3V4 (P)
A26 B43 B20 A45
IDSEL (I) 3V11 (P) AD23 R505 100 AD31 (B) 3V5 (P)
C B41 A26 B43 C
3V10 (P) C_BE#0 IDSEL (I) 3V11 (P)
14,29 C_BE#0 A52 B36 B41
C_BE-0 (B) 3V9 (P) C_BE#1 C_BE#0 3V10 (P)
14,29 C_BE#1 B44 B31 A52 B36
C_BE-1 (B) 3V8 (P) C_BE#2 C_BE#1 C_BE-0 (B) 3V9 (P)
14,29 C_BE#2 B33 B25 B44 B31
C_BE-2 (B) 3V7 (P) C_BE#3 C_BE#2 C_BE-1 (B) 3V8 (P)
14,29 C_BE#3 B26 B54 B33 B25
C_BE-3 (B) 3V12 (P) C_BE#3 C_BE-2 (B) 3V7 (P)
A53 B26 B54
3V6 (P) PIRQ#G C_BE-3 (B) 3V12 (P)
14,29 PIRQ#F A6 A12 A53
INTA# (B) GND1 (P) PIRQ#H PIRQ#H 3V6 (P)
14,29 PIRQ#G B7 A13 A6 A12
INTB# (B) GND2 (P) PIRQ#E PIRQ#E INTA# (B) GND1 (P)
14,29 PIRQ#H A7 A18 B7 A13
INTC# (B) GND3 (P) PIRQ#F PIRQ#F INTB# (B) GND2 (P)
14,29 PIRQ#E B8 A24 A7 A18
INTD# (B) GND4 (P) PIRQ#G INTC# (B) GND3 (P)
A30 B8 A24
GND5 (P) INTD# (B) GND4 (P)
14 PREQ#0 B18 A35 14 PREQ#1 A30
A17 REQ# (B) GND6 (P) A37 B18 GND5 (P) A35
14 PGNT#0 GNT# (B) GND7 (P) 14 PGNT#1 14 PREQ#2 REQ# (B) GND6 (P)
A42 14 PGNT#2 A17 A37
GND8 (P) PCI_PME# GNT# (B) GND7 (P)
14,29 PCI_PME# A19 A48 A42
PME# (B) GND9 (P) FRAME# PCI_PME# GND8 (P)
14,29 FRAME# A34 A56 A19 A48
FRAME# (B) GND10 (P) TRDY# FRAME# PME# (B) GND9 (P)
14,29 TRDY# A36 B3 A34 A56
TRDY# (B) GND11 (P) STOP# TRDY# FRAME# (B) GND10 (P)
14,29 STOP# A38 B12 A36 B3
STOP (B) GND12 (P) IRDY# STOP# TRDY# (B) GND11 (P)
14,29 IRDY# B35 B13 A38 B12
IRDY# (B) GND13 (P) DEVSEL# IRDY# STOP (B) GND12 (P)
14,29 DEVSEL# B37 B15 B35 B13
DEVSEL# (B) GND14 (P) PLOCK# DEVSEL# IRDY# (B) GND13 (P)
14,29 PLOCK# B39 B17 B37 B15
PLOCK# (B) GND15 (P) PERR# PLOCK# DEVSEL# (B) GND14 (P)
14,29 PERR# B40 B22 B39 B17
A43 PERR# (B) GND16 (P) B28 PAR PERR# B40 PLOCK# (B) GND15 (P) B22
14,29 PAR PAR (B) GND17 (P) PERR# (B) GND16 (P)
SMBDATA_P A41 B34 SMBDATA_P PAR A43 B28
SBO# (B) GND18 (P) PCI_RST# SMBDATA_P PAR (B) GND17 (P)
14,29 PCI_RST# A15 B38 A41 B34
SMBCLK_P RESET# (I) GND19 (P) SMBCLK_P SERR# PCI_RST# SBO# (B) GND18 (P)
A40 B42 SERR# 14,29 A15 B38
REQ64#1 SDONE (I) SERR# (B) REQ64#2 SMBCLK_P RESET# (I) GND19 (P) SERR#
A60 B46 A40 B42
ACK64# REQ64# (B) GND20 (P) ACK64# REQ64#3 SDONE (I) SERR# (B)
B60 B49 A60 B46
ACK64# (B) GND21 (P) ACK64# REQ64# (B) GND20 (P)
3 CK_33M_S1 B16 B57 3 CK_33M_S2 29 ACK64# B60 B49
CLK33 (I) GND22 (P) ACK64# (B) GND21 (P)
B 3 CK_33M_S3 B16 B57 B
120PIN CLK33 (I) GND22 (P)
SL-PCI120P 120PIN
SL-PCI120P

VCC3 VCC3 VCC3

RN25-2 7 2 8.2K PLOCK# RN29-1 1 8 8.2K DEVSEL# R465 8.2K ACK64#

RN25-4 5 4 8.2K SERR# RN29-2 2 7 8.2K TRDY# R466 8.2K REQ64#1
RN25-1 8 1 8.2K STOP# RN29-3 3 6 8.2K IRDY# REQ64#2
RN25-3 6 3 8.2K PERR# RN29-4 4 5 8.2K FRAME# R507 8.2K REQ64#3

VCC3 VCC
A A

C462 C434 C436 C463 C468 C474 C464 C435 29 SMBCLK_P SMBCLK_P SMBCLK 3,9,10,12,15,17,19,23
0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U 0603 0.1U
16V 16V 16V 16V 16V 16V 16V 16V
Y5V Y5V Y5V Y5V Y5V Y5V Y5V Y5V
Title
SMBDATA_P
29 SMBDATA_P SMBDATA 3,9,10,12,15,17,19,23
PCI 1 & 2 & 3
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 18 of 30
5 4 3 2 1
 5 4 3 2 1

VCC3

VDE33 VDE33

RL30 LR57 10K/5%/X

1K/5% 3V_DUAL
LR56 3.6K/5%
LAN_EN R635 0/5%/X 8111C CTRL15/VDD33
1 UL3 DVDD15

1
PE_ISOLATEB 2 PE_EECS 1 8 VDE33 R571 0/5%/X
PE_EESK CS VCC
3 2 7
RL31 PE_EEDI SK NC0 CL59
3 6
15K/5% HEADER1X3 PE_EEDO DI NC1 0603 0.1uF
D 4 5 D
DO GND CL37 + CE51 CL42 CL44 CL40

1
93C46 0603 6X7 0603 0603 0603
AVDD33 0.1uF 100uF 0.1uF 0.1uF 0.1uF
3V_DUAL VDE33

FB74 VDE33 R638 0/5% AVDD33

30 OHM CL39 CL38 CL48 CL45 CL46 CL47

0603 0603 0603 0603 0603 0603 VDE33
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
DVDD15 EVDD18
AVDD18 R597 0/5%

R611 0/5%/X PE_CTRL18

AVDD18/FB12 AVDD18 AVDD18

DVDD15/CLKREQB R580 0/5% DVDD15

DVDD15/SRVDD

PE_LINK_LED1
CTRL15/VDD33

PE_ACT_LED0
PELAN_RSET
DVDD15/SRVDD DVDD15 CL43
R596 0/5%/X AVDD18 CL32 + CE52 CL41 CL49

1
AVDD33

DVDD15

DVDD15
VDE33
8111C

XTAL2
XTAL1
0603 0603 6X7 0603 0603

GVDD
AVDD18/FB12 R631 4.7UH PE_CTRL18 0.1uF 0.1uF 100uF 0.1uF 0.1uF
8111C

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
UL2
VDE33 R627 0/5%/X GVDD

RSET
VCTRL15
GVDD
CKTAL2
CKTAL1
AVDD33
VDD15
LED0
LED1
LED2
LED3
VDD33
VDD15
NC9
NC8
VDD15
8111C
CL16 3V_DUAL AVDD18
C C
PELAN_RSET PE_CTRL18 1 48 PE_EESK 0603 QL2
AVDD33 VCTRL18 EESK
2 47 PE_EEDI 0.1uF 8111C AMS1117
AVDD33 EEDI

RTL8111B/8111C/8101E
PE_MDI0+ 3 46 VDE33 3 2
PE_MDI0- MDIP0 VDD33 VI VO2
2.49K 1% FOR 8111B/8111C 4 45 PE_EEDO
AVDD18/FB12 MDIN0 EEDO
2.0K 1% FOR 8101E 5 44 PE_EECS 4

ADJ
PE_MDI1+ AVDD18 EECS VO4
6 43 DVDD15
R378 PE_MDI1- MDIP1 VDD15
7 42
AVDD18 MDIN1 NC7 DVDD15
8 41

1
2.49K/1% PE_MDI2+ AVDD18 VDD1
9
MDIP2 NC6
40 R1
PE_MDI2- 10 39 R7 300,5%
AVDD18 MDIN2 NC5 NC
11 38 DVDD15
PE_MDI3+ 12 AVDD18 VDD15 37 VDE33 R15
PE_MDI3- MDIP3 VDD33
13 36 PE_ISOLATEB Vout=1.25(1+R2/R1)
AVDD18 14
MDIN3 ISOLATEB
35 R2 0,5%
DVDD15 AVDD18 NC4
15 34
LANWAKEB

REFCLK_N
REFCLK_P

VDE33 VDD15 NC3

16 33 DVDD15/CLKREQB
PERSTB

VDD33 VDD15
EVDD18

EVDD18

AVDD18
VDD15

VDD15
EGND

HSON
EGND
HSOP
HSIN
HSIP
NC1
NC2

65
GND
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

TC1
PE1_CLK_N
PE1_CLK_P
PE_RESET
PE_WAKE
SMB_SDA
SMB_SCL

DVDD15
EVDD18

EVDD18

DVDD15
HSON
HSOP
HSIN
HSIP

GND

GND

TC1 TC2
PE_MDI0+
PE_MDI0-
B B
PE_MDI1+
PE_MDI1-

RXN/MDI1N
RXP/MDI1P
TXN/MDI0N
TXP/MDI0P

PE_MDI2+
PE_MDI2-
TC2
CL6 20P PE_MDI3+
R639 0/5%
0603

3 PCIE_25M XTAL1 50V PE_MDI3-

1

1
NPO
X4 RL11 RL13 RL16 RL18
25MHz/H/D 49.9_1% 49.9_1% 49.9_1% 49.9_1%
0603

XTAL2 0603 0603 0603 0603

PE_MDI0+ PE_MDI1+
2

CL8

L9

L11
20P
50V VCC
3 CK_PE_S3_P PE1_CLK_P
PE1_CLK_N NPO PE_MDI0- PE_MDI1-
3 CK_PE_S3_N
CL5 CL1 3D3V_SB
0402

14 HSI_P0 C398 0.1U HSOP 0603 0.01U 0603 0.01U

0402

14 HSI_N0 C401 0.1U 16V Y5V HSON Y5V Y5V

16V Y5V 16V 16V PE_ACT_LED0
14 HSO_P0 HSIP PE_LINK_LED1
14 HSO_N0 HSIN PE_MDI2+ PE_MDI3+

VCC
PE_MDI2- PE_MDI3-

A A

3,9,10,12,15,17,18,23 SMBCLK SMB_SCL PE_MDI0+ TXP/MDI0P

TXP/MDI0P 25
3,9,10,12,15,17,18,23 SMBDATA SMB_SDA PE_MDI0- TXN/MDI0N
TXN/MDI0N 25
PE_MDI1+ RXP/MDI1P
RXP/MDI1P 25
12,15,17 WAKE# PE_WAKE PE_MDI1- RXN/MDI1N
RXN/MDI1N 25
PE_MDI2+ MDI2P
MDI2P 25
PE_RESET PE_MDI2- MDI2N Title
6,12,15,17,23 PLTRST# MDI2N 25
PE_MDI3+ MDI3P
PE_MDI3- MDI3N
MDI3P
MDI3N
25
25
PCIE LAN
PE_ACT_LED0 ACT_LED Size Document Number Rev
ACT_LED 25
PE_LINK_LED1 LINK_LED Custom 1.4
LINK_LED 25 Lakeport CRB
Date: Wednesday, July 09, 2008 Sheet 19 of 30
5 4 3 2 1
 5 4 3 2 1

VCC3

ALC860 /ALC883
VCC3 AC5V
CA1 CA2 CA3 CA4

25

26

38

42
9

4
0603 0.1uF 0603 0.1uF U16 ALC850 0603 0.1uF 0603 0.1uF SPDIFI

DVDD2

DVSS2

DVDD1

DVSS1

AVDD1

AVSS1

AVDD2

AVSS2
GND_AUD SPD_IN_R
GND_AUD GND_AUD
35 FRONT_L SPD_OUT_R
FRONT-OUT-L FRONT_R
D 36 D
FRONT-OUT-R
15 ACZ_RST# 11 39 SUR_L
RESET# SURR-OUT-L SUR_R
15 ACZ_SDOUT 5 41
SDOUT SURR-OUT-R
15 ACZ_SDIN2 8
10 SDIN 43 CEN_O
15 ACZ_SYNC SYNC CENTER-OUT
15 ACZ_BIT_CLK 6 44 LFE_O SPDIFO
BITCLK LFE-OUT
VREFO 28 14 SUR_BACK_OL
CA7 MIC1_VREFO_L LINE2_L SUR_BACK_OR
15
0603 1uF/X CA8 SEN_B LINE2-R
34
0603 RA25 20K/5% JDREF SENSEB MIC2_L
40 16
RA24 1uF SIDESURR_L JDREF MIC2_L MIC2_R
45 17
22K/5% SIDE_SUR_L MIC2_R
RA26 0/5%/X SIDESURR_R 46 18 CDL
SIDE_SUR_R CD-L 19 CDG
SPDIFI CD-GND CDR
47 20
GND_AUD SPDIFO SPDIF-IN CD-R RA18 10K/5%
48

3 CK_14M_AC97
AC5V
2
SPDIF-OUT

GPIO0
MIC1_L
MIC1_R
21
22
MIC1_L
MIC1_R
LINE1_L
VREFO
MIC1-VREFO-R
RA19 10K/5%/850
MIC IN

LINE1_VREFO_L
23

MIC1_VREFO_R
LINE1-L LINE1_R
24

MIC2_VREFO
LINE1-R

LINE2_REFO
CA5

0603
37 FRONT_L MIC1_R 1uF RA21 33/5% MIC1_IN_R
LINE1_VREFO_R
SIDESURR-JD

DCVOL
3 13 AC5V
GPIO1 SENSEA

VREF
SEN_B CEN-JD MIC1_L CA6

0603
1uF RA23 33/5% MIC1_IN_L
12 SEN_A FRONT-IO-SENSE
BEEP
AC5V LINE IN

27

29

30

31

32

33
C LINE1_L SEN_A FRONT-JD C
MIC1-VREFO-R LINE1-JD
MIC2-VREFO LINE2-VREFO MIC1-JD LINE1_R CA9

0603
1uF RA29 33/5% L_IN_R
SURR-JD
CA11 CA12 CA13 CA14 CA15
0603 1uF 0603 1000pF 0603 1uF 0603 1uF CA10

0603
0603 LINE1_L 1uF RA31 33/5% L_IN_L
1000pF/X

1000pF@ALC650/655
RA41 0/5%/850 MIC1_IN_R
LINE OUT

+
GND_AUD RA42 0/5%/850 MIC1_IN_L FRONT_R CE25 100uF RA38 33/5% F_OUT_R

6X7
1 16V
MIC2-VREFO CFPA

+
MIC2_L HEADER2X5 FRONT_L CE27 100uF RA40 33/5% F_OUT_L

6X7
1 2 1 16V
MIC2_R 3 4 CA18 CA19
5 6 MIC2-JD 100pF 0603 0603 100pF
SUR_BACK_OR SUR_B_RR 7
9 10 LINE2-JD
SUR_BACK_OL SUR_B_LL

LINE2-VREFO FRONT-IO-SENSE
GND_AUD GND_AUD
AUDIOA
F_OUT_R AUDIO_V
CDL F_OUT_L MIC1_IN_R 5 G1
CD IN 4
RT

RTGND
RING

CDG MIC1-JD 3 LTGND G2

B MIC1_IN_L 2 LT TIP
B
CDR GND_AUD G3
For AC97 1 SLEEVE

SUR_B_RR G4
MIC IN (PINK)

SUR_B_LL
SIDE SURROUND OUT SRB_L
AUDIOB
AUDIO_V
I91

GND_AUD GND_AUD GND_AUD SIDESURR-JD F_OUT_R 25

SIDESURR_R SUR_B_R SRB_R 24
SRB_R FRONT-JD 23
F_OUT_L 22
SIDESURR_L SUR_B_L SRB_L
1
LINE OUT (GREEN)

I91

SURROUND OUT SUR_OUT_L

SURR-JD L_IN_R
AUDIOC
AUDIO_V
35
SUR_R SUR_OUT_R 34
AC97 FRONT AUDIO SUR_OUT_R LINE1-JD 33
L_IN_L 32
Q71 SUR_L SUR_OUT_L
1
78L05/D LINE IN (BLUE)
AC5V +12V
TOP I91

A
VCC RA28 0/5%/X 1
OUT GND IN
3
CEN/LFE OUT CEN_OUT
CEN-JD
GND_AUD
A

CA36 LFE_O LFE_OUT

2

1uF LFE_OUT

CEN_O CEN_OUT
GND_AUD GND_AUD

Title

ALC883/850 AUDIO CODEC

GND_AUD Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 21 of 30
5 4 3 2 1
 5 4 3 2 1

VCC PRT
LPT

LPT PRINTER
P_SLCT 13 SLCT
GND 25 ICH_RI# 15
P_PE 12 PE
R108 2.7K P_STB# GND 24
RN9-1 1 8 2.7K-8P4R P_SLCT P_BUSY 11 BUSY RIA_R DCDA_R SINA_R
RN9-2 2 7 2.7K-8P4R P_PE GND 23 SOUTA_R DTRA_R
RN9-3 3 6 2.7K-8P4R P_BUSY P_ACK# 10 ACK# DSRA_R
RN9-4 4 5 2.7K-8P4R P_ACK# GND 22 RTSA_R CTSA_R
RN10-1 1 8 2.7K-8P4R P_PD7 P_PD7 9 PPD7 RIA_R
RN10-2 2 7 2.7K-8P4R P_PD6 GND 21
RN10-3 3 6 2.7K-8P4R P_PD5 P_PD6 8 PPD6
RN10-4 4 5 2.7K-8P4R P_PD4 GND 20
P_PD5 7 PPD5 VCC
GND 19 -12V
D D
P_PD4 6 PPD4 +12V
GND 18
P_PD3 5 PPD3
RN11-1 1 8 2.7K-8P4R P_PD3 SLIN# 17 P_SLIN# C456
RN11-2 2 7 2.7K-8P4R P_PD2 P_PD2 4 PPD2 0603 0.1U C460
RN11-3 3 6 2.7K-8P4R P_PD1 INIT# 16 P_INIT# 16V C455 0603 0.1U
RN11-4 4 5 2.7K-8P4R P_PD0 P_PD1 3 PPD1 Y5V 0603 0.1U 16V
RN13-1 1 8 2.7K-8P4R P_SLIN# ERROR# 15 P_ERR# U20 16V Y5V
RN13-2 2 7 2.7K-8P4R P_INIT# P_PD0 2 PPD0 20 TSSOP20 1 Y5V
RN13-3 2.7K-8P4R P_ERR# AFD# P_AFD# 5V (P) +12V (P) CONN_COM
3 6 14
RN13-4 4 5 2.7K-8P4R P_AFD# P_STB# 1 STB# 11 10 COM
GND (P) -12V (P) DCDA_R 1 11
RIA# 12 9 RIA_R DSRA_R 6 10
DTRA# RY5 (O) RA5 (I) DTRA_R SINA_R
13 8 2
DCDA# 14 DA3 (I) DY3 (O) 7 DCDA_R RTSA_R 7

G3
G2
G1
SOUTA RY4 (Y) RA4 (I) SOUTA_R SOUTA_R
15 6 3
RTSA# 16 DA2 (I) DY2 (O) 5 RTSA_R CTSA_R 8
SINA DA1 (I) DY1 (O) SINA_R DTRA_R
17 4 4
CTSA# RY3 (O) RA3 (I) CTSA_R RIA_R
18 3 9
DSRA# RY2 (O) RA2 (I) DSRA_R
19 2 5
RY1 (O) RA1 (I)
GD75232 COMA
TSSOP20-0_65

R741 0/5%
W83627HF
R742 0/5% SIO_PME R740 4.7K/5% VCC5
W83627DHG W83627THF
28 DDR_RG3
28 DDR_RG2 SMBCLK 3,9,10,12,15,17,18,19
28 DDR_RG1 SMBDATA 3,9,10,12,15,17,18,19
IRTX IRTX 24
R743 0/5% IRRX
IRRX 24
W83627HF SIO_PME
14 IDERST# LPC_PME# 15
R744 0/5% W83627DHG ITE_RSMRST#
VCC3 R605 10K/5% W83627DHG R623 1M/5%
C R602 0/5% W83627DHG C
VCC3 V_3P0_BAT_VREG
SLP_S3#
26 +12VIN SLP_S3# 15
26 VCC15IN ATX_PSON# 26
IO_PWRGD CB153
26 V_DDR
26 +5V_IN R769 1uF
26 VCORE 0/5% R628 0/5% PWROK1 6,15

GP50
26 HM_VREF W83627DHG
FP_SWIN IO_PWRGD R630 0/5% R588 499/5%/X
FP_SWIN 25 ATXPWROK 26
VCC5 R751 0/5% VCC15IN CB162 0.1uF R612 33/5% ITE_PWRBTN# 15
W83627HF MS_DATA 24
26 PWMTEMP MS_CLK 24 PS2 MOUSE R629
1K/5%/X
KEYBOARD

102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
U22
3V_DUAL 5VSB
R617 0/5%

VREF

VBAT

GP24/MDAT
CPUVCORE

RSTOUT3#/GP33/SDA

GP42/IRTX/SOUTB
GP43/IRRX/SINB

GP54/PWROK

GP25/MCLK
AVCC
AUXTIN0

VIN0
VIN1
VIN2
VIN3

RSTOUT0#
RSTOUT1#
GP30
GP31
RSTOUT2#/GP32/SCL

RSTOUT4#/GP34
GP35
PME#
GP40/RIB#
GP41/DCDB#

GP44/DTRB#
GP45/RTSB#
GP46/DSRB#
GP47/CTSB#

CASEOPEN#
GP51/RSMRST#

GP52/SUSB#
GP53/PSON#

SUSLED/GP55
GP36
GP56/PSIN#
GP57/PSOUT#
WDTO#/GP50(EN_GTL)
4,26 THRMDC
W83627DHG
VCC3 THRMDA 103 64
4,26 THRMDA CPUTIN GP37
26 SYSTEMP 104 63 KB_DATA KB_DATA 24 R732 0/5%
105 SYSTIN GP26/KDAT 62 KB_CLK W83627DHG
4,26 THRMDC CPUD- GP27/KCLK KB_CLK 24
106 61 R736 0/5% VCC3
R626 0/5% 107 PECISB 3VSB 60 KBRST# W83627HF
Vtt KBRST KBRST# 14
W83627DHG 108 59 A20GATE C386 KBRST# R615 10K/5%/X
PECI GA20M A20GATE 14
109 58 0603 0.1U A20GATE R610 10K/5%/X 5VSB
SIC AUXFANIN1/SI RIA# 16V
110 57
SID GP60/RIA# DCDA# Y5V IO_PWRGD R49 10K/5%
26 AUX1FAN 111 56
112 AUXFANIN0 GP61/DCDA# 55
26 CPUFAN CPUFANIN0 VSS C290
113 54 SOUTA 3V_DUAL
26 SYSFAN SYSFANIN GP62/SOUTA(PENKBC) 0.1uF
114 53 SINA
R622 0/5% SST GP63/SINA DTRA#
115 52 COM1
26 CPUFANP4
W83627DHG 116
CPUFANOUT0
SYSFANOUT
W83627DHG GP64/DTRA#(PENROM)
GP65/RTSA#(HEFRAS)
51 RTSA# FP_SWIN R624 10K/5%/X
R738 0/5% 117 50 DSRA# IO_VCC
VCC5 (FAN_SET)/PLED GP66/DSRA#
W83627HF 118 49 CTSA# ITE_PWRBTN# R614 10K/5%
R749 4.7K/5% 119 BEEP/SO GP67/CTSA# 48 ATX_PSON# R41 10K/5%/X
VCC5 CPUFANIN1/GP21 3VCC
W83627HF 120 47 P_STB#
CPUFANOUT1/GP20 STB# P_AFD#
4,27 IO_CPUVID7 121 46
VID7 AFD# P_ERR# CB167
4,27 IO_CPUVID6 122 45
5VSB 123 VID6 ERR# 44 P_INIT# 0.1uF VCC3
B 4,27 IO_CPUVID5 VID5 INIT# B
4,27 IO_CPUVID4 124 43 P_SLIN#
VID4 SLIN#
OVT#/HM_SMI#

125 42 P_PD0 RTSA# R429 4.7K/5%/X

4,27 IO_CPUVID3 VID3 PD0
AUXFANOUT

126 41 P_PD1 R441 1K/5% W83627DHG

SCE#/GP22

4,27 IO_CPUVID2 VID2 PD1

SCK/GP23

DSKCHG#

P_PD2 DTRA#
DRVDEN0

R515 127 40

LFRAME#
LRESET#
4,27 IO_CPUVID1 VID1 PD2
RDATA#

SERIRQ
TRAK0#

PCICLK

P_PD3 R444 1K/5% W83627DHG

INDEX#

8.2K 128 39
LDRQ#
HEAD#

4,27 IO_CPUVID0
STEP#

IOCLK

VID0 PD3
MOA#

BUSY
3VCC

3VCC
DSA#

ACK#
SLCT
LAD3 SOUTA
LAD2
LAD1
LAD0
R613 4.7K/5% W83627DHG
DIR#

WD#
WE#

WP#

VSS

PD7
PD6
PD5
PD4
ITE_RSMRST#

PE
ITE_RSMRST# 15 VCC
GP50
2
4
6
8

C481
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
1206 10U R619 RN35
X5R 1K/5% 1K/5% PRINTER R737 0/5% VCC5
16V-1206 FDC1 P_PD4 W83627HF
1
3
5
7

1 2 FDD_RWC P_PD5
3 4 FDD_INDEX P_PD6 0 1
6 FDD_MOTORA P_PD7 RTSA 2E 4E I/O ADDRESS
7 8 FDD_DSA P_ACK# DTRA DISABLE SPI ENABLE SPI SPI SELECT
9 10 FDD_DIR P_BUSY SOUTA KBC DIABLE KBC ENABLE KBC FUNCTION
11 12 FDD_STEP P_PE GP50 TTL LEVEL VRM10 LEVEL VID LEVEL SELECT
13 14 FDD_WD P_SLCT
15 16 FDD_WE
17 18 FDD_TRAK00
19 20 FDD_WP
21 22 FDD_RDATA
23 24 FDD_HEADER IO_VCC VCC3 VCC3
25 26 FDD_DSKCHG
27 28
29 30 CB168 CB166 CB139
31 32 IO_VCC VCC3 0603 0.1uF 0603 0.1uF 0603 0.1uF
33 34

FLOPPY R745 0/5%

W83627HF VCC3 VCC
R754 0/5%
W83627HF
3 CK_48M_SIO
R731 0/5%
3 CK_33M_SIO W83627DHG
A
15 LDRQ#0 LDRQ#0 IO_VCC R735 0/5% A
SERIRQ W83627HF
14 SERIRQ
LAD3
15 LAD3
15 LAD2 LAD2
LAD1
15 LAD1
LAD0
15 LAD0
LFRAME#
15 LFRAME#
6,12,15,17,19 PLTRST#

14 IDERST# R763 0/5%

W83627HF R739
0/5% Title
W83627HF
LPC I/O, FDC, COM & LPT
LPC_PME# Size Document Number Rev
C Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 23 of 30
5 4 3 2 1
 5 4 3 2 1

VCC3

C461
0603 0.1U
16V
Y5V

D D

VCC

IRRX
23 IRRX
IRTX
23 IRTX

C C

VCC

RN1-4
RN1-3
RN1-2 KM1
8
7
6
5

RN1-1
B
2.2K 4 B
2.2K 10 VCC1 (P)
2.2K C1 VCC2 (P)
1
2
3
4

2.2K 0603 0.1U

16V
Y5V

23 KB_DATA 4 5 KB_DT 1
KB_CK KDAT (B)
23 KB_CLK 3 6 5
2 7 2 KCLK (B)
23 MS_DATA NC1
23 MS_CLK 1 8 6
NC2
33-8P4RLN1-4 MS_DT 7
LN1-3 MS_CK MDAT (B)
11
LN1-2
L8P4R MCLK (B)
8
LN1-1 NC3
12
NC4
16 14
3
GND1 (P)
9 11 9 5 3
GND2 (P)
7 1
13 8 2
H1
14 12 10 6 4 13
1
2
3
4

H2
15
16 H3
CN1-1
CN1-2
CN1-3
CN1-4

H4 17 15
17
8
7
6
5

H5
X47P 2*6PIN
25V CON2X6P-DIN

A A

Title

KB , MS , FWH, SMB & AK2001

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 24 of 30
5 4 3 2 1
 5 4 3 2 1

VCC 3V_DUAL USB_6P_R

14 USB_6P
VCC
USB_6N_R
14 USB_6N
VCC
USB_7P_R
14 USB_7P
R543 R549 330 R532
150 220 USB_7N_R
14 USB_7N
CFP
SDO80 1 2
HD_LED 1 2 SP_LED
D18 K A BAS32L HD_LED# 3 4
14 IDEACT# HD_LED# SP_LED#
SDO80 5 6 USB_4P_R
RESSW_GND PSONSW 14 USB_4P
14 SATA_LED# D19 K A BAS32L 7 8 R542 33 FP_SWIN FP_SWIN 23
RSTSW 8 PS_ON# W83627DHG USB_4N_R
9 14 USB_4N
VCC3 NC 9
5*2PIN USB_5P_R VCC
14 USB_5P
D
CH2X5P-CP10 + D
R533 R771 33/5% USB_5N_R EC20
14 USB_5N
10K W83627HF 1000UF
ECD-8-3_5
R553 33 FP_RST#_N R545 C478 25V
4,15 FP_RST# V1.2 0 0.1U0603 USB : 20:7.5:7.5:7.5:20
W83627DHG 16V USB2
Y5V 1
5 VCC1 (P) USBX2
USB_3N_C VCC2 (P)
14 USB_3N
4 USB_2N_C USB_3N_C
USB_3P_C 0603 C152 GND1 (P) USB_2P_C USB_3P_C
14 USB_3P 8
0.1U GND2 (P)
14 USB_2N USB_2N_C 16V 9
Y5V H1
10
USB_2P_C 11 H2
14 USB_2P H3 9 11
SPK_CX 12
CSPK H4
4 8
1 SPEAK+ USB_0P_C 3
VCC USB0+ (B) 3 7
2 R546 150
V1.2 V1.3 3 USB_0N_C 2
2 6
USB0- (B) 1 5
4 SPK_CX
USB_1P_C 7
USB1+ (B) 10 12
1X4
USB_1N_C 6
USB1- (B)
C

14 USB_1N USB_1N_C 2*4PIN

15 ICH_SPKR R552 2.2K B Q43 CON2X4P-USB
PMBS3904 USB_1P_C
14 USB_1P
SOT23
E

USB_0N_C
14 USB_0N
USB_0P_C
14 USB_0P
USBlanp

C C

USB_1N_C TXP/MDI0P
14 USB_1N TXP/MDI0P 19
TXN/MDI0N
TXN/MDI0N 19
USB_1P_C RXP/MDI1P
14 USB_1P RXP/MDI1P 19
RXN/MDI1N
RXN/MDI1N 19
VCC USB_0N_C MDI2P
14 USB_0N MDI2P 19
MDI2N
MDI2N 19
14 USB_0P USB_0P_C MDI3P 0603 C159
MDI3P 19
MDI3N 0.1U
MDI3N 19
ACT_LED 16V
ACT_LED 19
LINK_LED Y5V
LINK_LED 19

V1.3
3V_DUAL
[K/K32]
+
EC62 [K/K32]
1000UF
ECD-8-3_5 CONN_LAN1 ACT_LED
25V UL4 CONN_LAN2
FP-USB1 CONN_LAN3
RXP/MDI1P 1 7 CONN_LAN5
RD+ RX+ CONN_LAN6
1
2 VCC1 (P) RXN/MDI1N 2 5 T2 CONN_LAN4 LINK_LED
VCC2 (P) RD- CT CONN_LAN7
C473 C477 V_DAC 3 6 CONN_LAN8
470P 0603 470P 0603 CT RX-
16V 7 16V TXN/MDI0N 15 11
X7R GND1 (P) X7R TD- TX- USB_2N_C
8
GND2 (P) V_DAC T1 USB_2P_C
14 12
CT CMT
1 2
TXP/MDI0P 16 10 U35 IP4220CZ6
TD+ TX+ TXP/MDI0P RXP/MDI1P USB_3N_C
1 6
7
. . USB_3P_C
PE68515/X 2 . 5 3V_DUAL
B
10
10 . B
OC# (O) BLUE TXN/MDI0N 3
. . 4 RXN/MDI1N
USB_5N_R 3 USB_6N_R
P0- (B) FOR USB_ESD
USB_5P_R 5 USB_6P_R AVDD18
P0+ (B)
USB_4N_R 4 USB_7N_R U36 IP4220CZ6
P1- (B) C89 MDI2P MDI3P
1 6
USB_4P_R 6
P1+ (B)
USB_7P_R V_DAC . .
R554 0 0.01UF 2 . 5 3V_DUAL
5*2 PIN .
COH2X5P-2_54-CP9 MDI2N 3
. . 4 MDI3N

U9 FOR USB_ESD

Pulse H5007 for RTL8110S

CL33
0603

V_DAC 1 24 RL23 1 2 75
0.01U MDI3N TCT1 MCT1 CONN_LAN8 RJ45
2 23
MDI3P TD1+ MX1+ CONN_LAN7
3 22
V_DAC 4 TD1- MX1- 21 RL24 1 2 75 CONN_LAN1 TX+ 1 2 TX- CONN_LAN2
MDI2N TCT2 MCT2 CONN_LAN6 CONN_LAN3 RX+ DC+ CONN_LAN5
5 20 3 75 3 1 4
MDI2P TD2+ MX2+ CONN_LAN5 CONN_LAN6 DC- RX- CONN_LAN4
6 19 5 6
V_DAC TD2- MX2- T2 RL25 1
7 18 2 75 CONN_LAN7 DD+ 7 8 DD- CONN_LAN8
RXN/MDI1N TCT3 MCT3 CONN_LAN4 86 4 2
8 17
RXP/MDI1P 9 TD3+ MX3+ 16 CONN_LAN3 RJ45

12
11
10
9
V_DAC TD3- MX3- T1 RL26 1
10 15 2 75
TXN/MDI0N TCT4 MCT4 CONN_LAN2
11 14
TXP/MDI0P TD4+ MX4+ CONN_LAN1
12 13
TD4- MX4-

V1.1
A A

Title

USB &, FPIO

Size Document Number Rev
C Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 25 of 30
5 4 3 2 1
 5 4 3 2 1

+12V_CORE
VCC -12V VCC3 +12V 5VSB
PW12
3 3 1 1
12V1 GND1
4 4 2 2
12V2 GND2
2*2PIN +12V VCC3 VCC -12V
PW1 C189
11 1 0603 0.1U
D 13 1 16V D
14 +3.3VDC1(P) +3.3VDC2(P) 2 Y5V C194 C131 C178 C182
-12VDC(P) +3.3VDC3(P) 0603 0.1U 0603 0.1U 0805 10U 0603 0.1U
15 3
COM1 COM6 16V 16V 6.3V 16V
23 ATX_PSON# 16 4
PS_ON +5VDC4(P) VCC Y5V Y5V Y5V Y5V
17 5
C126 18 COM2 COM7 6
0603 470P COM3 +5VDC5(P)
19 7
16V COM4 COM8
20 8 ATXPWROK 23
X7R -5V/NC(P) PWR OK
21 9 POWER CONNECTOR DECOUPLIG
+5VDC1(P) 5VSB(P) C169
22 10
+5VDC2(P) +12VDC1(P) 0603 470P C193 C195
23 11
+5VDC3(P) +12VDC2(P) 16V 0603 0.1U 0603 0.1U
24 12
COM5 +3.3VDC4(P) X7R 16V 16V
24 POWER 12 Y5V Y5V

24PIN
COP2X12P-ATX

VCC VCC VCC

C204 C206 C207

0603 0.1U 0603 0.1U 0603 0.1U
16V 16V 16V
C Y5V Y5V Y5V C

SYS FAN
VCC3 VCC3 VCC3

VCC3

VCC3

+12V
+12V
23 SYSFAN
Temperature Sensing
3PIN AUXFAN1
23 AUX1FAN 3
SEN 3
"SYSTEM USE"
2 1 2

t
+12V 2 23 SYSTEMP
+12V 1 RT4
GND 1 10K-3%
23 PWMTEMP
BROWN R0603
COB1X3P-2_54-FAN
C20 R536 1% 10K_1%
23 HM_VREF
0603 0.1U
B
16V "PWM USE" B
Y5V
4,23 THRMDA R531 1%
30K_1%/X
"CPU USE" C475
"FOR LM358/+12V" 0603 3300P
16V
4,23 THRMDC Y5V

Voltage Sensing
+12V R524 1% R527 1% 10K_1%
56K_1%
+12VIN 23

23 CPUFANP4

CPU FAN VCC3 VCC R541 1% R540 1% 10K_1%

30K_1%
+5V_IN 23

VCCP VCORE 23
R1 VCCDDR
4.7K CPUFAN1
V_DDR 23
VCC15 VCC15IN 23
4 3 2 1

4
+12V Control
23 CPUFAN 3
SENSE
A A
2
+12V
1
GND

4-wire
COB1X4P-2_54-FAN
Title

ATX POWER & FAN

Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 26 of 30
5 4 3 2 1
 5 4 3 2 1

R290

+12V_CORE AUX12V_R

A
C269 VIN

SDO80
2.2
0805 1U D32 C218 0.1U
馋ん (Q1120H60-70 H=9.3mm)

0603
25V BAS32L 16V

K
Y5V X7R +12V_CORE

2
UGATE3 Q48
R262 PH3 AOD452
2.2 LGATE3

15

10

11

14
Rds=10.5mohm

3
R293

9
UGATE1 R279 2.2 VCORE1
8 21 AUX12V_R
Qg=24nC VCCP

PVCC3

BOOT3

UG3

PHASE3

LG3
5VSB 5V PVCC2 L33
C220 PH1 Q44

A
D D

2
2.2 0805 1U 3

SDO80
25V TS D31 C78 COIL/5053/1UH/L
Y5V BAS32L 0.1UF

K
R263 R107
2.2 C219 0.1U LGATE1

3
0603
PWM3 16V 2.2_0805

GND
PWM2
7
5
PWMIN3 BOOT2
16
X7R
Rds=6mohm C75
PWM1 4 PWMIN2 17 UGATE2 AOD438
Qg=47.5nC 0603 1000P
PWMIN1 UG2 16V
19 PH2 X7R
PHASE2
25
GND
PWM1 + EC12
6 20 LGATE2 VIN 560UF
GND LG2

PHASE1
12 PWM2 4V

BOOT1
PVCC1
GND
13 PSA

UG1
LG1
18 GND VCORE24
GND

2
U10 Q17

22

23

24

1
RT9605B-F AOD452

AUX12V_R

3
C54 UGATE2 R257 2.2 + EC13 + EC16

A
L34 560UF 560UF
0.1UF SDO80 D29 +12V_CORE PH2 Q47 4V 4V

2
K BAS32LR230 PSA PSA
2.2 +12V_CORE COIL/5053/1UH/L

R245
LGATE2 2.2_0805

3
0603 C213 UGATE1
0.1U C202
PH1 AOD438 0603 1000P
16V
VIN 16V
X7R LGATE1 X7R

2
C R747 VCORE3 C
51R
C557 C68nF C556 C5.6P50N C561 X_C470P50N Q21
VCCP
AOD452

3
R748 6.8KR R782 0R
R761 15KR1% C562 C2200P50X R758 2.7KR1% UGATE3 R258 2.2
VCCSENSE 4
C558 C1U25X0805 R783 1KR1% L35
PH3 Q46
VCC

2
R786 24KR PWM3 + EC9
LGATE3 COIL/5053/1UH/L 560UF
R779 47R1% R764 360R1% PWM4 4V
R276 PSA
C563 C270P50N 2.2_0805

3
T_ADJ
PWM1

PWM2

PWM3

C203
AOD438 0603 1000P
16V
VCC
VIN X7R
U3
41

15

13

17

16

26

27

28
6

SDO80 D27 + EC7

RT

IMAX

SS

COMP

FB
GND

TCOC
ADJ

PWM 2

PWM 3
PWM 1

R765 82KR1% K A +12V_CORE VCORE24 560UF

VCCP
IO_CPUVID7 32 R766 82KR1% BAS32L 4V
4,23 IO_CPUVID7 VID 7 R755 82KR1% R762 100R1% PSA
IO_CPUVID6 33 29
4,23 IO_CPUVID6 VID 6 PWM 4
IO_CPUVID5 34 30
4,23 IO_CPUVID5 VID 5 PWM 5 VCC
From phase-3
4,23 IO_CPUVID4 IO_CPUVID4 35 20 R752 470R1% VCORE3 UGATE4
VID 4 ISN35
From phase-2,4
IO_CPUVID3 36 19 R777 470R1% PH4
4,23 IO_CPUVID3 VID 3 ISN24 VCORE24
From phase-1
4,23 IO_CPUVID2
IO_CPUVID2 37
VID 2
GND ISN1
18 R750 470R1%
VCORE1
+ EC4
IO_CPUVID1 38 25 560UF
4,23 IO_CPUVID1 VID 1 ISP1 LGATE4 4V
IO_CPUVID0 39 24 C568 C567 C565 PSA
4,23 IO_CPUVID0 VID 0 ISP2
B
C1U25X0805 C1U25X0805 C1U25X0805 B

RT8802A
4 VRD_SEL VRD_SEL 40 23 R759 X_1500KR1%
VID_SEL ISP3
R281 10 31 22 R775 X_150KR1%
VCC VDD ISP4
C564 C1U25X0805
VR_HOT

VR_FAN

12 21 R788 X_75KR1%
EN/VTT

QRSEL
FBRTN

DVD ISP5
TSEN
IOUT

GND
OFS
PG

+12V_CORE R770 9.09KR1% Tsen

RT8802APQV
1

14

11

10

41

R753 1.1KR1% R756 R760 R772 RT2

510R1% 510R1% 510R1% T_ADJ 10KRT1%
VCC
C566 C0.1U50X Near Choke
VR_HOT

VR_FAN

Tsen PH1
PH2
R757 10KR1% VRM_EN PH3
+12V_CORE VIN
PH4 UGATE4
R767 1.2KR1%-1
12V_4PIN AUX12V-R1 PH4
PWM4
R716 R768 X_220KR1% LGATE4
30 VTT_PWRGD
VTT_OUT_RIGHT 4.7KR-1
4 VR_RDY
VID_SEL VID7
VCC
4 VSSSENSE VTT X VR11
R746 X_220KR1% GND X VR10
VCC
VCC5 VTT K8 VCC
R778 C559 VCC5 GND K9
R785 +12V_CORE VIN
X_200KR1%

C0.1U50Y

51R L37
RN21 VTT_OUT_RIGHT
4 CPUVID0 VID0 8 7 VTT_OUT_RIGHT
4 CPUVID1
VID1 6 5 COIL/5053/1UH/L + EC1 +EC2 +EC17 C7 C8 C12 C13
VID2 4 3 VR_FAN 1500UF 1500UF 1500UF 0805 1U 0805 1U 0805 1U 0805 1U
4 CPUVID2
VID3 2 1 16V 16V 16V 25V 25V 25V 25V
4 CPUVID3
680/8P4R PSA PSA PSA Y5V Y5V Y5V Y5V
VID4 RN23 8 7
4 CPUVID4
VID5 6 5
4 CPUVID5
A
4 CPUVID6 VID6 4 3 A
VID7 2 1 VCC
4 CPUVID7
VCC3 680/8P4R

R620

10K/6 VRD_SEL R781 680R

R717
VR_HOT
4 VR_RDY VRM_PWRGD 15
SOT23
0/6/X R621 A1
C335 K Title
VCCP
100K/6 1U/6/Y5V/10V/Z A2
VCORE
D28 BAT54C Size Document Number Rev
D-SOT23-A1KA2 C Lakeport CRB 1.4
30V
Date: Wednesday, July 09, 2008 Sheet 27 of 30
5 4 3 2 1
 5 4 3 2 1

+12V

3V_DUAL VCCDDR

+12V R589 VTT12 VCC1_25

4.7_0805

R577 C268 RN22

210 0603 1U VCC 8 7

4
1%

16V C520 6 5

D
3 UPI3055AH Y5V 0603 1U 4 3
+ Q31 16V
1 G 2 1
D 2 Y5V 0/8P4R D
R578 - U32A TO252 VCC1_25 R590 X30K

S
100 11 LM324
1%

ICSOP14

DO214AC
A
R476 D22 C308 +

1
X1K SS12 0603 1U 8X12 EC72
VCC_1.05V U33 D-SOD80 10V 1500uF/6.3V
1.25V/14A

D
K
5
C522 0.1U

0603
Y5V
1.05V/2A C494

0603
0.022U 7 1 16V G Q37

VCC
16V Y5V OCSET BOOT R334 Y5V UPI3055AH L38 X3.3UH
2
UGATE
+ EC40 R584 R592 C521 8 2.2_0805 TO252 FET-TO252 CHOKE_R50M

S
220UF 0603 X12P PHASE
124 1% 100K 1 2 VCC1_25

1%
6.3V 50V

GND
5VSB CAP6D3X7 NPO6 4

D
FB LGATE R369
UPDATE G Q33 2.2

3
W83321S + EC66 + EC67
3V_DUAL SOP8-1_27 TO252 1000UF 1000UF

S
VCC1_25 R587 70L02H C365 6.3V 6.3V
210/1% FET-TO252 0603 1000P ECD-8-3_5 ECD-8-3_5

1%
R594 16V
+12V 10K X7R

1%
+ EC69
R575 1000UF
1.69K 6.3V
4

VCC
1%

ECD-8-3_5
D

5 UPI3055AH +12V VCC1_25 VCC1_25 VCC1_25

+ Q26
7 G JP5 JUMPER: 1.8V (Default)
6 + EC49
C R576 - U32B TO252 JP6 JUMPER: 1.9V 1000UF C
S

1K-1% LM324 R569 6.3V C190 C192 C208

11
1%

ICSOP14 4.7_0805 YXG 0603 0.1U 0603 0.1U 0603 0.1U

R519 16V 16V 16V
X1K Y5V Y5V Y5V
VTT12 VCC
C496
1.2V/3A 0603 1U
16V
+ EC19 Y5V
1000UF R570 X30K
6.3V
ECD-8-3_5

DO214AC
A
D20 C306 + EC68 L28 X3.3UH
VCCDDR SS12 0603 1U 1000UF CHOKE2U8-20A_3P
U31 D-SOD80 10V 6.3V 1 2

D
K
5
C498 0.1U

0603
Y5V ECD-8-3_5
C493

0603
0.022U 7 1 16V G Q36

VCC
16V Y5V OCSET BOOT R333 Y5V UPI3055AH
2
R574 R573 C497 UGATE
8 2.2_0805 TO252 FET-TO252 1.8V/14A

S
3V_DUAL VCCDDR 220 100K 0603 X12P PHASE
+12V VCCDDR

1%
50V

GND
NPO 6 4

D
FB LGATE R368
G Q32 2.2

3
R316 R566 W83321S + EC37 + EC42 + EC38 + EC33 + EC39 + EC41
1.1K 150 SOP8-1_27 TO252 1000UF 220UF 220UF 220UF 220UF 220UF

S
4
1%

1%

70L02H C353 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

D

10 FET-TO252 0603 1000P ECD-8-3_5 CAP6D3X7CAP6D3X7 CAP6D3X7 CAP6D3X7 CAP6D3X7

+ Q30 R595 16V
B 8 Z219 G B
9 UPI3055AH 10K X7R
-

1%
R317 U32C TO252 FET-TO252
S

1K-1% LM324 23 DDR_RG1 DDR_RG1

11
1%

ICSOP14 R520 23 DDR_RG2 DDR_RG2

X1K 23 DDR_RG3 DDR_RG3

VCC15

+ EC70 3V_DUAL
CLOSE U51 1000UF
6.3V
ECD-8-3_5 + EC53 5VSB
5VSB 3V_DUAL 1000UF
3V_DUAL VCCDDR U8 L1117_3.3 6.3V
+12V 3 2 ECD-8-3_5 + EC43
VIN VO1 5VSB 220UF
4

GND
VO2 6.3V
CAP6D3X7
R582

1
VCC3 VCC3 VCC3 51
4
1%

12 +
VCC3 14 G Q34 R603 120_1%
C209 C212 C214 13 UPI3055AH
-
0603 0.1U 0603 0.1U 0603 0.1U R318 U32D TO252 FET-TO252
S

16V 16V 16V LM324 R604

33 3.3V_Dual and 5V_Dual Voltage
11

VCCDDR
1%

Y5V Y5V Y5V ICSOP14 R521 200_1%

X1K
5
6
7
8

A U62 A
1
VCTL2
GND VCTL3
VCTL4
VCTL1

VIN DDRVTT VCC1_25

+ EC71
R567 3 4 CLOSE U51 1000UF
REF VOUT 6.3V
1K-1%
1%

+ EC30 C302 ECD-8-3_5

AP1250M C188 1000UF 0603 0.1U
2

0603 0.1U 6.3V 16V Title

SOP8-1_27 16V ECD-8-3_5 Y5V
R568 Y5V
Co-Lay OTHER DC-DC CONVERTER
1K-1% Size Document Number Rev
1.4
1%

Custom Lakeport CRB

Date: Wednesday, July 09, 2008 Sheet 28 of 30
5 4 3 2 1
 5 4 3 2 1

12
11
10

22
23
24
25

12
11
10

22
23
24
25

12
11
10

22
23
24
25
9

9
MH2 XMH-HOLE MH3 XMH-HOLE MH5 XMH-HOLE
14,18 AD[0..31]
1 8 1 8 1 8
3V_DUAL VCC3 -12V 2 7 2 7 2 7
+12V 3 6 3 6 3 6
VCC 4 5 4 5 4 5

D D

13
14
15
16
18
19
20
21

13
14
15
16
18
19
20
21

13
14
15
16
18
19
20
21
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13

12
11
10

22
23
24
25

12
11
10

22
23
24
25
9

9
AD14 MH1 XMH-HOLE MH6 XMH-HOLE 1
AD15 1 8 1 8
AD16 2 7 2 7 F1
AD17 3 6 3 6 XFMARK
AD18 4 5 4 5
AD19
AD20 1

13
14
15
16
18
19
20
21

13
14
15
16
18
19
20
21
AD21
AD22 F2
AD23 XFMARK
AD24 GND_AUD
AD25
AD26
C AD27 C
AD28
AD29
AD30
AD31
AD24

14,18 C_BE#0
14,18 C_BE#1
14,18 C_BE#2
14,18 C_BE#3

14,18 PIRQ#E
14,18 PIRQ#F
14,18 PIRQ#G
14,18 PIRQ#H

14 PREQ#3
14 PGNT#3

14,18 PCI_PME#
14,18 FRAME#
14,18 TRDY#
14,18 STOP#
14,18 IRDY#
14,18 DEVSEL#
14,18 PLOCK#
14,18 PERR#
14,18 PAR
B 18 SMBDATA_P SMBDATA_P B
14,18 PCI_RST#
18 SMBCLK_P SMBCLK_P SERR# 14,18
REQ64#4
18 ACK64# ACK64#
3 CK_33M_S4

EMI
VCC15 VCC15

VCC3
C282 C275
0603 0.1U 0603 0.1U
REQ64#4 16V 16V
Y5V Y5V

A A

Title

MECHANICAL
Size Document Number Rev
Custom Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 29 of 30
5 4 3 2 1
 5 4 3 2 1

D D

C C

A7A12
A18
A26
A34
A39
B10
B14
B19
B22
B23
B26
B31
B32
B37
C4C5C6C11
C26
D3D17
D21
D31
D40
E3E9E11
E13
E15
E20
E21
E24
E32
E43
F3F18
F21
F27
F35
F37
G1G7G9G11
G12
G13
G21
G32
G38
G42
H13
H15
H17
H20
H21
H29
H31
J5 J7 J9 J21J27J32J35J38K2K12
K13
K18
K21
K26
K43
L3L5L7L11
L20
L21
L29
L31
L32
L33
M1M7M10
M15
M17
M21
M27
AF6
AF7
AF8
AF9
AF10
AF36
AF37
AF43
AG34
AG37
AH42
AJ33
AJ36
AJ39
AK43
AL33
AL36
AM1
AM2
AM4
AM7
AM9
AM11
AM20
AM23
AM24
AM29
AM33
AM36
AM40
AM42
AN4
AN11
AN12
AN13
AN15
AN20
AN23
AN24
AN29
AN31
AN38
AP1
AP18
AP24
AP43
AR6
AR9
AR17
AR20
AR21
AR23
AR26
AR27
AR32
AR33
AR38
AT12
AT13
AT15
AT29
AT31
AU2
AU6
AU20
AU24
AU32
AU38
AU42
AV7
AV9
AV11
AV17
AV21
AV23
AV27
AV35
AV37
AW1
AW41
AW43
AY4
AY41
BB7
BC5
BC10
BC24
BC28
BC32
BC37
U6G
VSS_180
VSS_179
VSS_178
VSS_177
VSS_176
VSS_175
VSS_174
VSS_173
VSS_172
VSS_171
VSS_170
VSS_169
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
VSS_129
VSS_128
VSS_127
VSS_126
VSS_125
VSS_124
VSS_123
VSS_122
VSS_121
VSS_120
VSS_119
VSS_118
VSS_117
VSS_116
VSS_115
VSS_114
VSS_113
VSS_112
VSS_111
VSS_110
VSS_109
VSS_108
VSS_107
VSS_106
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100
VSS_99
VSS_98
VSS_97
VSS_96
VSS_95
VSS_94
VSS_93
VSS_92
VSS_91
VSS_90
VSS_89
VSS_88
VSS_87
VSS_86
VSS_85
VSS_84
VSS_83
VSS_82
VSS_81
VSS_80
VSS_79
VSS_78
VSS_77
VSS_76
VSS_75
VSS_74
VSS_73
VSS_72
VSS_71
VSS_70
VSS_69
VSS_68
VSS_67
VSS_66
VSS_65
VSS_64
VSS_63
VSS_62
VSS_61
VSS_60
VSS_59
VSS_58
VSS_57
VSS_56
VSS_55
VSS_54
VSS_53
VSS_52
VSS_51
VSS_50
VSS_49
VSS_48
VSS_47
VSS_46
VSS_45
VSS_44
VSS_43
VSS_42
VSS_41
VSS_40
VSS_39
VSS_38
VSS_37
VSS_36
VSS_35
VSS_34
VSS_33
VSS_32
VSS_31
VSS_30
VSS_29
VSS_28
VSS_27
VSS_26
VSS_25
VSS_24
VSS_23
VSS_22
VSS_21
VSS_20
VSS_19
VSS_18
VSS_17
VSS_16
VSS_15
VSS_14
VSS_13
VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1
946GZ(PL)
7 OF 7

GND

VSS_293
VSS_292
VSS_291
VSS_290
VSS_289
VSS_288
VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_280
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_187
VSS_186
VSS_185
VSS_184
VSS_183
VSS_182
VSS_181

A3A5A41
C1C43
E1R21
W20
W22
W24
AA18
AC18
AE18
AE20
AE22
AE24
AF19
AF21
AF23
AY40
BA1
BC3
BC41
M33
M35
M37
M42
N5N7N10
N13
N21
N27
N31
N33
N36
P2P17
P18
P21
P30
P43
R3R5R8R11
R31
R33
R36
T1T42
U5U7U8U35
U38
V2V5V8V11
V32
V34
V37
V39
V43
W3Y1Y5Y7Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
AD37
AD39
AD42
AF1
AF2
AF3
AF5
B B

VTT12

3V_DUAL

R357
R54 X1K
10K

R44 0
D

VTT_PWRGD 27

G Q12
2N7002
C

R35
SOT23 FET-SOT23
S

A
VTT_OUT_LEFT B Q15 A
PMBS3904
C19 SOT23 TR-SOT23
E

2.4K R45 0603 X1U 200mA

20K 16V
Y5V 40V

Title

GMCH-GND
Size Document Number Rev
C Lakeport CRB 1.4
Date: Wednesday, July 09, 2008 Sheet 30 of 30
5 4 3 2 1