Scribd
Upload
49 views1 page

Ec8095 Rejinpaul Iq

Uploaded by

Nandhini Mohan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
49 views1 page

Ec8095 Rejinpaul Iq

Uploaded by

Nandhini Mohan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

Anna University Exams– Regulation 2017

Rejinpaul.com Unique Important Questions –BE/BTECH

EC8095 VLSI Design

PART B & PART C IMPORTANT QUESTIONS

om
Unit I
1. Explain in detail about the i) ideal I-V characteristics of nMOS and pMOS devices (ii) non-ideal I-V characteristics
of nMOS and pMOS devices.
2. Explain the need of Scaling, scaling principles and fundamental units of CMOS inverter.
3. Illustrate with necessary diagrams the i) CV characteristics of CMOS. ii)Explain DC transfer characteristics of
CMOS
4. i) Design the function Y = (A + B + C).D using CMOS compound gate. Function and draw the stick diagram and
layout diagram. ii) Develop the necessary stick diagram and layout for the design of inverter, NAND and NOR

l.c
gates.
5. Interpret the DC transfer characteristics of CMOS inverter.
6. Derive the expressions for effective resistance and capacitance Estimation Using Elmore’s RC delay model.
Unit II
1. i) Explain the static and dynamic power dissipation in CMOS circuits with necessary diagrams and expression. ii)
Write a note on power reduction in CMOS logic gates.

u
2. Evaluate the design of Differential Cascode Voltage Switch with Pass Gate (DCVSPG).
3. What is transmission gate and explain the use of transmission Gate.
4. Write short notes on (i) ratioed circuits (ii) Dynamic CMOS circuits
pa
5. Illustrate the operation of dynamic CMOS Domino and NP Domino logic with necessary diagrams.
Unit III
1. Examine the Monostable Sequential circuits and Astable circuits with neat an example.
2. Analyze the basics of synchronous timing, clock skew, clock jitter and combined impact of skew and jitter.
3. Formulate the following Nonbistable sequential circuits (i) The Schmitt Trigger (ii) Monostable Sequential Circuits
(iii) Astable Circuits.
4. (i) Define Schmitt trigger and its properties. (ii) Describe Schmitt trigger and its CMOS implementation with neat
jin

diagram.
5. Discuss in detail: (i) Master-Slave Edge-Triggered Register (ii) Timing properties of Multiplexer-Based Master-
Slave registers.
Unit IV
1. (i) Demonstrate how to reduce the number of generated partial products by half. (ii) Show the method to
.re

accumulate partial products in array form.


2. Design a multiplier for 5 bit by 3 bit. Explain its operation and summarize the number of adders. Discuss it over
Wallace multiplier.
3. Examine the operation of: (i) Static CMOS adders. (ii) Mirror adder.
4. List the logic design considerations of binary adder and explain i) Carry skip adder ii) Carry save adder
5. Evaluate the architecture of large memory array with subarray memory Circuitry.
6. (i) Design the arithmetic logic unit (ALU) of 64 bit high end microprocessor and arithmetic operators involved in
w

design.(ii) Give a short note on Logarithmic shifter.


Unit V
1. Classify the types of FPGA routing techniques and explain.
2. (i) Describe the FPGA block structure and its components. (ii)Describe the techniques involved in Switch box
w

programmable wiring.
3. (i) Describe the Steps involved in semicustom design flow. (ii)Explain the concepts of programmable
interconnect.
4. Describe the various types of ad hoc testing techniques with neat diagram.
w

5. (i) Explain the manufacturing test principle with an example of digital logic circuits. (ii) Give a short note on stuck-
at faults model.
6. Draw and explain the building blocks of FPGA.

Download Important Question from rejinpaul.com & also refer your friends!!

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy