S-8205A/B Series

BATTERY PROTECTION IC
www.ablic.com FOR 4-SERIES OR 5-SERIES CELL PACK
© ABLIC Inc., 2010-2021 Rev.2.0_00

The S-8205A/B Series includes high-accuracy voltage detection circuits and delay circuits, in single use, makes it possible
for users to monitor the status of 4-series or 5-series cell lithium-ion rechargeable battery.
The S-8205A/B Series is suitable for protecting lithium-ion rechargeable battery pack from overcharge, overdischarge, and
overcurrent.

 Features
• High-accuracy voltage detection function for each cell
Overcharge detection voltage n (n = 1 to 5) 3.550 V to 4.500 V*1 (50 mV step) Accuracy ±25 mV
Overcharge release voltage n (n = 1 to 5) 3.300 V to 4.500 V*2 Accuracy ±50 mV
Overdischarge detection voltage n (n = 1 to 5) 2.000 V to 3.200 V*1 (100 mV step) Accuracy ±80 mV
Overdischarge release voltage n (n = 1 to 5) 2.000 V to 3.400 V*3 Accuracy ±100 mV
• Discharge overcurrent detection in 2-step
Discharge overcurrent detection voltage 0.050 V to 0.300 V*4 (50 mV step) Accuracy ±15 mV
Short circuit detection voltage 0.500 V to 1.000 V*4 (100 mV step) Accuracy ±100 mV
• Charge overcurrent detection
Charge overcurrent detection voltage −0.300 V to −0.050 V (50 mV step) Accuracy ±30 mV
• Settable by external capacitor; Overcharge detection delay time, Overdischarge detection delay time, Discharge
overcurrent detection delay time, Charge overcurrent detection delay time
(Load short circuit detection delay time is internally fixed.)
• S-8205A Series: used for 4-series cell, S-8205B Series: used for 5-series cell
• Independent charging and discharge control by the control pins
• 0 V battery charge Enabled, inhibited
• Power-down function Available, unavailable
• High-withstand voltage Absolute maximum rating : 28 V
• Wide range of operation voltage 2 V to 24 V
• Wide range of operation temperature Ta = −40°C to +85°C
• Low current consumption
During operation 40 μA max. (Ta = +25°C)
During power-down 0.1 μA max. (Ta = +25°C)
• Lead-free (Sn 100%), halogen-free

*1. The overcharge detection voltage n (n = 1 to 5) and overdischarge detection voltage (n = 1 to 5) are not selectable
if the voltage difference between them is 0.6 V or less.
*2. Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step.
(Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage)
*3. Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.2 V to 0.7 V in 100 mV step.
(Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage)
*4. The discharge overcurrent detection voltage and load short circuit detection voltage are not selectable if the voltage
difference between them is 0.3 V or less.

 Application
• Rechargeable lithium-ion battery pack

 Package
• 16-Pin TSSOP

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Block Diagram
1. S-8205A Series

Control circuit
RVMD
VM
RVMS Delay circuit VDD
Delay circuit
Delay circuit Delay circuit
Delay circuit VC1
Overcharge 1
−
Over- +
discharge 1
+
−
VC2
CO Overcharge 2
−
Over- +
discharge 2
+
−
DO Overcharge 3 VC3
−
Over- +
discharge 3
+
−

VINI + Overcharge 4 VC4

− −
Discharge +
Over-
overcurrent discharge 4
+ +
− −
Load
short circuit
+ VC5
−
Charge
overcurrent

RCTLC
CTLC

RCTLD
VSS
CTLD

CCT

CIT

CDT

Remark Diodes in the figure are parasitic diodes.

Figure 1
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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

2. S-8205B Series

Control circuit
RVMD
VM
RVMS Delay circuit VDD
Delay circuit
Delay circuit Delay circuit
Delay circuit VC1
Overcharge 1
−
Over- +
discharge 1
+
−
VC2
CO Overcharge 2
−
Over- +
discharge 2
+
−
DO Overcharge 3 VC3
−
Over- +
discharge 3
+
−

VINI + Overcharge 4 VC4

− −
Discharge +
Over-
overcurrent discharge 4
+ +
− −
Load
short circuit
+ Overcharge 5 VC5
− −
Charge
overcurrent Over- +
discharge 5
+
−
RCTLC
CTLC

RCTLD
VSS
CTLD

CCT

CIT

CDT

Remark Diodes in the figure are parasitic diodes.

Figure 2

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Product Name Structure

1. Product Name

S-8205 x xx - TCT1 U

Environmental code
U: Lead-free (Sn 100%), halogen-free

*1
Package abbreviation and IC packing specifications
TCT1: 16-Pin TSSOP, Tape

Serial code*2
Sequentially set from AA to ZZ

Product series name

A: 4-cell
B: 5-cell

*1. Refer to the tape drawing.

*2. Refer to "3. Product Name List".

2. Package
Table 1 Package Drawing Code

Package Name Dimension Tape Reel

16-Pin TSSOP FT016-A-P-SD FT016-A-C-SD FT016-A-R-S1

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

3. Product Name List

Table 2 S-8205A Series (For 4-Series Cell)

Discharge Load Short Charge

Overcharge Overcharge Overdischarge Overdischarge
Overcurrent Circuit Overcurrent 0V Power-
Detection Release Detection Release Delay
Product Name Detection Detection Detection Battery down
Voltage Voltage Voltage Voltage Time*1
Voltage Voltage Voltage Charge Function
[VCU] [VCL] [VDL] [VDU]
[VDIOV] [VSHORT] [VCIOV]
S-8205AAA-TCT1U 4.225 V 4.125 V 2.300 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Available (1)
S-8205AAB-TCT1U 4.225 V 4.075 V 2.300 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (1)
S-8205AAC-TCT1U 4.225 V 4.125 V 2.500 V 3.000 V 0.200 V 0.500 V −0.050 V Enabled Available (2)
S-8205AAD-TCT1U 3.850 V 3.700 V 2.700 V 2.900 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAE-TCT1U 4.250 V 4.150 V 2.700 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAF-TCT1U 4.250 V 4.150 V 2.500 V 3.000 V 0.100 V 0.500 V −0.100 V Inhibited Available (2)
S-8205AAG-TCT1U 4.300 V 4.150 V 2.600 V 3.000 V 0.100 V 0.500 V −0.100 V Inhibited Available (2)
S-8205AAH-TCT1U 4.400 V 4.250 V 2.800 V 3.000 V 0.150 V 0.600 V −0.100 V Inhibited Available (2)
S-8205AAI-TCT1U 4.450 V 4.300 V 2.800 V 3.000 V 0.200 V 0.600 V −0.150 V Inhibited Available (2)
S-8205AAJ-TCT1U 4.500 V 4.300 V 2.800 V 3.000 V 0.200 V 0.600 V −0.150 V Inhibited Available (2)
S-8205AAK-TCT1U 4.400 V 4.200 V 2.800 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAL-TCT1U 4.425 V 4.225 V 2.800 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAM-TCT1U 4.350 V 4.150 V 2.800 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAN-TCT1U 3.750 V 3.600 V 2.000 V 2.500 V 0.150 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAO-TCT1U 4.425 V 4.275 V 2.800 V 3.000 V 0.150 V 0.600 V −0.100 V Inhibited Available (2)
S-8205AAP-TCT1U 4.280 V 4.180 V 2.300 V 2.500 V 0.050 V 0.500 V −0.300 V Enabled Available (2)
S-8205AAQ-TCT1U 4.175 V 4.025 V 2.750 V 3.050 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205AAR-TCT1U 4.225 V 3.975 V 2.700 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
*1. The delay time is set by the external capacitor.
But the discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) are
calculated by discharge overcurrent detection delay time (tDIOV) and charge overcurrent detection delay time (tCIOV) as
the following equations. 1 [ms] (typ.) is the internal delay time of the S-8205A Series.

(1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.)

(2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.)

Moreover, refer to "7. Delay Time Setting" in " Operation" for calculational methods of delay times.

Remark Please contact our sales representatives for products other than the above.

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

Table 3 S-8205B Series (For 5-Series Cell)

Discharge Load Short Charge

Overcharge Overcharge Overdischarge Overdischarge
Overcurrent Circuit Overcurrent 0V Power-
Detection Release Detection Release Delay
Product Name Detection Detection Detection Battery down
Voltage Voltage Voltage Voltage Time*1
Voltage Voltage Voltage Charge Function
[VCU] [VCL] [VDL] [VDU]
[VDIOV] [VSHORT] [VCIOV]
S-8205BAA-TCT1U 4.225 V 4.125 V 2.300 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Available (1)
S-8205BAB-TCT1U 4.225 V 4.075 V 2.300 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (1)
S-8205BAC-TCT1U 4.200 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Available (1)
S-8205BAD-TCT1U 4.200 V 4.000 V 2.700 V 3.000 V 0.150 V 1.000 V −0.100 V Enabled Available (1)
S-8205BAE-TCT1U 4.200 V 4.100 V 2.500 V 3.200 V 0.150 V 0.500 V −0.100 V Enabled Available (1)
S-8205BAF-TCT1U 4.200 V 4.050 V 2.700 V 3.000 V 0.200 V 0.500 V −0.200 V Enabled Available (1)
S-8205BAG-TCT1U 4.250 V 4.150 V 2.700 V 3.000 V 0.200 V 0.500 V −0.200 V Enabled Available (1)
S-8205BAH-TCT1U 4.250 V 4.050 V 2.000 V 2.500 V 0.150 V 0.500 V −0.100 V Enabled Available (1)
S-8205BAI-TCT1U 4.225 V 4.075 V 2.300 V 3.000 V 0.100 V 0.500 V −0.050 V Inhibited Available (1)
S-8205BAJ-TCT1U 4.200 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Available (2)
S-8205BAK-TCT1U 4.200 V 4.000 V 2.700 V 3.000 V 0.150 V 1.000 V −0.100 V Enabled Available (2)
S-8205BAL-TCT1U 4.250 V 4.100 V 2.700 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Unavailable (2)
S-8205BAM-TCT1U 4.225 V 4.125 V 2.500 V 2.700 V 0.100 V 0.500 V −0.050 V Enabled Available (1)
S-8205BAN-TCT1U 4.250 V 4.100 V 2.700 V 3.000 V 0.150 V 0.500 V −0.050 V Inhibited Available (1)
S-8205BAO-TCT1U 3.900 V 3.800 V 2.000 V 2.300 V 0.100 V 0.600 V −0.100 V Enabled Available (1)
S-8205BAP-TCT1U 4.200 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Unavailable (2)
S-8205BAQ-TCT1U 3.900 V 3.750 V 2.000 V 2.700 V 0.200 V 0.500 V −0.150 V Enabled Available (1)
S-8205BAR-TCT1U 4.250 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Available (1)
S-8205BAS-TCT1U 4.250 V 4.100 V 2.500 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled Available (2)
S-8205BAT-TCT1U 4.200 V 4.100 V 2.800 V 3.200 V 0.100 V 0.500 V −0.100 V Enabled Available (2)
S-8205BAU-TCT1U 4.250 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Available (2)
S-8205BAV-TCT1U 4.225 V 3.975 V 2.400 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BAW-TCT1U 4.280 V 4.080 V 2.800 V 3.000 V 0.200 V 0.600 V −0.100 V Enabled Available (2)
S-8205BAX-TCT1U 4.225 V 3.975 V 2.500 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BAY-TCT1U 4.225 V 3.975 V 2.700 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BAZ-TCT1U 4.225 V 3.975 V 3.000 V 3.200 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BBA-TCT1U 4.175 V 4.025 V 2.750 V 3.050 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BBB-TCT1U 4.225 V 4.025 V 2.500 V 2.500 V 0.050 V 0.500 V −0.050 V Enabled Available (2)
S-8205BBC-TCT1U 4.225 V 3.975 V 2.800 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BBD-TCT1U 4.225 V 3.975 V 2.850 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
S-8205BBE-TCT1U 4.225 V 3.975 V 2.900 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2)
*1. The delay time is set by the external capacitor.
But the discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) are
calculated by discharge overcurrent detection delay time (tDIOV) and charge overcurrent detection delay time (tCIOV) as
the following equations. 1 [ms] (typ.) is the internal delay time of the S-8205B Series.

(1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.)

(2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.)

Moreover, refer to "7. Delay Time Setting" in " Operation" for calculational methods of delay times.

Remark Please contact our sales representatives for products other than the above.

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Pin Configuration

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

Figure 3

Table 4

Pin No. Symbol Description

1 VM Pin for voltage detection between VSS pin and VM pin
FET gate connection pin for charge control (Pch open-drain output)
2 CO
Pin for voltage detection between VSS pin and CO pin
3 DO FET gate connection pin for discharge control FET (CMOS output)
4 VINI Pin for voltage detection between VSS pin and VINI pin
5 CTLC Control pin for charge FET
6 CTLD Control pin for discharge FET
7 CCT Capacitor connection pin for delay for overcharge detection voltage
8 CDT Capacitor connection pin for delay for overdischarge detection voltage
Capacitor connection pin for delay for discharge overcurrent detection,
9 CIT
charge overcurrent detection
Input pin for negative power supply,
10 VSS
Connection pin for battery 5's negative voltage
Connection pin for battery 4's negative voltage,
11 VC5
Connection pin for battery 5's positive voltage
Connection pin for battery 3's negative voltage,
12 VC4
Connection pin for battery 4's positive voltage
Connection pin for battery 2's negative voltage,
13 VC3
Connection pin for battery 3's positive voltage
Connection pin for battery 1's negative voltage,
14 VC2
Connection pin for battery 2's positive voltage
15 VC1 Connection pin for battery 1's positive voltage
Input pin for positive power supply,
16 VDD
Connection pin for battery 1's positive voltage

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Absolute Maximum Ratings

Table 5
(Ta = +25°C unless otherwise specified)
Item Symbol Applied Pin Absolute Maximum Rating Unit
Input voltage between VDD pin and
VDS VDD VSS − 0.3 to VSS + 28 V
VSS pin
VC1, VC2, VC3, VC4, VC5,
Input pin voltage 1 VIN1 VSS − 0.3 to VDD + 0.3 V
CTLC, CTLD, CCT, CDT, CIT
Input pin voltage 2 VIN2 VM, VINI VDD − 28 to VDD + 0.3 V
DO pin output voltage VDO DO VSS − 0.3 to VDD + 0.3 V
CO pin input and output voltage VCO CO VDD − 28 to VDD + 0.3 V
Power dissipation PD − 1100*1 mW
Operation ambient temperature Topr − −40 to +85 °C
Storage temperature Tstg − −40 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name: JEDEC STANDARD51-7

Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.

1200
Power Dissipation (PD) [mW]

1000

800

600

400

200

0
0 50 100 150
Ambient Temperature (Ta) [°C]

Figure 4 Power Dissipation of Package (When Mounted on Board)

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Electrical Characteristics

Table 6 (1 / 2)
(Ta = +25°C unless otherwise specified)
Test
Item Symbol Condition Min. Typ. Max. Unit
Circuit
Detection Voltage
Overcharge detection voltage n VCU VCU
VCUn V1 = V2 = V3 = V4 = V5*1 = VCU − 0.050 V VCU V 2
(n = 1, 2, 3, 4, 5) − 0.025 + 0.025
Overcharge release voltage n VCL VCL
VCLn − VCL V 2
(n = 1, 2, 3, 4, 5) − 0.050 + 0.050
Overdischarge detection voltage n VDL VDL
VDLn − VDL V 2
(n = 1, 2, 3, 4, 5) − 0.080 + 0.080
Overdischarge release voltage n VDU VDU
VDUn − VDU V 2
(n = 1, 2, 3, 4, 5) − 0.100 + 0.100
Discharge overcurrent detection VDIOV VDIOV
VDIOV − VDIOV V 2
voltage − 0.015 + 0.015
VSHORT VSHORT
Load short circuit detection voltage VSHORT − VSHORT V 2
− 0.100 + 0.100
Charge overcurrent detection VCIOV VCIOV
VCIOV − VCIOV V 2
voltage − 0.030 + 0.030
Temperature coefficient 1*2 TCOE1 Ta = 0°C to 50°C*4 −1.0 0 1.0 mV/°C −
Temperature coefficient 2*3 TCOE2 Ta = 0°C to 50°C*4 −0.5 0 0.5 mV/°C −
Delay Time Function*5
V1 = 4.5 V,
CCT pin internal resistance RCCT 6.15 8.31 10.2 MΩ 3
V2 = V3 = V4 = V5*1 = 3.5 V
V1 = 1.5 V,
CDT pin internal resistance RCDT 615 831 1020 kΩ 3
V2 = V3 = V4 = V5*1 = 3.5 V
CIT pin internal resistance RCIT − 123 166 204 kΩ 3
V1 = 4.5 V, VDS VDS VDS
CCT pin detection voltage VCCT V 3
V2 = V3 = V4 = V5*1 = 3.5 V × 0.68 × 0.70 × 0.72
V1 = 1.5 V, VDS VDS VDS
CDT pin detection voltage VCDT V 3
V2 = V3 = V4 = V5*1 = 3.5 V × 0.68 × 0.70 × 0.72
VDS VDS VDS
CIT pin detection voltage VCIT V6 = VDIOV + 0.015 V V 3
× 0.68 × 0.70 × 0.72
Load short circuit detection
tSHORT − 100 300 600 μs 2
delay time
CTLC pin response time tCTLC − − − 2.5 ms 2
CTLD pin response time tCTLD − − − 2.5 ms 2
0 V Battery Charge
0 V battery charge starting charger 0 V battery charge enabled
V0CHA − 0.8 1.5 V 4
voltage V1 = V2 = V3 = V4 = V5*1 = 0 V
0 V battery charge inhibition battery
V0INH 0 V battery charge inhibited 0.4 0.7 1.1 V 2
voltage
Internal Resistance
CTLC pin internal resistance RCTLC − 7 10 13 MΩ 5
CTLD pin internal resistance RCTLD − 7 10 13 MΩ 5
Resistance between
RVMD V1 = V2 = V3 = V4 = V5*1 = 1.8 V 450 900 1800 kΩ 5
VM pin and VDD pin *6
Resistance between
RVMS − 250 500 750 kΩ 5
VM pin and VSS pin

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

Table 6 (2 / 2)
(Ta = +25°C unless otherwise specified)
Test
Item Symbol Condition Min. Typ. Max. Unit
Circuit
Input Voltage
Operation voltage between Fixed output voltage of
VDSOP 2 − 24 V −
VDD pin and VSS pin *7 DO pin and CO pin
CTLC pin change voltage*7 VCTLC − 2.1 3.0 4.0 V 2
CTLD pin change voltage*7 VCTLD − 2.1 3.0 4.0 V 2
Input Current
Current consumption during
IOPE − − 20 40 μA 1
operation
Current consumption during
IPDN V1 = V2 = V3 = V4 = V5*1 = 1.5 V − − 0.1 μA 1
power-down*6
VC1 pin current IVC1 − 0 1.5 3.0 μA 5
VC2 pin current IVC2 − −1.0 0 1.0 μA 5
VC3 pin current IVC3 − −1.0 0 1.0 μA 5
VC4 pin current IVC4 − −1.0 0 1.0 μA 5
S-8205A Series −3.0 −1.5 0 μA 5
VC5 pin current IVC5
S-8205B Series −1.0 0 1.0 μA 5
Output Current
CO pin source current ICOH V13 = 0.5 V 10 − − μA 5
S-8205A Series
V1 = V2 = V3 = V4 = 6 V
CO pin leakage current ICOL − − 0.1 μA 5
S-8205B Series
V1 = V2 = V3 = V4 = V5 = 4.8 V
DO pin source current IDOH V14 = 0.5 V 10 − − μA 5
DO pin sink current IDOL V15 = 0.5 V − − −10 μA 5
*1. Because S-8205A Series are the protection ICs for 4-series cell, there is no V5 for them.
*2. Voltage temperature coefficient 1: Overcharge detection voltage
*3. Voltage temperature coefficient 2: Discharge overcurrent detection voltage
*4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
*5. Refer to " Operation" for details of delay time function.
*6. For products with power-down function
*7. The S-8205A/B Series does not operate detection if the operation voltage between VDD pin and VSS pin (VDSOP) is CTLC
pin change voltage (VCTLC) or CTLD pin change voltage (VCTLD) or less.

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Test Circuit
1. Current Consumption during Operation and Power-down (Test Circuit 1)
Set S1 and S2 to OFF.

1. 1 Current Consumption during Operation (IOPE)

Set V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), S2 to ON.
ISS is the current consumption during operation (IOPE) at that time.

1. 2 Current Consumption during Power-down (IPDN) (With power-down function)

Set V1 = V2 = V3 = V4 = 1.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 1.5 V (S-8205B Series), S1 to ON.
ISS is the current consumption during power-down (IPDN) at that time.

2. Overcharge Detection Voltage, Overcharge Release Voltage, Overdischarge Detection Voltage,

Overdischarge Release Voltage, Discharge Overcurrent Detection Voltage, Load Short Circuit
Detection Voltage, Charge Overcurrent Detection Voltage, CTLC Pin Change Voltage, CTLD Pin
Change Voltage, Load Short Circuit Detection Delay Time, CTLC Pin Response Time, CTLD Pin
Response Time (Test Circuit 2)
Set S3 to OFF.
Confirm both VCO and VDO are in "H" (its voltage level is VDS × 0.9 V or more) after setting V1 = V2 = V3 = V4 = 3.5 V
(S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), V6 = V7 = V8 = 0 V (this status is referred to
as initial status 1).

2. 1 Overcharge Detection Voltage (VCU1), Overcharge Release Voltage (VCL1)

The overcharge detection voltage (VCU1) is V1 when the VCO is set to "L" (its voltage level is VDS × 0.1 V or less)
after increasing V1 gradually after setting V1 = V2 = V3 = V4 = VCU − 0.05 V (S-8205A Series), V1 = V2 = V3 = V4
= V5 = VCU − 0.05 V (S-8205B Series) from the initial status 1. After that, decreasing V1 gradually, V1 is the
overcharge release voltage (VCL1) when the VCO is set to "H" after setting V2 = V3 = V4 = 3.5 V (S-8205A Series),
V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series).

2. 2 Overdischarge Detection Voltage (VDL1), Overdischarge Release Voltage (VDU1)

The overdischarge detection voltage (VDL1) is V1 when the VDO is set to "L" after decreasing V1 gradually from the
initial status 1. After that, increasing V1 gradually, V1 is the overdischarge release voltage (VDU1) when VDO is set
to "H".

By changing Vn (n = 2 to 4: S-8205A Series, n = 2 to 5: S-8205B Series), users can define the overcharge
detection voltage (VCUn), the overcharge release voltage (VCLn), the overdischarge detection voltage (VDLn), the
overdischarge release voltage (VDUn) as well when n = 1.

2. 3 Discharge Overcurrent Detection Voltage (VDIOV)

The discharge overcurrent detection voltage (VDIOV) is V6 when VDO is set to "L" after increasing V6 gradually from
the initial status 1.

2. 4 Load Short Circuit Detection Voltage (VSHORT)

The load short circuit detection voltage (VSHORT) is V6 when VDO is set to "L" after increasing V6 gradually after
setting S3 to ON from the initial status 1.

2. 5 Charge Overcurrent Detection Voltage (VCIOV)

The charge overcurrent detection voltage (VCIOV) is V6 when VCO is set to "L" after decreasing V6 gradually from
the initial status 1.

2. 6 CTLC Pin Change Voltage (VCTLC)

The CTLC pin change voltage (VCTLC) is V7 when VCO is set to "L" after increasing V7 gradually from the initial
status 1.

2. 7 CTLD Pin Change Voltage (VCTLD)

The CTLD pin change voltage (VCTLD) is V8 when VDO is set to "L" after increasing V8 gradually from the initial
status 1.

11
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

2. 8 Load Short Circuit Detection Delay Time (tSHORT)

Load short circuit detection delay time (tSHORT) is a period in which VDO changes to "L" after changing V6 to 1.5 V
instantaneously, after setting S3 to ON from the initial status 1.

2. 9 CTLC Pin Response Time (tCTLC)

CTLC pin response time (tCTLC) is a period in which VCO changes to "L" after changing V7 = VDS instantaneously
from the initial status 1.

2. 10 CTLD Pin Response Time (tCTLD)

CTLD pin response time (tCTLD) is a period in which VDO changes to "L" after changing V8 = VDS instantaneously
from the initial status 1.

3. CCT Pin Internal Resistance, CDT Pin Internal Resistance, CIT Pin Internal Resistance, CCT Pin
Detection Voltage, CDT Pin Detection Voltage, CIT Pin Detection Voltage (Test Circuit 3)
Confirm both VCO and VDO are in "H" after setting V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 =
V5 = 3.5 V (S-8205B Series), V6 = V9 = V10 = V11 = 0 V (this status is referred to as initial status 2).

3. 1 CCT Pin Internal Resistance (RCCT)

The CCT pin internal resistance (RCCT) can be defined by RCCT = VDS / ICCT by using ICCT when setting V1 = 4.5 V
from the initial status 2.

3. 2 CDT Pin Internal Resistance (RCDT)

The CDT pin internal resistance (RCDT) can be defined by RCDT = VDS / ICDT by using ICDT when setting V1 = 1.5 V
from the initial status 2.

3. 3 CIT Pin Internal Resistance (RCIT)

The CIT pin internal resistance (RCIT) can be defined by RCIT = VDS / ICIT by using ICIT when setting V6 = VDIOV +
0.015 V from the initial status 2.

3. 4 CCT Pin Detection Voltage (VCCT)

The CCT pin detection voltage (VCCT) is V9 when VCO is set to "L" after increasing V9 gradually, after setting V1 =
4.5 V from the initial status 2.

3. 5 CDT Pin Detection Voltage (VCDT)

The CDT pin detection voltage (VCDT) is V10 when VDO is set to "L" after increasing V10 gradually, after setting V1
= 1.5 V from the initial status 2.

3. 6 CIT Pin Detection Voltage (VCIT)

The CIT pin detection voltage (VCIT) is V11 when VDO is set to "L" after increasing V11 gradually, after setting V6 =
VDIOV + 0.015 V from the initial status 2.

12
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

4. 0 V Battery Charge Starting Charger Voltage (0 V Battery Charge Enabled) (Test Circuit 4),
0 V Battery Charge Inhibition Battery Voltage (0 V Battery Charge Inhibited) (Test Circuit 2)
4. 1 0 V Battery Charge Starting Charger Voltage (V0CHA) (0 V Battery Charge Enabled)
The 0 V battery charge starting charger voltage (V0CHA) is V12 when VCO is 0.1 V or more after increasing V12
gradually after setting V1 = V2 = V3 = V4 = 0 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 0 V (S-8205B
Series).

4. 2 0 V Battery Charge Inhibition Battery Voltage (V0INH) (0 V Battery Charge Inhibited)

The 0 V battery charge inhibition battery voltage (V0INH) is V1 when VCO is set to "L" after decreasing V1
gradually from the initial status 1.

5. CTLC Pin Internal Resistance, CTLD Pin Internal Resistance, Resistance between VM Pin and
VDD Pin, Resistance between VM Pin and VSS Pin, VC1 Pin Current, VC2 Pin Current, VC3 Pin
Current, VC4 Pin Current, VC5 Pin Current, CO Pin Source Current, CO Pin Leakage Current,
DO Pin Source Current, DO Pin Sink Current (Test Circuit 5)
Set S1, S5, S6 and S7 to OFF, set S2 and S4 to ON.
Set V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), V6 = V13 =
V14 = V15 = V16 = 0 V (this status is referred to as initial status 3).

5. 1 CTLC Pin Internal Resistance (RCTLC)

In the initial status 3, the value of CTLC pin internal resistance (RCTLC) can be defined by RCTLC = VDS / ICTLC by
using ICTLC.

5. 2 CTLD Pin Internal Resistance (RCTLD)

In the initial status 3, the value of CTLD pin internal resistance (RCTLD) can be defined by RCTLD = VDS / ICTLD by
using ICTLD.

5. 3 Resistance between VM Pin and VDD Pin (RVMD) (With power-down function)
The value of resistance between VM pin and VDD pin (RVMD) can be defined by RVMD = VDS / IVM by using IVM
when setting V1 = V2 = V3 = V4 = 1.8 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 1.8 V (S-8205B Series)
from the initial status 3.

5. 4 Resistance between VM Pin and VSS Pin (RVMS)

The value of resistance between VM pin and VSS pin (RVMS) can be defined by RVMS = VDS / IVM by using IVM
when setting V6 = 1.5 V, S2 to OFF, S1 to ON from the initial status 3.

5. 5 VC1 Pin Current (IVC1), VC2 Pin Current (IVC2), VC3 Pin Current (IVC3), VC4 Pin Current (IVC4),
VC5 Pin Current (IVC5)
In the initial status 3, I1 is the VC1 pin current (IVC1), I2 is the VC2 pin current (IVC2), I3 is the VC3 pin current (IVC3),
I4 is the VC4 pin current (IVC4), I5 is the VC5 pin current (IVC5).

5. 6 CO Pin Source Current (ICOH), CO Pin Leakage Current (ICOL)

The CO pin source current (ICOH) is ICO when setting V13 = 0.5 V from the initial status 3. After that, the CO pin
leakage current (ICOL) is ICO when setting V1 = V2 = V3 = V4 = 6 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 =
4.8 V (S-8205B Series), S4 to OFF, S5 to ON.

5. 7 DO Pin Source Current (IDOH), DO Pin Sink Current (IDOL)

The DO pin source current (IDOH) is IDO when setting V14 = 0.5 V, S6 to ON from the initial status 3. After that, the
DO pin sink current (IDOL) is IDO when setting V1 = V2 = V3 = V4 = 1.8 V (S-8205A Series), V1 = V2 = V3 = V4 =
V5 = 1.8 V (S-8205B Series), S6 to OFF, S7 to ON, V15 = 0.5 V.

13
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

S-8205A S-8205B
S1 S1
1 VM VDD 16 1 VM VDD 16
S2 2 CO VC1 15 S2 2 CO VC1 15
V1 V1
3 DO VC2 14 3 DO VC2 14
V2 V2
4 VINI VC3 13 4 VINI VC3 13
V3 V3
5 CTLC VC4 12 5 CTLC VC4 12
V4 V4
6 CTLD VC5 11 6 CTLD VC5 11
V5
7 CCT VSS 10 A 7 CCT VSS 10 A
8 CDT CIT 9 ISS 8 CDT CIT 9 ISS

C1 = C1 =
0.1 μF 0.1 μF

Figure 5 Test Circuit 1

S-8205A S-8205B
1 VM VDD 16 1 VM VDD 16
2 CO VC1 15 2 CO VC1 15
R1 = 1 MΩ V1 R1 = 1 MΩ V1
3 DO VC2 14 3 DO VC2 14
V2 V2
4 VINI VC3 13 4 VINI VC3 13
VCO V3 VCO V3
V 5 CTLC VC4 12 V 5 CTLC VC4 12
V4 V4
VDO 6 CTLD VC5 11 VDO 6 CTLD VC5 11
V5
V 7 CCT VSS 10 V 7 CCT VSS 10
V6 V6
8 CDT CIT 9 8 CDT CIT 9
V7 V7
V8 S3 C1 = V8 S3 C1 =
0.1 μF 0.1 μF

Figure 6 Test Circuit 2

S-8205A S-8205B
1 VM VDD 16 1 VM VDD 16
2 CO VC1 15 2 CO VC1 15
R1 = 1 MΩ V1 R1 = 1 MΩ V1
3 DO VC2 14 3 DO VC2 14
VCO V2 VCO V2
V 4 VINI VC3 13 V 4 VINI VC3 13
V3 V3
5 CTLC VC4 12 5 CTLC VC4 12
V4 V4
6 CTLD VC5 11 6 CTLD VC5 11
V V V5
7 CCT VSS 10 7 CCT VSS 10
VDO ICCT VDO ICCT
A 8 CDT CIT 9 A 8 CDT CIT 9
V6 A A V6 A A
V9 ICDT ICIT C1 = V9 ICDT ICIT C1 =
V10 V11 0.1 μF V10 V11 0.1 μF

Figure 7 Test Circuit 3

14
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

V12 S-8205A V12 S-8205B

1 VM VDD 16 1 VM VDD 16
VCO V VCO V
2 CO VC1 15 2 CO VC1 15
R1 = 1 MΩ V1 R1 = 1 MΩ V1
3 DO VC2 14 3 DO VC2 14
V2 V2
4 VINI VC3 13 4 VINI VC3 13
V3 V3
5 CTLC VC4 12 5 CTLC VC4 12
V4 V4
6 CTLD VC5 11 6 CTLD VC5 11
V5
7 CCT VSS 10 7 CCT VSS 10
8 CDT CIT 9 8 CDT CIT 9

C1 = C1 =
0.1 μF 0.1 μF

Figure 8 Test Circuit 4

S1 S4 S6 S1 S4 S6

V13 V14 S-8205A V13 V14 S-8205B

IVM IVM
A 1 VM VDD 16 A 1 VM VDD 16
ICO I1 ICO I1
A 2 CO VC1 15 A A 2 CO VC1 15 A
IDO I2 V1 IDO I2 V1
A 3 DO VC2 14 A A 3 DO VC2 14 A
V15 I3 V2 V15 I3 V2
4 VINI VC3 13 A 4 VINI VC3 13 A
ICTLC I4 V3 ICTLC I4 V3
A 5 CTLC VC4 12 A A 5 CTLC VC4 12 A
V6 I5 V4 V6 I5 V4
S2 A 6 CTLD VC5 11 A S2 A 6 CTLD VC5 11 A
S5 S5 V5
ICTLD 7 CCT VSS 10 ICTLD 7 CCT VSS 10
S7 8 CDT CIT 9 S7 8 CDT CIT 9
C1 = C1 =
0.1 μF 0.1 μF

Figure 9 Test Circuit 5

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Operation

Remark Refer to " Connection Examples of Battery Protection IC".

1. Normal Status
In the S-8205A/B Series, both of CO pin and DO pin get the VDD level when the voltage of each of the batteries is in
the range of overdischarge detection voltage (VDLn) to overcharge detection voltage (VCUn), and due to the discharge
current, the VINI pin's voltage is in the range of charge overcurrent detection voltage (VCIOV) to discharge overcurrent
detection voltage (VDIOV). This is the normal status. At this time, the charge and discharge FETs are on.

2. Overcharge Status
In the S-8205A/B Series, the voltage of one of the batteries increases to the level of more than VCUn, the CO pin is set
in high impedance. This is the overcharge status. The CO pin is pulled down to EB− by an external resistor so that
the charge FET is turned off and it stops charging.

The overcharge status is released if either condition mentioned below is satisfied;

(1) In case that the CO pin voltage is 1 / 50 × VDS or less, and the voltage of each of the batteries which are VCUn
or more is in the level of overcharge release voltage (VCLn) or less.
(2) In case that the CO pin voltage is 1 / 50 × VDS or more, and the voltage of each of the batteries is in the level
of VCUn or less.

3. Overdischarge Status
In the S-8205A/B Series, when the voltage of one of the batteries decreases to the level of VDLn or less, the DO pin
voltage gets the VSS level. This is the overdischarge status. The discharge FET is turned off and it stops discharging.

The overdischarge status is released if either condition mentioned below is satisfied;

(1) In case that the VM pin voltage is in the level of less than VSS, and the voltage of each of the batteries is in the
level of VDLn or more.
(2) In case that the VM pin voltage is VDS / 5 (typ.) or less and the VM pin voltage is in the level of more than VSS,
and the voltage of each of the batteries which are VDLn or less is in the level of overdischarge release voltage
(VDUn) or more.

3. 1 With power-down function

In the S-8205A/B Series, when it reaches the overdischarge status, the VM pin is pulled up to the VDD level by a
resistor between VM pin and VDD pin (RVMD). If the VM pin voltage and the CO pin voltage increase to the level of
VDS / 5 (typ.) or more, respectively, the power-down function starts to operate and almost every circuit in the
S-8205A/B Series stops working.

The power-down function is released if either condition mentioned below is satisfied;

(1) The VM pin voltage gets VDS / 5 (typ.) or less.
(2) The CO pin voltage gets VDS / 5 (typ.) or less.

4. Discharge Overcurrent Status

The discharging current increases to a certain value or more. As a result, if the status in which the VINI pin voltage
increases to the level of VDIOV or more, the DO pin gets the VSS level. This is the discharge overcurrent status. The
discharge control FET is turned off and it stops discharging. In the status of discharge overcurrent, the CO pin is set
in high impedance. The VM pin is pulled down to the VSS level by a resistor between VM pin and VSS pin (RVMS).

S-8205A/B Series has two levels for discharge overcurrent detection (VDIOV, VSHORT).
The S-8205A/B Series' actions against load short circuit detection voltage (VSHORT) are as well in VDIOV.

The discharge overcurrent status is released if the following condition is satisfied.

(1) The VM pin voltage gets VDS / 10 (typ.) or less.

16
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

5. Charge Overcurrent Status

In the S-8205A/B Series, the charge current increases to a certain value or more. As a result, if the status in which
the VINI pin voltage decreases to the level of VCIOV or less, the CO pin is set in high impedance. This is the charge
overcurrent status. The charge control FET is turned off and it stops charging. In this charge overcurrent status, DO
pin gets the VSS level. The VM pin is pulled up to the VDD level by resistance between VM pin and VDD pin (RVMD).
The charge overcurrent status is released if the following condition is satisfied.
(1) The CO pin voltage gets 1 / 50 × VDS (typ.) or more.

6. 0 V Battery Charge
In the S-8205A/B Series, regarding how to charge a discharged battery (0 V battery), users are able to select either
function mentioned below.
(1) Enable to charge a 0 V battery
A 0 V battery is charged when charger voltage is more than 0 V battery charge starting charger voltage
(V0CHA).
(2) Inhibit charging a 0 V battery
A 0 V battery is not charged when the voltage of one of the batteries is 0 V battery charge inhibition battery
voltage (V0INH) or less.

Caution When the VDD pin voltage is less than the minimum value of operation voltage between VDD pin
and VSS pin (VDSOP), the S-8205A/B Series' action is not assured.

7. Delay Time Setting

In the S-8205A/B Series, users are able to set delay time for the period; from detecting the voltage of one of the
batteries or detecting changes in the voltage at the VINI pin, to the output to the CO pin, DO pin. Each delay time is
determined by a resistor in the IC and an external capacitor.
In the overchage detection, when the voltage of one of the batteries gets VCUn or more, the S-8205A/B Series starts
charging to the CCT pin's capacitor (CCCT) via the CCT pin's internal resistor (RCCT). After a certain period, the CO pin
is set in high impedance if the voltage at the CCT pin reaches the CCT pin detection voltage (VCCT). This period is
overcharge detection delay time (tCU).
tCU is calculated using the following equation (VDS = V1 + V2 + V3 + V4 + V5).
tCU [s] = −ln ( 1 − VCCT / VDS ) × CCCT [μF] × RCCT [MΩ]
= −ln ( 1 − 0.7 (typ.)) × CCCT [μF] × 8.31 [MΩ] (typ.)
= 10.0 [MΩ] (typ.) × CCCT [μF]

Overdischarge detection delay time (tDL), discharge overcurrent detection delay time (tDIOV), charge overcurrent
detection delay time (tCIOV) are calculated using the following equations as well.
tDL [ms] = −ln ( 1 − VCDT / VDS) × CCDT [μF] × RCDT [kΩ]
tDIOV [ms] = −ln ( 1 − VCIT / VDS) × CCIT [μF] × RCIT [kΩ]
tCIOV [ms] = −ln ( 1 − VCIT / VDS) × CCIT [μF] × RCIT [kΩ]

In case CCCT = CCDT = CCIT = 0.1 [μF], each delay time tCU, tDL, tDIOV, tCIOV is calculated as follows.
tCU [s] = 10.0 [MΩ] (typ.) × 0.1 [μF] = 1.0 [s] (typ.)
tDL [ms] = 1000 [kΩ] (typ.) × 0.1 [μF] = 100 [ms] (typ.)
tDIOV [ms] = 200 [kΩ] (typ.) × 0.1 [μF] = 20 [ms] (typ.)
tCIOV [ms] = 200 [kΩ] (typ.) × 0.1 [μF] = 20 [ms] (typ.)
Discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) can be selected
from two types, and they are calculated by tDIOV and tCIOV as the following equations. 1 [ms] (typ.) is the internal delay
time of the S-8205A/B Series.
(1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.)
(2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.)

Load short circuit detection delay time (tSHORT) is fixed internally.

17
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

8. CTLC Pin and CTLD Pin

The S-8205A/B Series has two pins to control.
The CTLC pin controls the CO pin, the CTLD pin controls the DO pin. Thus it is possible for users to control the CO
pin and DO pin independently. These controls precede the battery protection circuit.

Table 7 Conditions Set by CTLC Pin

CTLC Pin CO Pin

CTLC pin voltage ≥ VCTLC High-Z
Open*1 High-Z
CTLC pin voltage < VCTLC Normal status*2
*1. Pulled up by RCTLC when CTLC pin is open.
*2. The status is controlled by the voltage detection circuit.

Table 8 Conditions Set by CTLD Pin

CTLD Pin DO Pin

CTLD pin voltage ≥ VCTLD VSS level
Open*1 VSS level
CTLD pin voltage < VCTLD Normal status*2
*1. Pulled up by RCTLD when CTLD pin is open.
*2. The status is controlled by the voltage detection circuit.

18
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Timing Chart

1. Overcharge Detection and Overdischarge Detection

VCUn
VCLn
Battery voltage
VDUn
VDLn
(n= 1 to 5)

VDD

DO pin voltage

VSS

VDD

CO pin voltage High-Z

VEB-

VDD

VM pin voltage 1 / 5 × VDD

VSS
VEB-

Charger connection
Load connection
Overcharge detection Overdischarge detection
delay time (tCU) delay time (tDL)
*1
Status
(With power-down function) <1> <2> <1> <3> <4> <1>

*1
Status
<1> <2> <1> <3> <1>
(Without power-down function)

*1. <1>: Normal status

<2>: Overcharge status
<3>: Overdischarge status
<4>: Power-down status

Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger.

Figure 10

19
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

2. Discharge Overcurrent Detection

VHC
VCUn
VCLn
Battery voltage
VDUn
VDLn
(n = 1 to 5) VHD

VDD

DO pin voltage

VSS

VDD

CO pin voltage High-Z High-Z

VEB-

VDD

VM pin voltage

VSS

VDD
VSHORT
VINI pin voltage
VDIOV
VSS

Load connection
Discharge overcurrent detection delay Load short circuit detection delay
time (tDIOV) time (tSHORT)

*1 <1> <2> <1> <2> <1>

Status

*1. <1>: Normal status

<2>: Discharge overcurrent status

Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger.

Figure 11

20
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

3. Charge Overcurrent Detection

VHC
VCUn
VCLn
Battery voltage VHD
VDUn
VDLn
(n= 1 to 5)

VDD

DO pin voltage

VSS

VDD

CO pin voltage High-Z High-Z

VEB-

VDD

VM pin voltage
VSS
VEB-

VDD
VINI pin voltage
VDIOV
VSS
VCIOV

Charger connection

Load connection
Charge overcurrent detection delay Charge overcurrent detection delay
time (tCIOV) time (tCIOV)
*1
Status
(With power-down function) <4> <3> <1> <2> <1> <2> <1>

*1
Status <3> <1> <2> <1> <2> <1>
(Without power-down function)

*1. <1>: Normal status

<2>: Charge overcurrent status
<3>: Overdischarge status
<4>: Power-down status

Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger.

Figure 12

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Connection Examples of Battery Protection IC

1. S-8205A Series (4-Series Cell)

EB+ RVDD
1 VM VDD 16
CVDD RVC1
2 CO VC1 15
CVC1 RVC2
3 DO VC2 14
CVC2 RVC3
4 VINI VC3 13
RVM RDO RVINI S-8205A CVC3 RVC4
5 CTLC VC4 12
RCTLC CVC4 RVC5
6 CTLD VC5 11
RCTLD
7 CCT VSS 10
CCCT
8 CDT CIT 9
CCDT CCIT

RCO
EB− RSENSE

Charging Discharging
FET FET
Figure 13

2. S-8205B Series (5-Series Cell)

EB+ RVDD
1 VM VDD 16
CVDD RVC1
2 CO VC1 15
CVC1 RVC2
3 DO VC2 14
CVC2 RVC3
4 VINI VC3 13
RVM RDO RVINI S-8205B CVC3 RVC4
5 CTLC VC4 12
RCTLC CVC4 RVC5
6 CTLD VC5 11
RCTLD CVC5
7 CCT VSS 10
CCCT
8 CDT CIT 9
CCDT CCIT

RCO
EB− RSENSE

Charging Discharging
FET FET
Figure 14

22
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Application Circuit

EB+ RVDD
1 VM VDD 16
CVDD RVC1
2 CO VC1 15
CVC1 RVC2
3 DO VC2 14
CVC2 RVC3
4 VINI VC3 13
RVM RDO RVINI PTCCTLC S-8205B CVC3 RVC4
5 CTLC VC4 12
CVC4 RVC5
6 CTLD VC5 11
PTCCTLD CVC5
7 CCT VSS 10
CCCT
8 CDT CIT 9
CCDT CCIT

RCO
EB− RSENSE

Charging Discharging
FET FET
Figure 15 Overheat Protection via PTC

[For PTC, contact]

Murata Manufacturing Co., Ltd.
Thermistor Products Department
Nagaokakyo-shi, Kyoto 617-8555 Japan
TEL +81-75-955-6863
Contact Us: http://www.murata.com/contact/index.html

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 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

Table 9 Constants for External Components

Symbol Min. Typ. Max. Unit

RVC1*1 0.47 1 1 kΩ
RVC2*1 0.47 1 1 kΩ
RVC3*1 0.47 1 1 kΩ
RVC4*1 0.47 1 1 kΩ
*1 kΩ
RVC5 0.47 1 1
RDO 1 5.1 10 kΩ
RCO 0.1 1 1 MΩ
RVM 3 5.1 10 kΩ
RCTLC 0.1 1 1 kΩ
RCTLD 0.1 1 1 kΩ
RVINI 0.1 1 1 kΩ
RSENSE 0 − − mΩ
RVDD*1 43 100 100 Ω
CVC1*1 0.068 0.1 1 μF
CVC2*1 0.068 0.1 1 μF
CVC3*1 0.068 0.1 1 μF
CVC4*1 0.068 0.1 1 μF
CVC5*1 0.068 0.1 1 μF
CCCT 0.01 0.1 − μF
CCDT 0.01 0.1 − μF
CCIT 0.02 0.1 − μF
CVDD*1 0 1 10 μF
*1. Set up a filter constant to be RVDD × CVDD = 68 μF•Ω or more, and to be RVC1 × CVC1 = RVC2 × CVC2 = RVC3 ×
CVC3 = RVC4 × CVC4 = RVC5 × CVC5 = RVDD × CVDD.

Caution 1. The constants may be changed without notice.

2. It is recommended that filter constants between VDD pin and VSS pin should be set approximately
to 100 μF•Ω.
e.g., CVDD × RVDD = 1.0 μF × 100 Ω = 100 μF•Ω
Sufficient evaluation of transient power supply fluctuation and overcurrent protection function with
the actual application is needed to determine the proper constants.
Contact our sales representatives in case the constants should be set to other than 100 μF•Ω.
3. It has not been confirmed whether the operation is normal or not in circuits other than the
connection examples. In addition, the connection examples and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constants.

24
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

 Precautions

• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Batteries can be connected in any order, however, there may be cases when discharging cannot be performed when
a battery is connected. In this case, short the VM pin and VSS pin or connect the battery charger to return to the
normal mode.
• If both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is
set in overcharge status and overdischarge status. Therefore either charging or discharging is impossible.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.

25
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

 Characteristics (Typical Data)

1. Current Consumption

1. 1 IOPE vs VDS 1. 2 IOPE vs Ta

40 40
35 35
30 30
IOPE [μA]

IOPE [μA]
25 25
20 20
15 15
10 10
5 5
0 0
0 5 10 15 20 25 30 −40 −25 0 25 50 75 85
VDS [V] Ta [°C]
1. 3 IPDN vs VDS 1. 4 IPDN vs Ta
0.10 0.10
0.09 0.09
0.08 0.08
0.07 0.07
IPDN [μA]

IPDN [μA]

0.06 0.06
0.05 0.05
0.04 0.04
0.03 0.03
0.02 0.02
0.01 0.01
0.00 0.00
0 5 10 15 20 25 30 −40 −25 0 25 50 75 85
VDS [V] Ta [°C]

26
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

2. Overcharge Detection / Release Voltage, Overdischarge Detection / Release Voltage, Discharge Overcurrent
Detection Voltage, Load Short Circuit Detection Voltage, Charge Overcurrent Detection Voltage

2. 1 VCU vs Ta 2. 2 VCL vs Ta
4.250 4.175
4.245 4.165
4.240 4.155
4.235 4.145
4.230 4.135
VCU [V]

VCL [V]
4.225 4.125
4.220 4.115
4.215 4.105
4.210 4.095
4.205 4.085
4.200 4.075
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]
2. 3 VDL vs Ta 2. 4 VDU vs Ta
2.380 3.100
2.360 3.080
3.060
2.340 3.040
2.320 3.020
VDL [V]

VDU [V]
2.300 3.000
2.280 2.980
2.960
2.260 2.940
2.240 2.920
2.220 2.900
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]

2. 5 VDIOV vs Ta 2. 6 VSHORT vs Ta
0.165 0.600
0.580
0.160 0.560
0.155 0.540
VSHORT [V]
VDIOV [V]

0.520
0.150 0.500
0.145 0.480
0.460
0.140 0.440
0.420
0.135 0.400
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]

2. 7 VCIOV vs Ta
−0.070
−0.080
−0.090
VCIOV [V]

−0.100
−0.110
−0.120
−0.130
−40 −25 0 25 50 75 85
Ta [°C]

27
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
S-8205A/B Series Rev.2.0_00

3. CCT Pin Internal Resistance / Detection Voltage, CDT Pin Internal Resistance / Detection Voltage,
CIT Pin Internal Resistance / Detection Voltage and Short Circuit Detection Voltage Delay Time

3. 1 RCCT vs Ta 3. 2 VCCT vs Ta (VDS = 18.5 V)

12.0 13.3
11.0 13.2
10.0 13.1
RCCT [M]

VCCT [V]
13.0
9.0
12.9
8.0
12.8
7.0 12.7
6.0 12.6
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]

3. 3 RCDT vs Ta 3. 4 VCDT vs Ta (VDS = 15.5 V)

1200 11.2
1100 11.1
1000 11.0
RCDT [k]

VCDT [V]

10.9
900
10.8
800
10.7
700 10.6
600 10.5
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]

3. 5 RCIT vs Ta 3. 6 VCIT vs Ta (VDS = 17.5 V)

240 12.6
220 12.5
200 12.4
RCIT [k]

VCIT [V]

12.3
180
12.2
160
12.1
140 12.0
120 11.9
−40 −25 0 25 50 75 85 −40 −25 0 25 50 75 85
Ta [°C] Ta [°C]

3. 7 tSHORT vs Ta
600.0
500.0
tSHORT [μs]

400.0
300.0
200.0
100.0
−40 −25 0 25 50 75 85
Ta [°C]

28
 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK
Rev.2.0_00 S-8205A/B Series

4. CO Pin Source / Leakage Current, DO Pin Source / Sink Current

4. 1 ICOH vs VCO 4. 2 ICOL vs VCO

14 0.10
12
0.08
10
ICOH [mA]

ICOL [μA]
8 0.06
6 0.04
4
0.02
2
0 0
0 5 10 15 20 0 5 10 15 20 25 30
VCO [V] VCO [V]
4. 3 IDOH vs VDO 4. 4 IDOL vs VDO

14 0
12 −1
10 −2
IDOH [mA]

IDOL [mA]
8 −3
6 −4
4 −5
2 −6
0 −7
0 5 10 15 20 0 2 4 6 8 10
VDO [V] VDO [V]

29
 5.1±0.2

16 9

1 8 0.17±0.05

0.65 0.22±0.08

No. FT016-A-P-SD-1.2

TITLE TSSOP16-A-PKG Dimensions

No. FT016-A-P-SD-1.2
ANGLE

UNIT mm

ABLIC Inc.
 +0.1 4.0±0.1
ø1.5 -0
2.0±0.1 0.3±0.05

8.0±0.1

1.5±0.1
ø1.6±0.1
(7.2)

4.2±0.2

+0.4
6.5 -0.2

1 16

8 9

Feed direction

No. FT016-A-C-SD-1.1

TITLE TSSOP16-A-Carrier Tape

No. FT016-A-C-SD-1.1
ANGLE

UNIT mm

ABLIC Inc.
 21.4±1.0

17.4±1.0

+2.0
17.4 -1.5

Enlarged drawing in the central part

2±0.5
ø21±0.8
ø13±0.2

No. FT016-A-R-S1-1.0

TITLE TSSOP16-A- Reel

No. FT016-A-R-S1-1.0
ANGLE QTY. 4,000
UNIT mm

ABLIC Inc.
 Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
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life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
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ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
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9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
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The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
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2.4-2019.07

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