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SYIT ES CH 5 & 6 PDF

The document discusses various concepts related to embedded hardware. It describes that memory can reside on the processor chip or externally. Processors use address and data buses to read and write memory locations. Memory maps indicate how memory is laid out, while I/O maps allow communication with input/output devices by mapping memory and registers of I/O devices to address values. Interrupts change normal program execution by signals from external devices or internal units like timers. Interrupt service routines are associated with interrupt pins using an interrupt vector table.

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0% found this document useful (0 votes)
46 views26 pages

SYIT ES CH 5 & 6 PDF

The document discusses various concepts related to embedded hardware. It describes that memory can reside on the processor chip or externally. Processors use address and data buses to read and write memory locations. Memory maps indicate how memory is laid out, while I/O maps allow communication with input/output devices by mapping memory and registers of I/O devices to address values. Interrupts change normal program execution by signals from external devices or internal units like timers. Interrupt service routines are associated with interrupt pins using an interrupt vector table.

Uploaded by

trupti
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 26

EMBEDDED HARDWARE

All the processors store their data and program codes in


memory but in some cases the memory resides on the same
chip as the processor , but most of the memory chips are
located externally.
For reading and writing data at some particular location the
processor first writes the desired address onto the address bus
and then the data using the data bus.
Memory Map-
•A memory map is the structure of the data that indicates
how memory is laid out.
•Memory maps can have different meaning in different parts
of the operating system.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


I/O MAP
• To communicate with input/output devices the concept of I/O map
is used.
• The process of creating the I/O map is similar to memory mapping.
• Memory –mapped I/O uses the same address but to address both
memory and I/O devices.
• The memory and registers of the I/O devices are mapped to
address values.
• When an address is used by the CPU it may refer to a portion of
physical RAM or it can refer to memory of the I/O device.
• Each I/O device monitors the CPU’s address bus and responds to
any of the CPU’s access of address space assigned to that device
connecting the data bus to a desirable device’s hardware register.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


INTERRUPT
• Interrupt is something that produces some kind of
interruption.
• In microprocessor and microcontroller systems an
interrupt is defined as a signal that initiates changes in
normal program execution flow.
• The signal that generates changes in normal program
execution flow may come from an external device
connected to the microprocessor/controller requesting
the system that it needs immediate attention or the
interrupt signal may come from some of the internal
units of the processor/controller such as timer
overflow indication signal.
Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi
WHY INTERRUPTS?
•From programmer point of view interrupt is a boon.
•Interrupts are very useful in situations where you need to
read or write some data from or to an externally connected
device.
•We can write the program in two ways to pool the device.
•In the first method the program pools the device
continuously till the device is ready to send data to the
controller or ready to accept data from the controller.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


INTERRUPT MAP
• The embedded systems have few handful of
interrupts.
• These interrupts are associated with an interrupt pin
and an interrupt service routine (ISR).
• For the execution of correct interrupt service routine
a mapping is required between interrupt pins and
interrupt service routine.
• This mapping usually takes the form of an interrupt
vector table.
• The vector table is just an array of pointers to
functions located at some known memory address.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


PROCESSOR FAMILY
• A set of related processors from the same
manufacturer is called as Processor family.
• The term processor refers to any three type of
devices known as microprocessors, microcontrollers
• and Digital Signal Processors.


DSP –The third type of processor is a digital signal
processor or DSP.
•Two common DSP families are the TMS320CX and
5600X series from TI and Motorola.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


MEMORY
• Memory is an important part of a
processor/controller based E.S.
• Some of the procoessors/controllers contain
built in memory and this memory is reffered
as on-chip memory.
• Others which do not contain any memory
inside the chip requires external memory to
be connected with the controller/processor
called off-chip memory

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


ROM
• The program memory or code storage memory
of an E.S stores the program instructions and it
can be classified into different types
• ROM(Read Only Memorty) –
• It retains its contents even after the power to it
is turned off.
•It is a non-volatile memory.
• Examples of non-volatile memory include read-
only memory, flash memory, most types of
magnetic computer storage devices like hard
disks, floppy discs, etc.
Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi
• Masked ROM (MROM)-
It is a one-time programmable device.
It makes use of the hardwired technology for storing
data.
Advantage –
Low cost for high volume production.
•Masked ROM is a good candidate for storing the
embedded firmware for low cost embedded devices.
• Once the design is proven and the firmware
requirements are tested and frozen the binary
data corresponding to it can be given to the
MROM fabricator.
•Since the MROM is permanent in bit storage it is not
possible to alter the bit information.
Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi
• PROM/OTP (One Time Programmable)
Unlike masked ROM, One Time Programmable
Memory is not pre-programmed by the
manufacturer.

• OTP is widely used for commercial production


of embedded systems whose protyped
versions are proven and the code is finalised.
• It is low cost solution for
commercial production.
•OTPs cannot be reprogrammed.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


EPROM –
This is flexible to re-program the same chip.
Bit information is stored by using an EPROM
programmer which applies high voltage to change
the floating gate.
EPROM contains a quartz crystal window for
erasing the stored information.
If the window is exposed to ultraviolet rays for a
fixed duration the entire memory will be erased.
 Even though the EPROM chip is flexible in terms of
re- programmability it needs to be taken out of the
circuit board and put in a UV eraser device for 20 to
30 minutes.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


EEPROM-
The information contained in the EEPROM can be
altered by using electrical signals at the register/Byte
level.
They can be erased and reprogrammed in-
circuit.
These chips include a chip erase mode and in this
mode they can be erased in a few milliseconds.
 It provides greater flexibility for system
design.
The only limitation is their capacity is limited when
compared with the standard ROM.
Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi
FLASH –
It is the latest ROM technology and is the most popular ROM
technology used in today’s E.S.
It is a variation of EEPROM technology.
Flash memory is organised as sectors or pages.
The erasing of memory can be done at sector level or p age level
without affecting the other sectors or pages.
Each sector/page should be erased before re-programming.
The typical erasable capacity of FLASH is 1000 cycles.

NVRAM –
Non-volatile RAM is a random access memory with battery backup.
It contains static RAM based memory and a minute battery for
providing supply to the memory in the absence of external power
supply.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


RAM
It is the data memory or working memory of the
• controller/processor.
Controller/processor can read from it and write to it.
• It is volatile in nature.
• RAM is direct access memory meaning we can access the
• desired memory location directly without the need for
traversing through the entire memory locations to reach
the desired memory position.
The types of RAM are :
1. Static RAM (SRAM)
2. Dynamic RAM (DRAM)
3. NVRAM

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


SRAM –
 It stores the data in the form of voltage
 They are made up of flip-flops.
It is the fastest form of RAM available
SRAM is fast in operation due to its resistive networking and
switching capabilities.
DRAM –
It stores the data in the form of charge.
They have high density and low cost compared to SRAM.
NVRAM
It is random access memory with battery backup.
It contains static RAM based memory and a minute battery for
providing supply to the memory in the absence of external
power supply.
The life span of NVRAM is expected to be around 10 years.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


MEMORY TESTING
• Testing is a disciplined process that consists of evaluating
• the application behavior, performance and robustness
• against expected criteria.

One of the main criteria is to be defect free.


• The purpose is to confirm that each storage location in a
memory device is working.
Memory test techniques:
Data Bus Test
Address Bus Test
Device Test

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


PERIPHERALS
Control and Status Registers:
An embedded processor interacts with a peripheral
device through a set of Control and Status registers.
The registers are part of peripheral hardware , their
locations, size and individual meaning are features of the
peripheral.
The control and status registers are used in embedded
system as an interface between the peripherals and the
Embedded processor.
The peripherals are located in either processor’s memory
space or within the I/O space.
These are called memory-mapped and I/O mapped
peripherals.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


DEVICE DRIVER
• A device driver is a specific type of computer software
which is developed to allow interaction with hardware
devices.
• A device driver simplifies programming by acting as
translator between a hardware device and the
applications or os that use it.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


DEVICE DRIVER ARCHITECTURE
A device driver performs two main functions:
I.Device configuration and initialization
II.Data movement
Device configuration- It is specific to a particular
device.
Data movement – is generic.
Device Drivers can be classifies as :
1.Class Driver
2.Mini-Driver
Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi
CLASS DRIVERS

• It is a type of hardware device driver that can


operate a large number of different devices of a
broadly similar type.
Mini Driver
• It is responsible for all device-specific
initialization and control and for passing a
buffer of data to the class driver.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


WATCHDOG TIMER
 • Watchdog timer or a watchdog is a hardware timer for monitoring the
firmware execution.
 • Depending on the internal implementation the watchdog timer increments or
decrements a free running counter with each clock pulse and generates a
reset signal to resent the processor if the count reaches zero for a down
counting watchdog or the highest count value for an up counting watchdog.
 If the watchdog counter is in the enabled state, the firmware can write a zero
to it before starting the execution of a piece of code and the watchdog will
start counting.
 If the firmware execution doesn’t complete due to malfunctioning within the
time required by the watchdog to reach the maximum count the counter will
generate a reset pulse and this will reset the processor .
 If the firmware execution completes before the expiration of the watchdog
timer you can reset the count by writing a 0 to the watchdog timer register.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


RESET

WATCHDOG TIMER PROCESSOR

Restart

Clock

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


EMBEDDED OPERATING SYSTEM
• An embedded operating system is an
operating system specially designed to
operate an embedded computer systems.
• The operating system organizes and controls
the hardware and it is that piece of software
that turns the collection of hardware blocks
into a powerful computing tool.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


FUNCTIONS OF O.S
Processor Management
Memory and storage management
Device Management
Providing common Application Interface
Providing Common User Interface

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


Real-time Operating System
•The main task of a RTOS is to manage the
resources of the computer such that a particular
operation executes in the same amount of time
every time it occur.
•In a complex machine having a part move more
quickly.

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi


RTOS
• RTOS is an operating system that supports the construction of real-time systems.
• Real-time computing is where system correctness not only depends on the
correctness of logical result but also on the result delivery time.
The RTOS should have predictable behavior to unpredictable external events.

• A good RTOS is one that has a bounded behavior under all system load
scenario i.e even under simultaneous interrupts and thread execution.
• A true RTOS will be deterministic under all conditions.
• Most of the embedded operating systems today are designed for possible
inclusion in real-0time systems.
• An operating system is said to be deterministic if the worst-case execution
time of each of its system calls is calculable.

Some of the characteristics of embedded system OS are as follows:
1. Large and complex
2. Concurrent control of system components
3. Facilities for hardware control
4. Extremely reliable and safe
5. Real time facilities
6. Efficiency of execution

Prepared By Mrs. Trupti Kulkarni Kaujalgi, ICLES' M J College, Vashi

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