ELECTRONIC DEVICES Course Code SECS CIE Marks -40 Lecture Hours/Week 3 SEE marks : 60 Total Number of Lecture Hours : 40 (8 Hours / Module) Exam Hours : 03 CREDITS — 03 Course Learning Objectives: This course will enable students to: * Understand the basics of semiconductor physics and electronic devices. * Describe the mathematical models BJTs and FETs along with the constructional details. © Understand the construction and working principles of optoelectronic devices . Understand the fabrication process of semiconductor devices and CMOS process integration. Module-1 Semiconductors Bonding forces in solids, Energy bands, Metals, Semiconductors and Insulators, Direct and Indirect semiconductors, Electrons and Holes, Intrinsic and Extrinsic materials, Conductivity and Mobility, Drift and Resistance, Effects of temperature and doping on mobility, Hall Effect. (Text 1: 3.1.1, 3.1.2, 3.1.3, 3.1.4, 3.2.1, 3.2.3, 3.2.4, 3.4.1, 3.4.2, 3.4.3, 3.4.5). L1,L2 Module-2 pn Junctions Forward and Reverse biased junctions- Qualitative description of Current flow at a junction, reverse bias, Reverse bias breakdown- Zener breakdown, avalanche breakdown, Rectifiers. (Text 1: 5.3.1, 5.3.3, 5.4, 5.4.1, 5.4.2, 5.4.3) Optoelectronic Devices Photodiodes: Current and Voltage in an Illuminated Junction, Solar Cells, Photodetectors. Light Emitting Diode: Light Emitting materials. (Text 1: 8.1.1, 8.1.2, 8.1.3, 8.2, 8.2.1), LLL2 Module ~ 3 Bipolar Junction Transistor Fundamentals of BJT operation, Amplification with BJTS, BJT Fabrication, The coupled Diode model (Ebers-Moll Model), Switching operation ofa transistor, Cutoff, saturation, switching cycle, specifications, Drift in the base region, Base narrowing, Avalanche breakdown. (Text 1: 7.1, 7.2, 7.3, 7.5.1, 7-6, 7-Tol, 7.7.2, 7-7-3) LI,L2 48Module-4 Field Effect Transistors Basic pn JFET Operation, Equivalent Circuit and Frequency Limitations, MOSFET- Two terminal MOS structure- Energy band diagram, Ideal Capacitance Voltage Characteristics and Frequency Effects, Basic MOSFET Operation- MOSFET structure, Current-Voltage Characteristics. (Text 2: 9.1.1, 9.4, 9.6.1, 9.6.2, 9.7.1, 9.7.2, 9.8.1, 9.8.2). L1,L2 Module-5 Fabrication of p-n junctions Thermal Oxidation, Diffusion, Rapid Thermal Processing, Ion implantation, chemical vapour deposition, photolithography, Etching, metallization. (Text 1: 5.1) Integrated Circuits Background, Evolution of ICs, CMOS Process Integration, Integration of Other Circuit Elements. (Text 1: 9.1, 9.2, 9.3.1, 9.3.3). L1,L2 Course outcomes: After studying this course, students will be able to: 1. Understand the principles of semiconductor Physics 2. Understand the principles and characteristics of different types of semicon- ductor devices 3. Understand the fabrication process of semiconductor devices 4. Utilize the mathematical models of semiconductor junctions for circuits and systems. 5. Identify the mathematical models of MOS transistors for circuits and systems. Question paper pattern: © Examination will be conducted for 100 marks with question paper containing 10 full questions, each of 20 marks. * Each full question can have a maximum of 4 sub questions. © There will be 2 full questions from each module covering all the topics of the module. © Students will have to answer 5 full questions, selecting one full question from each module. . The total marks will be proportionally reduced to 60 marks as SEE marks is 60. 49Text Books: 1. Ben. G Streetman, Sanjay Kumar Banerjee, “Solid State Electronic Devices”, 7* Edition, Pearson Education, 2016, ISBN 978-93-325-5508-2. 2. Donald A Neamen, Dhrubes Biswas, “Semiconductor Physics and Devices”, 4" Edition, McGraw Hill Education, 2012, ISBN 978-0-07- 107010-2. Reference Book: 1. S.M. Sze, Kwok K. Ng, “Physics of Semiconductor Devices”, 3* Edition, Wiley, 2018. 2. Adir Bar-Ley, “Semiconductor and Electronic Devices”, 3 Edition, PHI, 1993. 50DIGITAL SYSTEM DESIGN Course Code 1 18EC34 CIE Marks : 40 Lecture Hours/Week :_ 03 SEE marks: 60 Total Number of Lecture Hours : 40 (8 Hours / Module) Exam Hours : 03 CREDITS — 03 Course Learning Objectives: This course will enable students to: * Illustrate simplification of Algebraic equations using Karnaugh Maps and Quine-Mc Clusky Techniques. © Design Decoders, Encoders, Digital Multiplexer, Adders, Subtractors and Binary Comparators. Describe Latches and Flip-flops, Registers and Counters. Analyze Mealy and Moore Models. Develop state diagrams Synchronous Sequential Circuits. Appreciate the applications of digital circuits. Module - 1 Principles of combinational logic: Definition of combinational logic, canonical forms, Generation of switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified functions (Don’t care terms) Simplifying Max term equations, Quine-McCluskey techniques — 3 & 4 variables (Text 1 - Chapter 3) L1, L2, L3 Module — 2 Analysis and design of combinational logic: Decoders, Encoders, Digital multiplexers, Adders and subtractors, Look ahead carry, Binary comparators. (Text 1- Chapter 4) Programmable Logic Devices, Complex PLD, FPGA. (Text 3 - Chapter 9, 9.6 to 9.8) L1, L2,L3 Module -3 Flip-Flops and its Applications: Basic Bistable elements, Latches, The master- slave flip-flops (pulse-triggered flip-flops): SR flip-flops, JK flip-flops, Characteristic equations, Registers, binary ripple counters, and synchronous binary counters.(Text 2 - Chapter 6) L1, L2, 13 SlModule -4 Sequential Circuit Design: Design of a synchronous counter, Design of a synchronous mod-n counter using clocked JK, D, T and SR flip-flops. (Text 2 - Chapter 6) Mealy and Moore models, State machine notation, Construction of state diagrams. (Text 1 - Chapter 6) LI, L2,L3 Module -5 Applications of Digital Circuits: Design ofa Sequence Detector, Guidelines for construction of state graphs, Design Example — Code Converter, Design of Iterative Circuits (Comparator), Design of Sequential Circuits using ROMs and PLAs, CPLDs and FPGAs, Serial Adder with Accumulator, Design of Binary Multiplier, Design of Binary Divider. (Text 3 — 14.1, 14.3, 16.2, 16.3, 16.4, 18.1, 18.2, 18.3) LI, L2, L3 Course Outcomes: After studying this course, students will be able to: 1. Explain the concept of combinational and sequential logic circuits. 2. Analyze and Design the combinational logic circuits. 3. Describe and characterize flip-flops and its applications. 4. Design the sequential circuits using SR, JK, D, T flip-flops and Mealy & Moore machines. 5. Design applications of Combinational & Sequential Circuits. Question paper pattern: © Examination will be conducted for 100 marks with question paper containing 10 full questions, each of 20 marks. * Each full question can have a maximum of 4 sub questions. © There will be 2 full questions from each module covering all the topics of the module. © Students will have to answer 5 full questions, selecting one full question from each module. © The total marks will be proportionally reduced to 60 marks as SEE marks is 60. Text Books: 1. John M Yarbrough -Digital Logic Applications and Design, Thomson Learning, 2001. 2. Donald D. Givone —Digital Principles and Design, McGraw Hill, 2002. 3, Charles H Roth Jr., Larry L. Kinney Fundamentals of Logic Design, Cengage Learning, 7 Edition. Reference Books: 1. _D.P. Kothari and J. $ Dhillon, —Digital Circuits and Design, Pearson, 2016. 2. Morris Mano, —Digital Design, Prentice Hall of India, Third Edition. 3. KA. Navas —Electronies Lab Manual, Volume , PE, 5” Edition, 2015.COMPUTER ORGANIZATION AND ARCHITECTURE Tourse Code’ TISEC35 STE Marks : 40 Lecture Hours/Week 203 SEE Marks : 60 Total Number of Lecture Hours : 40 (8 Hours / Module) Exam Hours : 03 CREDITS-— 03 Course Learning Objectives: This course will enable students to: * Explain the basic sub systems of a computer, their organization, structure and operation. * Illustrate the concept of programs as sequences of machine instructions. Demonstrate different ways of communicating with I/O devices Describe memory hierarchy and concept of virtual memory. Illustrate organization of simple pipelined processor and other computing systems. Module 1 Basic Structure of Computers: Computer Types, Functional Units, Basic Operational Concepts, Bus Structures, Software, Performance — Processor Clock, Basic Performance Equation (up to 1.6.2 of Chap 1 of Text). Machine Instructions and Programs: Numbers, Arithmetic Operations and Characters, IEEE standard for Floating point Numbers, Memory Location and Addresses, Memory Operations, Instructions and Instruction Sequencing (up to 2.4.6 of Chap 2 and 6.7.1 of Chap 6 of Text). LI, L2, 13 Module 2 Addressing Modes, Assembly Language, Basic Input and Output Operations, Stacks and Queues, Subroutines, Additional Instructions (from 2.4.7 of Chap2, except 2.9.3, 2.11 & 2.12 of Text). L1, L2, L3 Module 3 Input/Output Organization: Accessing I/O Devices, Interrupts — Interrupt Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, Controlling Device Requests, Direct Memory Access (up to 4.2.4 and 4.4 except 4.4.1 of Chap 4 of Text). L1, L2, L3 Module4 Memory System: Basic Concepts, Semiconductor RAM Memories-Internal organization of memory chips, Static memories, Asynchronous DRAMS, Read Only Memories, Cash Memories, Virtual Memories, Secondary Storage- Magnetic Hard Disks (5.1, 5.2, 5.2.1, 5.2.2, 5.2.3, .5 (except 5.5.1 to 5.5.4), 5.7 (except 5.7.1), 5.9, 5.9.1 of Chap 5 of Text). LI, L2, L3 33