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Assignment 02 Spring 2023 03052023 112729am PDF

This document provides instructions for an assignment to design a finite state machine for a vending machine using Verilog. Students are asked to: 1) Write Verilog code and a test bench to model a vending machine that accepts Rs5 coins and Rs10 notes and dispenses an item that costs Rs20. 2) Draw a state diagram showing the states and transitions of the vending machine, which has states for Rs0, Rs5, Rs10, Rs15, and Rs20. 3) Submit the Verilog code, test bench, waveform of the output, and a hand-drawn state diagram. Late or copied work will not be accepted.

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AHSAN HAMEED
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0% found this document useful (0 votes)
50 views2 pages

Assignment 02 Spring 2023 03052023 112729am PDF

This document provides instructions for an assignment to design a finite state machine for a vending machine using Verilog. Students are asked to: 1) Write Verilog code and a test bench to model a vending machine that accepts Rs5 coins and Rs10 notes and dispenses an item that costs Rs20. 2) Draw a state diagram showing the states and transitions of the vending machine, which has states for Rs0, Rs5, Rs10, Rs15, and Rs20. 3) Submit the Verilog code, test bench, waveform of the output, and a hand-drawn state diagram. Late or copied work will not be accepted.

Uploaded by

AHSAN HAMEED
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

Bahria University, Islamabad

Department of Electrical Engineering


FPGA Based System Design (CEN-441) BEE-6 Spring 2023
Assignment# 02 Instructor: Asim Altaf Shah
Due date: 10 May 2023
• This is an individual assignment.
• Do all work on paper and then implement it on Xilinx ISE software using Verilog
language.
• Copied code will get zero (Do not copy. Even a single copied line reward you zero
marks)
• Submit both (Verilog code with test bench and test bench waveform)
• Late submission will not be entertained and reward you zero marks.

Engineers/Circuit Designers frequently describe systems as finite-state


machines. Your Job as engineer to produce/write Verilog code of vending
machine describe below and Draw ASM Diagram. [CLO1] {marks 5}

Vending Machine

Imagine that you want to show how a vending machine behaves. To keep
the example small, we'll assume that there is only one item in vending
machine that costs Rs 20 and that the machine accepts Rs 5 coin and Rs 10
note. If the machine receives coin or note it moves to next state and if it
doesn’t receive any input (coin or note) it remains on current state. The
machine will not give change so in state Rs 15 it doesn’t receive notes and
remains of current state. The following figure shows the state machine:

Page 1 of 2
Bahria University, Islamabad
Department of Electrical Engineering
FPGA Based System Design (CEN-441) BEE-6 Spring 2023
Assignment# 02 Instructor: Asim Altaf Shah
Due date: 10 May 2023
Following are deliverable of this assignment

1) Verilog code written on Xilinx ISE


2) Test bench (give values so that it will generate output two time)
3) Waveform of output
4) ASM diagram (handwritten on A4 page)

Page 2 of 2

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