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DSP Unit 1 To 5 QB

This document contains 13 questions related to digital signal processing (DSP) systems and the TMS320C54XX digital signal processor (DSP). The questions cover topics such as DSP system schemes, sampling, digital filters, number representations, DSP hardware including multipliers and accumulators, addressing modes, programming, and interfacing of devices to the DSP.

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0% found this document useful (0 votes)
72 views12 pages

DSP Unit 1 To 5 QB

This document contains 13 questions related to digital signal processing (DSP) systems and the TMS320C54XX digital signal processor (DSP). The questions cover topics such as DSP system schemes, sampling, digital filters, number representations, DSP hardware including multipliers and accumulators, addressing modes, programming, and interfacing of devices to the DSP.

Uploaded by

Samuel White
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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UNIT - 1

Q.No. Questions
1. With a neat diagram explain the scheme of the DSP system highlighting the significance of
sampling process.
2. Derive the relationship between analog frequency and digital frequency.
3. Define decimation and interpolation process. Explain them using block diagrams and
equations. With a neat diagram explain the scheme of a DSP system
4. For the FIR filter y(n)=(x(n)+x(n-1)+x(n-2))/3. Determine i) System Function ii)
Magnitude and phase function iii) Step response.
5. Consider the sequence x(n) = [3, 2, -2, 0, 7]. It is interpolated using interpolation
sequence bk=[0.5, 1, 0.5] and the interpolation factor of 2. Find the interpolated
sequence y(m).
6. Consider a difference equation which defines an IIR filter y(n)=0.9y(n-1)+0.1x(n). Analyze how
many multipler, adders and delay elements are required to implement the above IIR filter.
7. Compute the dynamic range and percentage resolution of a signal that uses
a. 16-point fixed-point format
b 32-point floating-point format with 24 bits for the mantissa and 8 bits
for the exponent.
8. Calculate the dynamic range and precision of each of the following number
representation formats
a. 24-bit, single-precision, fixed-point format
b. 48-bit, double-precision, fixed-point format
c. a floating-point format with a 16-bit mantissa and an 8-bit exponent
9. Explain different sources of error in DSP implementations
10. With the suitable example explain the following number representation formats.
a. Fixed-point format
b. Floating-point format
11. Using 16 bits for the mantissa and 8 bits for the exponent, what is the range of numbers that can
be represented using the floating-point format similar to IEEE-754?
12. Find the decimal equivalent of the floating-point binary number 1011000011100. Consider
IEEE-754 format in which, MSB is the sign bit followed by 5 bits for exponent and 7 bits for the
fractional part.
How many complex multiplications are required for N-point DFT computation, if direct
13. computation and radix-2 FFT based DFT are used? Also compute the number of complex
multiplications required using direct computation of DFT and FFT-based DFT computation for
N=64 and 256.
UNIT - 2
Q.No. Questions
1. Explain the working of 4 x 4 binary multiplier and its hardware structure.
2. Explain the working of 4-bit shift-right barrel shifter

3. It is required to find the sum of 64 numbers each represented by 16 bits. How many bits
should the accumulator have so that the sum can be computed without the occurrence of
overflow error or loss of accuracy?
4. Design a MAC unit with guard bits whose inputs are 16-bit numbers. 1f 256 products
are to be summed up in this MAC. How many guard bits should be provided for the
accumulator to prevent overflow condition from occurring?
5. Explain Arithmetic and Logic unit with relevant block diagram
6. What are the memory addresses of the operands in each of the following cases of indirect
addressing modes? In each case, what will be the content of the addrreg after the memory
access? Assume that, the initial contents of the addrreg and the offsetreg are 0200h and
0010h, respectively.
a. ADD *addrreg-.
b. ADD+ *addrreg
c. ADD offsetreg+, *addrreg
d. ADD *addrreg, offsetreg
7.

Implement above equation using single MAC implementation and pipelined


implementation.
8. Explain the four different cases of Circular Addressing Mode.
9. Explain the Program Sequencer of DSP processor with suitable block diagram
10. With a block diagram explain the indirect addressing mode of TMS320C54XX
processor.
11. Write an explanatory note on direct addressing mode of TMS320C54XX processors
12. Describe the multiplier/adder unit of TMS320c54xx processor with a neat block
diagram.
13. Assume that the current content of AR3 is 400h, what will be its contents after each of
the following. Assume that the content of AR0 is 40h.
a. *AR3 + 0
b. *AR3-0
c. *AR3+ 1
d. *AR3-1
e. *AR3
f. *+AR3(40h)
g. *+AR3(-40h)
14. Explain the architectural features of TMS320C54xx digital signal processor
15. With the help of circuit diagram explain the hardware timer that generates a signal
to initiate an interrupt in TMS320C54XX processor. (Unit-3)
16 Explain any five basic addressing modes of TMS320C54X Processor.
UNIT – 3
Q.No. Questions
1. Write a program to compute the Sum of three product terms given by the equation
y(n) = h0x(n) + h1x(n - 1) + h2x(n - 2) where x(n), x(n - 1) and x(n - 2) are data samples
stored at three successive data-memory locations and h0, h1 and h2 are constants stored
at three other successive locations in the data memory. The result y(n) is to be stored in
the data memory.
2. Describe the functions of following registers of Hardware timer.
i. TCR ii. TIM iii. PRD
3. Explain three types of serial ports that are available in TMS320C54XX processor.
4. Write a TMS320CS4xx program to compute the equation y= mx+ c . Assume that x and
c are stored in the data memory and m in the program memory. The result should be
stored in the data memory.
5. Describe the following signals of host port interface of C54XX processor.
i. HINT ii. HRDY iii. HCNTL
iv. HBIL v. HR/W
6. Write a short on the following
i. Clock generator
ii. Pipeline operation of C54XX processor
7. Describe the operation of the following instructions:
i. MPY *AR2-, *AR4 + 0, B
ii. MAC *AR5+, #1234h, A
iii. MAS *AR3-,*AR4+, B, A
iv. MPY 13, B
8. With the help of diagram explain Important signals in the Host Port Interface
9. Explain the function of various bits in the TCR Register of TMS320C54 hardware timer.
10. Write a program to find the sum of a series of unsigned numbers stored at successive
locations in the data memory and place the result in the accumulator A, i.e.,
41𝑓ℎ

𝑦 = ∑ 𝑑𝑚𝑎𝑑(𝑖)
𝑖=410ℎ

11. Explain various multiplier instructions of TMS320C54XX processor.


12.
13.
UNIT – 4
Sl. No. Questions
1 Explain the importance of Q-notation in Digital Signal Processor. Determine the
value of each of the following 16-bit numbers represented using the given Q-
notation:
(i) 4400h as a Q15 number (ii) 0.3125 as a Q15 number (iii) D800h as a Q7 number
(iv) -0.3125 as a Q7 number.
2 Explain the implementation of FIR filter in TMS320C54 using block diagram and
memory organization.
3 With necessary equations explain the implementation of FFT algorithm on
TMS320C54.
4 Explain IIR filter. Write an assembly program to implement IIR filter on
TMS320C54
5 Determine the following for 8 and 128-point· FFT computation:
a. number of stages
b. number of butterflies in each stage
c. number of butterflies needed for the entire computation
d. number of butterflies that need no twiddle factors
6 Derive the equations to implement a butterfly structure in DIT-FFT algorithm
7 Sketch the block diagram for second order FIR filter and briefly explain.
8 Write assembly program to implement convolution algorithm. (FIR filter)
Consider x(n) and h(n) length to be 4 .
9 Write a short note on Q-notation with suitable example.
UNIT – 5
Sl. No. Questions
1 Explain memory interface for the TMS320C5416 processor using block diagram. Write
the timing diagram for read-read-write sequence of operations.
2 What is software interrupt? Write the flow chart for the interrupt handling by the
C54XX processor and explain the same. Describe the function of interrupt handling
instruction SINT18.
3 With the help of relevant diagram explain how an A/D converter is interfaced with the
C54XX processor in I/O mode. Write the flow chart to implement the software polling
for the programmed I/O interface.
4 Design a data memory system with address range 000800h-000FFFh for a C5416
processor using 2K x 8 SRAM memory chip.
5 Explain I/O interface signals for a read-write-read sequence of operation using timing
diagram.
6 Design an interface to connect a 64K X 16 flash memory to a TMS320CS4xx device.
7 Write the short note on
i. Maskable and non-maskable interrupts
ii. Hardware and Software interrupts.
8 With the help of flow chart explain the interrupt handing by C54XX processor.
9 Design an interface an 8K x 16 program ROM to the CS416 DSP in the address range
7FE000h-7FFFFFh.
10 Describe DMA with respect to C54XX.
11 With the help of block diagram, explain synchronous serial interface between the
C54xx and a CODEC device
12 Explain Multichannel Buffered Serial Port with the help suitable block diagram.
13 Describe the functions of Program register bits of PCM3002 Codec.

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