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InClassActivity01 Sol

1. The document contains an activity with multiple choice and short answer questions about binary number representation, combinational and sequential logic systems, and logic circuits. 2. Questions assess understanding of binary, two's complement, Boolean logic, Karnaugh maps, and finite state machines. 3. The final question asks about the delay for an output to be ready given a circuit with inputs and gates with 1ns delays, with the answer being it will take 3ns for the output to be ready.

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Donovan Dibs
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21 views

InClassActivity01 Sol

1. The document contains an activity with multiple choice and short answer questions about binary number representation, combinational and sequential logic systems, and logic circuits. 2. Questions assess understanding of binary, two's complement, Boolean logic, Karnaugh maps, and finite state machines. 3. The final question asks about the delay for an output to be ready given a circuit with inputs and gates with 1ns delays, with the answer being it will take 3ns for the output to be ready.

Uploaded by

Donovan Dibs
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

Activity #1 (solutions)

A. (5 points) Administrative matters


1. (3 points) Click on course syllabus, and note the course pre-requisites. Check off the boxes that apply to
you:
 I took ECSE 2610 (Computer Components and Operations)
 I took LITEC
 I took CSCI-2500 (Computer Organization)
 Other (please see your instructor immediately)
Grading: 5 points for any answer. 0 pts for no answer.
Please hand the activities marked “other” to Prof. Abouzeid after grading.
2. (2 points) Do you have a learning disability that your instructor should be aware of?
 Nope.
 Yes, I have one. Please contact your instructor immediately for further guidance.
Grading: 5 points for any answer. 0 pts for no answer.
Please hand the activities marked “yes” to Prof. Abouzeid after grading.

B. (25 points) Recap of binary number representation


Grading policy for all questions: 2 pts for trying, 5 pts for correct answer.
1. (5 points) 5610 = 001110002 = 0708 = 3816
2. (5 points) 0110 01112 = 10310 = 1478 = 6716
3. (5 points) -2410 = __1110 1000 __(eight-bit, two’s complement)

4. (5 points) If you add 5610, and –2410 using 8-bit two’s complement arithmetic, do you get an overflow?
Nope – we can never get an overflow adding numbers with opposite signs.

5. (5 points)What is the result of performing an arithmetic right shift on the 8-bit number representing -2410 ?
Answer: In an arithmetic right shift, we shift in the sign bit on the left. The result is about half the original
number, and has the same sign. Result 111101002= -1210, approximately half of –24, and with the same sign,
like we expect.

C. (20 points) Recap of combinational and sequential logic systems


Grading policy for all questions: 2 pts for trying, 5 pts for correct answer.
1. Consider the Boolean function: f ( x, y, z ) = ( x + y )( x + z )( y + z )
a. (5 points) Karnaugh map for this function
xy
00 01 11 1
0
z 0 0 1 0 0
1 0 1 1 1

b. (5 points) Use Boolean algebra to find the equivalent canonical sum-of-products expression:

f SOP ( x, y, z ) = x yz + xyz + x yz + xyz

c. (5 points) Use Boolean algebra to find the equivalent canonical product of sums expression:
f POS ( x, y , z ) = (x + y + z)(x + y + z)(x + y + z)(x + y + z)

d. (5 points) Simplify the above function, into a minimal sum of products form:

ECSE-2660 Computer Architecture, Networks, & Operating Systems, Spring 2014 Page 1 of 3
f min ( x, y, z ) = xz + x y D. (50 points) Logic Systems
(10 points) A NAND latch is constructed as shown. Each gate has a unit delay.

z
m y

Given input waveforms m and n, determine the waveforms for y and z.


1
m0
1
n0
1
y0
1 No change
z 0
= unit delay
2. (10 points) What is the difference between a DRAM chip, and a SRAM chip? What do these chips
do?
DRAM (dynamic random access memory) chips require periodic refreshing, offer high capacities,
and a variable response time. SRAM (static random access memory) chips are much faster than
DRAM, offer constant access time, but offer lower capacities. Both chips are for storage.
Grading: 4 pts for trying, 10 pts for noting at least 2 of the 3 features of each.
3. (20 points) Sketch a state diagram for a finite-state machine whose input is a bit stream X, and
that outputs Z =1 when the 2 previous input bits are 01. (you may use a Mealy or a Moore
implementation)
0/0

0
0/0 1/1
1
1/0
0 1

00
00 01
01
0
0 1
1

0
1 1
0

10
10 11
11
0
0 0
0
0

On the left is a Mealy machine solution, and on the right is a Moore machine.
ECSE-2660 Computer Architecture, Networks, & Operating Systems, Spring 2014 Page 2 of 3
In the Mealy machine, the outputs are indicated on the arrows as input/output.
In a Moore machine, the outputs are associated with each state, rather than with the transitions. Each
circle contains the state and the output.
Grading policy: 8 pts for trying, 12 pts for partial answer, 20 pts full answer.

4. (10 points) If the input x to the following circuit is available at time t=0, and the gate delay is 1ns,
at what time is the output “f” ready? Answer: 3 gate delays (we follow the longest path from input to
output). Grading: 4 pts for trying, 10 pts for correct answer.
x
g
CLOCK f

h
0

ECSE-2660 Computer Architecture, Networks, & Operating Systems, Spring 2014 Page 3 of 3

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