ISSN 2319-8885

Vol.06,Issue.32
November-2017,
Pages:6464-6467
www.ijsetr.com

A New Three-Phase Advanced Level VSI

V. LIKHITH MOHAN1, DR. A. NAGAMALLESWARA RAO2, S. RAJESH3
1
PG Scholar, Dept of EEE(PS), Swamy Vivekananda Engineering College, Kalavarai, Bobbili, AP, India.
2
Professor, Dept of EEE, Swamy Vivekananda Engineering College, Kalavarai, Bobbili, AP, India.
3
Assistant Professor, Dept of EEE, Swamy Vivekananda Engineering College, Kalavarai, Bobbili, AP, India.

Abstract: This paper presents a new design and implementation of a three-phase multilevel inverter (MLI) for distributed power
generation system using low frequency modulation and sinusoidal pulse width modulation as well. It is a modular type and it can
be extended for extra number of output voltage levels by adding additional modular stages. The impact of the proposed topology
is its proficiency to maximize the number of voltage levels using a reduced number of isolated dc voltage sources and electronic
switches. Moreover, this paper proposes a significant factor ( ), which is developed to define the number of required
components per pole voltage level. a detailed comparison based on ( ) is provided in order to categorize the different
topologies of the MILs addressed in the literature.

Keywords: Electro Magnetic Interference(EMI), Micro Controller, Multilevel-Inverter, POD Technique, Pulse Width
Modulation (PWM).

I. INTRODUCTION level inverters. In fact, the concept is so advantageous that

The Multilevel voltage source converter topologies are the several major drives manufacturers have obtained recent
best suited for medium and high voltage applications in the patents on multilevel power converters and associated
industries. There are three main topologies of multilevel switching techniques.Furthermore, several IEEE conferences
voltage source inverters: neutral point clamped (NPC), now hold entire sessions on multilevel power conversion. It
capacitor clamped (CC) and cascaded H-bridge (CHB). is evident that the multilevel concept will be a prominent
Multi level inverter are extensively used due to their choice for power electronic systems in future years,
increased power rating, reduced EMI, improving harmonic especially for medium-voltage operation, and for high power
performance. The applications of multilevel inverter are applications. There are many limitations in extracting power
reactive power compensation, variable speed drives etc. To from renewable energy resources. To minimize the power
cope up with the problems associated with the two-level demand and scarcity we have to improve the power
inverter, multi-level inverters (MUs) are introduced. At low extracting methods. Multilevel inverter is used to extract
switching frequency multi level inverters are switched when power from solar cells. It synthesizes the desired ac output
compared to two level inverters, hence the switching losses waveform from several dc sources. This paper focuses on
are almost negligible. In the power industry the multi level improving the efficiency of the multilevel inverter and
converter topology has drawn tremendous interest since it quality of output voltage waveform. Harmonics Elimination
can provide the high power required for high power was implemented to reduce the Total Harmonics Distortion
applications. The inverter should meet the following (THD) value.
requirements.
 To generate a pure sinusoidal output voltage. In power electronics have made the multilevel concept
 Inverter output current should have low total practical. One of the biggest advantages of using a MLI is
harmonic distortion (THD). that the transformer can be eliminated and this helps enhance
efficiency and cost effectiveness. In fact, the concept is so
In case of a two-level inverter, to satisfy the required advantageous that several major drives manufacturers
THD the switching frequency should be high or the have obtained recent patents on multilevel power
inductance of the output filter inductor need to be big converters and associated switching techniques. The
enough, hence multi-level inverters (MLIs) are introduced advantages of proposed multi level inverter when
for grid connected inverter. The topological structure of compared with conventional Multi level inverter are :
Multi level inverters should be capable of withstanding  The proposed multi-level inverter Number of devices
high input voltage for high power applications. A new is fewer than that of the conventional multi-level
multi level inverter is proposed which is capable of inverters. Therefore, the proposed system is more
reducing problems faced by usage of conventional multi

Copyright @ 2017 IJSETR. All rights reserved.

 V. LIKHITH MOHAN, DR. A. NAGAMALLESWARA RAO, S. RAJESH
reliable and cost competitive than the conventional limitations in extracting power from renewable energy
two-level and multilevel inverters. resources. To extract power from solar cells multilevel
 To generate switching pulses to 10 switches used inverter is used. It synthesizes the desired ac output
only one carrier signal is required in proposed waveform from several dc sources. In industrial applications
Multi level inverter. One of the important issues multilevel inverter shows hope to reduce initial cost and
about multi-level inverter is the voltage balance of complexity.
the dc-link capacitor. The voltage of capacitor Cl
and C2 should be equally balanced to VDC/2. II. PROPOSED CASCADED MULTI LEVEL
INVERTER
The proposed MLI has the following advantages over the Based on cascaded H bridge multi level inverter fig.1
conventional inverters: illustrates the proposed multi level inverter . In the
 Proposed topology can be easily extended to 9-level or proposed multi level inverter two dc link capacitors Cl and
higher level with minimized active device component C2 and 8 switches are used. Input supply to inverter is
count V dc and voltage across each capacitor is V dc/2. In
 Switches are turned on at low switching frequency order to eliminate the harmonics the output of the
(50Hz). Hence switching losses are almost negligible. • inverter is connected to LC filter. The switching
Single H bridge is used to produce 5 level output sequence to generate 5 level output is shown in Fig.2.
 No of DC link capacitors used to produce 5 level output
is less when compared to conventional cascaded H-
bridge multilevel inverter.

A single sinusoidal reference is compared with each

carrier signal to determine the output voltage for the
inverter. In case of the N-Ievel NPC type multi-level
inverter, N-l triangular carrier signals with the same
frequency and amplitude are used so that they fully
Fig.2. Pulse generation using POD technique.
occupy contiguous bands over the range +VDC to -
VDC. If the capacitor voltage is unbalanced, the output Specifications of proposed inverter are as follows;
voltage becomes unsymmetrical and it results in a high  Input DC voltage: 100 volts
harmonic content in the load current. Three dispositions
 Output Voltage: 50 volts (RMS)
of the carrier signal to generate the PWM signal are
 Output Power: 250 watts
considered as follows;
 Filter inductance (L): 300 IlH
 Phase disposition (PD); where all carriers are in
phase.  Filter capacitance (C): 150 IlF
 Alternative phase opposition disposition (APOD);
A. POD Technique for Pulse Generation
where each carrier is phase shifted by 180 degree
POD stands for phase opposition and disposition
from its adjacent carrier.
technique. The proposed technique is based on POD
 Phase opposition disposition (POD); where the
technique. The proposed technique is used for pulse
carriers above zero voltage are 180 degree out of
generation in multi level inverter shown. If sine wave is
phase with those below zero voltage.
greater than carrier wave, witches Tp+ is on else Tp- is
on. If sine wave 1 is positive then switches Ta+, Tb- are
on and if sine wave is negative then switches Ta-,Tb+ is
on. If sine wave 2 is greater than carrier wave ,switch
Tn+ is on else switch Tn- is on.

TABLE I: Switching Conditions of Multi-Level Inverter

Fig.1. Proposed five-level multi level inverter.

This paper focuses on improving the efficiency of

the multilevel inverter and quality of output voltage
waveform. Harmonics Elimination was implemented to
reduce the Total Harmonics Distortion (THD) value. To
minimize the power demand and scarcity we have to
improve the power extracting methods. There are many
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.32, November-2017, Pages: 6464-6467
 A New Three-Phase Advanced Level VSI
III. SIMULATION ANALYSIS AND RESULTS
The technique used for pulse generation is POD
technique .Simulation of proposed multi level inverter is
carried out. 8 MOSFET are used as switches and output
of multi level Inverter is connected to L,C filter to
eliminate harmonics. ln Fig.3 Dc supply of 100 volts is
given using batteries and 2 dc link capacitors are used.

Fig.5. Two sine reference waves and triangle carrier

wave.

Fig.6. Multi level inverter output voltage without LC

Fig.3. Block diagram of simulation. filter.
To measure the voltage across the capacitor Voltage
measurement device is connected across each capacitor.
Generally in order to turn on 8 switches 8 carrier
signals are needed but using proposed technique single
carrier wave is used to generate switching pulses to 8
switches. The output of Multilevel Inverter is connected
to LC filter in order to eliminate harmonics and pure
sine wave is obtained. Load Voltage are measured using
voltage measurement device and Load current is
measured using current measurement device. This type of
MLI is mainly used for grid connected applications. Voltage
is divided equally across two capacitors. Voltage across Fig.7. Load voltage and load current (R-Load) with LC
each capacitor is 50 volts. Voltage across each capacitor is filter.
measured using voltage measurement device as shown in
Figs.4 to 8.

Fig.8. Proposed single phase five-level inverter system.

IV. CONCLUSION
The control will be simulated using Proportional Integral
Derivative (POD) controller. A new Proposed topology
Fig.4. SIMULINK model for switching pulse generation. can be easily extended to 5-level or higher level with
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.32, November-2017, Pages: 6464-6467
 V. LIKHITH MOHAN, DR. A. NAGAMALLESWARA RAO, S. RAJESH
minimized active device component count. A new five
level inverter topology using POD technique is designed and
the same is implemented. which is capable of producing
five level output with less component count. No of dc
supply sources used in proposed multi level inverter are less
when compared to conventional Cascaded H bridge multi
level inverter. At low switching frequency (50Hz) Switches
are turned on. Hence switching losses are almost negligible.

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International Journal of Scientific Engineering and Technology Research

Volume.06, IssueNo.32, November-2017, Pages: 6464-6467