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placed by a capacitance multiplier. In this last case, in order to test circuit performance in layout implementation, the resonance frequency obtained through the standard transistor model has been also compared with those determined using fast and slow transistor models (Table III). The percentage error increases only slightly. In Fig. 6, the simulated and theoretical input currents of the equivalent LC bandpass filter are compared. It is possible to see that the LC filter response is like the one expected for a limited range of frequencies, and, at the resonance frequency (centered at 256 Hz), its Q is about 8 and, of course, is lower than that of the ideal one (a pure LC circuit). However, in the other frequency ranges, the bandpass behavior is ensured. The supply voltage used for the CCII used in the LC filter implementation is 1.5 V. The total power consumption is only 370 W.

Versatile Insensitive Current-Mode Universal Biquad Implementation Using Current Conveyors

Hung-Yu Wang and Ching-Ting Lee
AbstractWe present a versatile multi-inputmulti-output biquad configuration. Either a three-input single-output or a single-input three-output universal filter can be realized. The proposed construction is comprised of only three current conveyors and four grounded passive elements, is multifunctional and convenient for monolithic integration, has low sensitivity, and is simple in structure. Its high impedance outputs enable easy cascading in current-mode operation. After slightly modifying an original configuration, another novel single-input three-output universal filter with extra advantageous features has been obtained. The effects of current conveyor nonidealities are discussed and simulation results are provided. Index TermsActive filters, current conveyors, current mode.

I. INTRODUCTION VII. CONCLUSION We have shown how the use of novel second-generation current conveyors allows for simulating high-valued inductances and, for example, allows for the design of fully integrated low resonating frequency bandpass filters. All the circuitry has been implemented in a standard CMOS technology using low-voltage low-power techniques. Much research has been devoted to the design of multiple-input single-output and single-input multiple-output current-mode or voltage-mode universal filters due to their convenience and versatility in terms of signal processing for practical applications [1][8]. Also, by the introduction of dual-output current conveyors in active filter designs, new more advantageous topologies have been obtained [9][11]. This is mainly attributable to the facility with which current outputs and current feedback can be developed when multiple current outputs are used [12]. The major intention of this brief is to present a novel configuration, based on current conveyors and grounded passive elements, for the realization of universal current-mode filters. We first propose a multi-input multi-output filter, which contains two dual-output second-generation current conveyors (CCII6s) and one dual-output third-generation current conveyor (CCIII6). It is highly flexible and easy to design. The application to the implementations of three-input single-output and single-input three-output universal filter functions has been presented. Next, a novel single-input three-output filter has been proposed. It possesses a low input impedance and high output impedance characteristic and is comprised of three CCII6s. Both filter schemes exhibit the features of cascadability and insensitivity that make them more attractive. The use of grounded passive elements is also helpful for the electronic tunability, as well as easing the elimination/accommodation of various parasitic effects for monolithic integration [3]. HSPICE simulations are performed to demonstrate the results. II. CIRCUIT DESCRIPTION Both the CCII6 and CCIII6 [13] can be described using the following matrix-relations:

REFERENCES
[1] G. Di Cataldo, G. Ferri, and S. Pennisi, Active capacitance multiplication by current conveyors, in IEEE Proc. ISCAS98, Monterey, CA, May 1998. [2] G. Ferri and S. Pennisi, A 1.5 V current-mode capacitance multiplier, in IEEE Proc. ICM98 Conf., Monastir, Tunisia, Dec. 1998, pp. 912. [3] P. De Laurentiis, G. Ferri, G. Palumbo, and S. Pennisi, A low pass 1 Hz 2 V-supply current conveyor based filter, in ECS99 Conf., Bratislava, 1999. [4] S. Solis-Bustos and J. Silva-Martinez, A 4 Hz low-pass continuous-time filter, in IEEE Proc. ICECS98, Lisbon, Sept. 1998, pp. 169172. [5] G. Ferri, S. Pennisi, and S. Sperandii, A LV CMOS 1-Hz low pass filter, in IEEE Proc. ICECS99, Cyprus, Sept. 1999. [6] C. Toumazou, F. Lidgey, and D. Haigh, Analogue IC Design, the Current-Mode Approach, London, U.K.: IEE, 1990. [7] W. Kiranon and P. Pawarangkoon, Floating inductance simulation based on current conveyors, Electron. Lett., vol. 33, no. 21, pp. 17481749, Oct. 1997. [8] H. O. Elwan and A. M. Soliman, Low-voltage low-power CMOS current conveyors, IEEE Trans. Circuits Syst. I, vol. 44, pp. 828835, Sept. 1997. [9] M. Cheng and C. Toumazou, 3 V MOS current conveyor cell for VLSI technology, Electron. Lett., vol. 29, no. 3, pp. 317318, Feb. 1993. [10] H. O. Elwan and A. M. Soliman, A novel CMOS current conveyor realization with an electronically tunable current mode filter, IEEE Trans. Circuits Syst. II, vol. 43, pp. 663670, Sept. 1996. [11] A. Fabre, H. Amrani, and O. Saaid, Current mode band-pass filters with magnification, IEEE Trans. Circuits Syst. II, vol. 43, pp. 839842, Dec. 1996. [12] K. C. Smith and A. Sedra, The current-conveyor, a new circuit building block, Proc. IEEE, vol. 56, pp. 13861369, 1968. [13] A. Sedra and K. Smith, A second-generation current conveyor and its applications, IEEE Trans. Circuit Theory, vol. CT-17, pp. 132133, 1970. [14] W. Surakampohtom, V. Riewrja, K. Kumwachara, and K. Dejhan, Accurate CMOS-based current conveyors, IEEE Trans. Instrum. Meas., vol. 40, pp. 699702, Aug. 1991.

IY VX IZ

0 a 0 = 1 0 0 0 61 0

VY IX : VZ

(1)

The + or 0 signs of the IZ denote the positive and negative current conveyance from X to Z + and Z 0 for both CCII6 and CCIII6.
Manuscript received September 2000; revised March 2001. This paper was recommended by Associate Editor A. Skodras. The authors are with the Institute of Optical Sciences, National Central University, Chung-Li, Taiwan, R.O.C. (e-mail: t260003@cc.ncu.edu.tw, ted@cic.edu.tw). Publisher Item Identifier S 1057-7130(01)05223-5.

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With a = 0 and a = 01, (1) describes CCII6 and CCIII6, respectively. Taking the nonidealities of the CCII6 and CCIII6 into account, namely VX = VY ;  = 1 0 "2 (j"2 j  1) denotes the voltage tracking error, IZ + = IX ;  = 1 0 "3 (j"3 j  1) denotes the current tracking error of the port Z +; IZ 0 = 0IX ;  = 1 0 "4 (j"4 j  1) denotes the current tracking error of the port Z 0, and IY = 0 IX ; = 1 0 "1 (j"1 j  1) denotes the current tracking error of the port Y for CCIII6. The first proposed multi-input multi-output filter is constructed with two CCII6s, one CCIII6, and four grounded passive elements, as shown in Fig. 1. Its output functions can be derived as

2 Io1 = 3 (s C1 C2 2 2 I3 0 sC1 G2 I2 + G1 G2 1 1 I1 ) D(s) 1 1 G1 [sC2 2 2 ( 3 I1 0 3 I3 ) + G2 (I1 + 3 I2 )] Io2 = D(s) sC2 2 2 [1 1 G1 (3 I3 0 3 I1 ) + sC1 ( 3 I2 + I3 )] Io3 = D(s)
where

(2) (3) (4)

Fig. 1. The proposed current-mode biquad configuration.

D(s) = s2 C1 C2 2 2 3 + sC1 G2 + 1 3 1 G1 G2 :

(5)

The ; ; , and  indexes refer to the number of each current conveyors that we have indicated in Fig. 1. From (2), it can be observed that the scheme can be used as a current-mode three-input single-output (i.e., taking Io1 as the output terminal) universal filter as follows: 1) for a highpass (HP) filter: I1 = I2 = 0, the input current signal is I3 ; 2) for a bandpass (BP) filter: I1 = I3 = 0, the input current signal is I2 ; 3) for a lowpass (LP) filter: I2 = I3 = 0, the input current signal is I1 Moreover, the configuration in Fig. 1 can function as a single-input three-output universal filter if I1 = I3 = 0 and by taking I2 as the single input terminal. From (2) to (4), the current transfer functions become

Fig. 2. The proposed current-mode single-input three-output universal filter.

H1 = Io1 I2 Io2 H2 = I2 Io3 H3 = I2

= = =

03 C1G2 s

D(s) 3 1 1 G1 G2 D(s) 2 2 3 C1 C2 s2 : D(s)

(6) (7) (8)

Q become adjustable. Equations (9) and (10) give the following design equations for specified !o and Q: G1 = !o QC (11) 1 3 1 G2 = 1 2 3 122 3 G1 : (12) Q
Fig. 2 shows the second proposed single-input three-output universal filter. It uses a multiple-output CCII6 to replace the CCIII6 and slightly modifies its connection of the single-input three-output universal filter in Fig. 1. By considering the nonideal current conveyors, the current transfer functions can be derived as

Thus, the circuit realizes a BP response at Io1 , an LP response at Io2 , and an HP response at Io3 simultaneously (with gains of H1 = 03 ; H2 = 1 =1 ; H3 = 2 =2 ). Because the summing of the currents does not require any additional hardware, a notch response can be obtained by joining the output terminals Io2 and Io3 . Also, by adding all the current output terminals, an allpass (AP) filter can be obtained. Furthermore, by the inspection of (2)(5), we can obtain additional filter functions under some specific conditions except the above mentioned functions. All the filters possess the same natural angular frequency !o and the quality factor Q, and can be given by

!o = Q=

1 3 1 G1 G2 2 2 3 C1 C2 1 2 3 1 2 3 C2 G1 : C1 G2

H1 = Io1 I2 Io2 H2 = I2 H3 = Io3 I2

where

= = =

03 C1 G2 s

P (s) 3 1 1 G1 G2 P (s) 2 2 3 C1 C2 s2 P (s)

(13) (14) (15)

(9) (10)

P (s) = s2 C1 C2 2 3 2 + sC1 G2 + 1 3 1 G1 G2 :

(16)

A possible design procedure can be developed with the selection of equal capacitance values so that C1 = C2 = C (components matching and tuning can be achieved in monolithic integration [14]); then !o and

Io1 ; Io2 ; and Io3 simultaneously (with gains of H1 = 03 ; H2 = 1 =1 ; H3 = 2 =2 ). Similarly, due to the fact that all outputs are
associated with high output impedances, AP and notch functions can

Clearly, the circuit realizes BP, LP, and HP responses, respectively, at

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Fig. 3. CMOS implementation of CCII .

(a)

(b) Fig. 4. Responses of the three-input single-output filter. (a) Highpass and lowpass. (b) Bandpass.

be derived by properly joining the output terminals. The natural angular frequency !o and the quality factor Q are given by

III. ADVANTAGES OF THE PROPOSED FILTERS A number of realizations of tunable grounded resistors exist in the literature [15], [16]; the grounded resistors R1 (=1=G1 ) and R2 (=1=G2 ) will benefit by an easier electronic tunability. The use of grounded resistors also conduces to integrated-circuit implementation [17]. By inspecting (9), (10), (17), and (18), it can be easily evaluated that the passive and active sensitivities of !o and Q are equal to 0.5 and 1 in

!o = Q = 3

1 1 G1 G2 2 2 C1 C2 1 2 1 2 C2 G1 : C1 G2

(17) (18)

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Fig. 5.

Responses of the single-input three-output filter from Fig. 1: highpass and lowpass.

Fig. 6.

Responses of the single-input three-output filter for circuit B in Fig. 2.

magnitude, for the filters in Figs. 1 and 2, respectively. In consequence, these two filters can be classified as insensitive [8]. From Figs. 1 and 2, it can be observed that all the output currents are obtained from the high output impedance ports of the current conveyors, which enables easy cascadability without the need of any supplementary buffer circuits. Also, we can compensate for or vary the gains of the filters in Figs. 1 and 2 by using the current transfer ratios for the ports Z + and Z 0 of current conveyors, namely,  and  , (it can be perceived from (2)(5), for example, that the denominator coefficients for the s2 and s0 terms can be compensated by 2 and 1 , respectively, and that 2 ; 3 , and 1 can be used to compensate for the coefficients of the s2 ; s1 , and s0 terms in the numerator, for the allpass function of the above single-input three-output filter in Fig. 1) when variable-gain current conveyors are employed [18], [19]. Furthermore, it can be observed from (17) and (18) that the use of a variable-gain current conveyor in Fig. 2 realizes the independent adjustability of Q (by 3 ). Also, the filter in Fig. 2 possesses both low-input and high-output impedance levels which will be more convenient in terms of cascading and connecting to other networks. IV. SIMULATION RESULTS AND DISCUSSION To verify the potentialities of the proposed configuration, circuit simulations of the presented universal filters have been carried out, using CMOS implementations of CCII6 and CCIII6 based on TSMC 0.6- m n-well CMOS technology with a level-28 MOS model of HSPICE. As shown in Fig. 3, we used the p-channel input CCII6, which is the

complementary version of [20], to minimize the body effect (it also benefits from less flicker noise). The bias currents IB1 and IB2 are set to 100 A and 200 A, respectively; we then obtain the transfer ratios for CCII6 which are VX =VY = 0:95 (when the ports Z + and Z 0 are grounded and the port X is floating), IZ+ =IX = 1:03, and IZ 0 =IX = 1:03 (when ports Z +; Z 0 and Y are grounded). It is observed that the voltage transfer ratio deviated from unity as the loading resistance at port X decreased. To duplicate the output current on the port Z 0 of CCII6 in Fig. 2, an additional current output stage can be added, shown by the dashed lines in Fig. 3. The CCIII6 [21] still suffers from body effects due to its structure. The transfer ratios for CCIII6 (when we use a resistance load at ports Y; Z +, and Z 0 of 1 k
) are IY =IX = 0:99; IZ+ =IX = 1:02; IZ 0 =IX = 1:06, and VX =VY = 1:05, respectively. The current and voltage transfer ratios did not deviate much from unity when we varied the value of the loading resistance simultaneously at ports Y; Z + and Z 0 with all transistors operating in the saturation region. We assumed that VDD = 0VSS and a nominal value of VDD = 2:5 V. The following passive component values were chosen in order to obtain the same theoretical value (deduced from (9), (10) (17), and (18)) for the !o of the universal filters in Figs. 1 and 2: C1 = C2 = 1 nF; R1 = 2 k
; R2 = 500
for circuit A (theoretical value of fo = !o =2 = 159 kHz and Q = 0:5), C1 = C2 = 1 nF; R1 = R2 = 1 k
for circuit B (theoretical value of fo = 159 kHz and Q = 1); C1 = C2 = 1 nF; R1 = 500
; R2 = 2 k
for circuit C (theoretical value of fo = 159 kHz and Q = 2). In the circuit of Fig. 1, the simulated values of fo and Q are 159 kHz and 0.52 for circuit A, 158 kHz and

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0.92 for circuit B, and 157 kHz and 2.09 for circuit C, respectively. Fig. 4(a) shows the responses for the highpass and lowpass functions of the three-input single-output filter. Its bandpass responses are shown in Fig. 4(b). All the results are in good agreement with the theoretical predictions. In the same way, the responses for the HSPICE simulation of the single-input three-output universal filter in Fig. 1 are shown in Fig. 5, when it functions as highpass and lowpass modes. The simulated results for the CCII6-based single-input three-output universal filter of Fig. 2 are shown in Fig. 6. The simulated fo and Q are 159 kHz and 0.55 for circuit A, 159 kHz and 0.99 for circuit B, and 159 kHz and 1.77 for circuit C, respectively. As shown, the results also confirm the theoretical ones. As indicated in the previously published paper [22], the parasitic impedances of nonideal current conveyors also affect the frequency performance of the circuits. In this case, larger values of C1 and G2 and lower values of G1 and C2 in Figs. 1 and 2 will contribute to the reduced loading effects, that agrees with our simulation results. Thus, the filters behave better for low-Q applications and the useful frequency range mainly relies on the bandwidths of the current and voltage transfers of current conveyors [22]. To improve the deviation to theoretical responses, high-performance CCII6 and CCIII6 with minor parasitic effects must be employed. V. CONCLUSION A versatile multi-input multi-output current-mode biquad configuration is introduced first in this brief. Its versatility has been exhibited by application on the implementation of three-input single-output and single-input three-output universal filters. In addition, by slight modification of the proposed scheme, another more useful single-input three-output construction has been obtained. Only three current conveyors and four grounded passive elements are necessary in both proposed filters. Many advantaged textures have been demonstrated. The simulation results confirm the theoretical analysis and a discussion of means to improve the responses is also included. ACKNOWLEDGMENT The authors would like to thank the anonymous reviewers for their valuable comments and useful suggestions. Technical support from the Chip Implementation Center (CIC) is also gratefully acknowledged. REFERENCES
[1] C. Toumazou and F. J. Lidgey, Universal active filter using current conveyors, Electron. Lett., vol. 22, pp. 662664, 1986. [2] T. Tsukutani, M. Ishida, S. Tsuiki, and Y. Fukui, Current-mode biquad without external passive, Electron. Lett., vol. 32, pp. 197198, 1996. [3] H. O. Elwan and A. M. Soliman, A novel CMOS current conveyor realization with an electronically tunable current mode filter suitable for VLSI, IEEE Trans. Circuit Syst. II, vol. 41, pp. 663670, 1996. [4] J. W. Horng and M. H. Lee, High input impedance voltage-mode lowpass, bandpass and highpass filter using current-feedback amplifiers, Electron. Lett., vol. 33, pp. 947948, 1997. [5] C. M. Chang and M. J. Lee, Voltage-mode multifunction filter with single input and three outputs using two compound current conveyors, IEEE Trans. Circuits Syst. I, vol. 46, pp. 13641365, 1999. [6] M. T. Abuelmaatti and H. A. Al-Zaher, New universal filter with one input and five outputs using current-feedback amplifiers, Analog Integrated Circuits and Signal Processing, vol. 16, pp. 239244, 1998. [7] Z. J. Lata and P. B. Aronhime, Cascadable current-mode biquads, Analog Integrated Circuits and Signal Processing, vol. 13, pp. 275284, 1997.

[8] A. Fabre and M. Alami, Universal current mode biquad implemented from two second generation current conveyors, IEEE Trans. Circuits Syst. I, vol. 42, pp. 383385, 1995. [9] A. M. Soliman, New current mode filters using current conveyors, AEU Int. J. Electron. Commun., vol. 51, pp. 275278, 1997. [10] E. O. Gunes, A. Toker, and S. Ozoguz, Insensitive current-mode universal filter with minimum components using dual-output current conveyors, Electron. Lett., vol. 35, pp. 524525, 1999. [11] O. Oliaei and J. Porte, Compound current conveyor (CCII and CCII ), Electron. Lett., vol. 33, pp. 253254, 1997. [12] B. Al-Hashimi, Current mode filter structure based on dual output transconductance amplifiers, Electron. Lett., vol. 32, pp. 2526, 1996. [13] A. Fabre, Third-generation current conveyor: a new helpful active element, Electron. Lett., vol. 31, pp. 338339, 1995. [14] A. Durham and W. Redman-White, Integrated continuous-time balanced filters for 16-b DSP interfaces, IEEE J. Solid-State Circuits, vol. 28, pp. 835839, 1993. [15] G. Moon, M. E. Zaghloul, and R. W. Newcomb, An enhancement-mode MOS voltage-controlled linear resistor with large dynamic range, IEEE Trans. Circuits Syst., vol. 37, pp. 12841288, 1990. [16] G. Wilson and P. K. Chan, Novel voltage controlled grounded resistor, Electron. Lett., vol. 25, pp. 17251726, 1989. [17] B. Nauta, Analog CMOS Filters for Very High Frequencies. Norwell, MA: Kluwer, 1993. [18] A. Carlosena and G. S. Moschytz, Design of variable-gain current conveyors, IEEE Trans. Circuits Syst. I, vol. 41, pp. 7981, 1994. [19] W. Surakampontorn and P. Thitimajshima, Integrable electronically tunable current conveyors, Proc. Inst. Elect. Eng., pt. G, vol. 135, pp. 7177, 1988. [20] W. Surakampontorn, Accurate CMOS-based current conveyors, IEEE Trans. Instrum. Meas., vol. 40, pp. 699702, 1991. [21] A. Piovaccari, CMOS integrated third-generation current conveyor, Electron. Lett., vol. 31, pp. 12281229, 1995. [22] A. Fabre, O. Saaid, and H. Barthelemy, On the frequency limitations of the circuits based on second generation current conveyors, Analog Integrated Circuits and Signal Processing, vol. 7, pp. 113129, 1995.

Modeling CMOS Gates Driving

Interconnect Loads

Alexander Chatzigeorgiou, Spiridon Nikolaidis, and Ioannis Tsoukalas

AbstractThe problem of estimating the performance of CMOS gates interconnect loads is addressed in this paper. The widely acdriving cepted -model is used for the representation of an interconnect line that is driven by an inverter. The output waveform and the propagation delay of the inverter are analytically calculated taking into account the coupling capacitance between input and output and the effect of the short-circuit current. In addition, short-circuit power dissipation is accurately estimated. Once the voltage waveform at both the beginning and the end of an interconnect line are obtained, a simple method is employed in order to calculate the voltage waveform at each point of the line. Index TermsModeling, propagation delay, short-circuit power.

I. INTRODUCTION With continuously decreasing device dimensions, the effect of the interconnect lines on the overall performance of digital integrated cirManuscript received February 1999; revised March 2001. This paper was recommended by Associate Editor E. Friedman. A. Chatzigeorgiou and I. Tsoukalas are with the Computer Science Department, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece. S. Nikolaidis is with the Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece. Publisher Item Identifier S 1057-7130(01)05224-7.

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