Ov5640-Mrsl-A00a DS 1 0
Ov5640-Mrsl-A00a DS 1 0
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rights, relating to the use of information in this document. No license, expressed or implied, by estoppel or otherwise, to
any intellectual property rights is granted herein.
The information contained in this document is considered proprietary to OmniVision Technologies, Inc. and all its
affiliates. This information may be distributed to individuals or organizations authorized by OmniVision Technologies, Inc.
to receive said information. Individuals and/or organizations are not allowed to re-distribute said information.
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Trademark Information
OmniVision and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc. OmniPixel3-HS and VarioPixel are
trademarks of OmniVision Technologies, Inc. en
All other trademarks used herein are the property of their respective owners.
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color CMOS QSXGA (5 megapixel) MIPI camera module with OmniBSI™ technology and auto
focus control
version 1.0
july 2010
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00features
1.4 µm x 1.4 µm pixel with OmniBSI technology for support for internal and external frame
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high performance (high sensitivity, low crosstalk, low synchronization for frame exposure mode
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noise, improved quantum efficiency) support for horizontal and vertical sub-sampling,
optical size of 1/4" binning
automatic image control functions: automatic support for minimizing artifacts on binned image
exposure/ gain control (AEC/AGC), automatic white support for data compression output
balance (AWB), automatic band filter (ABF),
support for anti-shake
automatic 50/60 Hz luminance detection, and
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automatic black level calibration (ABLC) standard serial SCCB interface
programmable controls for frame rate, AEC/AGC digital video port (DVP) parallel output interface and
16-zone size/position/weight control, mirror and flip, dual lane MIPI output interface
cropping, windowing, and panning embedded 1.5V regulator for core power
image quality controls: color saturation, hue, gamma, programmable I/O drive capability, I/O tri-state
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00key specifications
active array size: 2592 x 1944 maximum image transfer rate:
power supply: QSXGA (2592x1944): 15 fps
core: 1.5V ± 5% (with embedded 1.5V regulator) 1080p: 30 fps
analog: 2.6 ~ 3.0V (2.8V typical) 1280x960: 45 fps
I/O: 1.8V / 2.8V 720p: 60 fps
VGA (640x480): 90 fps
power requirements:
active: TBD QVGA (320x240): 120 fps
standby: TBD sensitivity: TBD
temperature range: shutter: rolling shutter / frame exposure
operating: -30°C to 70°C maximum exposure interval: 1964 x tROW
stable image: 0°C to 50°C pixel size: 1.4 µm x 1.4 µm
output formats: 8-/10-bit RGB RAW output well capacity: TBD
lens size: 1/4" dark current: TBD
lens chief ray angle: 24° fixed pattern noise (FPN): TBD
input clock frequency: 6~27 MHz image area: 3673.6 µm x 2738.4 µm
S/N ratio: TBD package dimensions: 8.5mm x 8.5mm x 5.10mm
dynamic range: TBD
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00table of contents
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4 module specifications 4-1
4.1 package specifications
4.2 mechanical specifications
4.3 connector information
tia 4-1
4-2
4-2
4.4 optical specifications 4-2
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4.5 VCM general specifications 4-3
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00list of figures
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00list of tables
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table 4-3 optical specifications 4-2
table 4-4 VCM specifications tia 4-3
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1 pin descriptions
table 1-1 lists the pin descriptions and their corresponding numbers for the OV5640MRSL camera module. The package
information is shown in section 4.
pin pin
number signal name type description
01 AGND ground ground for analog circuit
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03 STROBE I/O strobe output
04
05
06
AF_VCC
SIOD
VCMSINK
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power
I/O
I/O
autofocus power
09 RESETB input (0) reset (active low with internal pull-up resistor)
pin pin
number signal name type description
26 DGND ground ground for digital circuit
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32 DGND ground ground for digital circuit
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33 D2 output video port output bit[2]
37 D0
en output video port output bit[9]
DOVDD
GPIO1
GPIO2
MDN2
MDN1
MDP2
MDP1
DGND
DGND
DGND
DGND
DVDD
AVDD
FREX
XCLK
MCN
MCP
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2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OV5640MRSL
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
AGND
STROBE
SIOD
SIOC
RESETB
PCLK
VSYNC
HREF
PWDN
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DGND
5640MRSL_1_1
The OV5640MRSL is a sensor on-board camera with a lens and module designed for mobile applications where low
power consumption and small size are of utmost importance.
Proprietary sensor technology utilizes advanced algorithms to cancel Fixed Pattern Noise (FPN), eliminate smearing,
and drastically reduce blooming. All required camera functions are programmable through the serial SCCB interface.
The device can be programmed to provide image output in various fully processed and encoded formats.
The OV5640MRSL features the OV5640 image sensor. Refer to the OV5640 Product Specification for chip-specific
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information.
DVP
D[9:0]
row select
formatter
engine
image 10-bit
FIFO
ISP
MCP/N
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MDP/N[1:0]
50/60 Hz gain
auto detection control
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PLL VCM
and system control logic interface interface controller
XVCLK
PWDN
RESETB
GPIO[3:0]
PCLK
HREF
VSYNC
STROBE
SIOC
SIOD
FREX
5640_FDS_2_1MRSL
DOVDD EVDD
C6 0.1μF-0201
C5 0.1μF-0201
D1
D0
D2
K6 D4/MDN0
K7 D5/MDP0
EVDD
D6/MCN
D7/MCP
A7
A8
C3
K2
K3
K4
K5
K8
J2
J3
J4
J5
J7
J6
I8
I9
NC
NC
DOVDD
DOVDD
DOVDD
DOVDD
D1/GPIO3
DOGND
D0/GPIO2
D2
D4/MDN0
D5/MDP0
EVDD
EGND
D6/MCN
D7/MCP
NC
NC
AGND AF_AGND
1 2
STROBE AF_VCC
3 4
A6 F10 SIOD VCMSINK
NC NC 5 6
K1 E10 SIOC AVDD
DVDD NC 7 8
J1 B9 RESETB GPIO1
DVDD DGND 9 10
<HRS FX12B-40S-0.4SV>
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I2 J9 D8/MDN1 PCLK GPIO0
DGND D8/MDN1 11 12
PCLK I1 J10 D9/MDP1 VSYNC FREX
PCLK D9/MDP1 13 14
HREF H2 K11 PVDD HREF D9/MDP1
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HREF EGND 15 16
VSYNC H1 I10 PVDD PWDN D8/MDN1
VSYNC PVDD 17 18
G2 J11 C4 0.1μF-0201 D9/MDP1 DGND
DOGND U1 DOGND 19 20
GPIO1 G1
GPIO1 OV5640 DVDD
I11 D8/MDN1
21 22
D7/MCP
GPIO0 F1
GPIO0 CSP BSI D3
H10 D3 D7/MCP
23 24
D6/MCN
FREX F2 H11 XCLK D6/MCN DGND
FREX XVCLK 25 26
STROBE E1 G10 SIOC D5/MDP0 D5/MDP0
STROBE SIOC 27 28
RESETB E2 G11 SIOD D4/MDN0 D4/MDN0
RESETB SIOD 29 30
PWDN D1 F11 D3 DGND
JP2
PWDN SGND 31 32
D2 D11 D2 XCLK
DVDD AGND 33 34
C1
B8
DVDD
NC
en AVDD
NC
C11
E11
D1
D0
DGND
35
37
36
38
DVDD
DOVDD
DGND
VCMSINK
VCMSINK
VCMGND
VCMGND
39 40
DGND
DGND
DGND
AGND
AGND
DVDD
DVDD
AVDD
AVDD
VN
VH
NC
NC
NC
NC
B7
B6
C2
B1
B2
A2
B4
B3
A3
A4
B5
A5
A9
A10
B10
C10
B11
A11
D10
AGND
AGND
C2 0.1μF-0201
C3 0.1μF-0201
C8 0.1μF-0201
VCMSINK
AF_AGND
C7 1μF-0402
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DVDD
note 6 sensor AGND and DGND should be separated and connected to a single point outside PCB
(do not connect inside module).
note 7 DGND and EGND should be two separated nets, and only connected at a single point inside the module.
note 9 if more space available, use capacitor of 1 μF-0402 between DVDD and DGND.
note 10 D9:0 (D9:MSB, D0:LSB) is sensor RGB RAW 10-bit output. D9:2 (D9:MSB, D2:LSB) is 8-bit output.
note 12 traces of MCP, MCN, MDP0, MDN0, MDP1, and MDN1 should have the same or similar length.
The differential impedance of these transmission lines should be controlled at 100 Ohm.
note 14 VCM driver built in the sensor could be controlled by the micro-controller inside the sensor.
5640MRSL_FDS_2_2
3 operating specifications
3.1 absolute maximum ratings
VDD-A 4.5V
VDD-IO 4.5V
a. exceeding the absolute maximum ratings shown above invalidates all AC and DC electrical specifications and may
result in permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods
may affect device reliability.
parameter range
a
operating temperature range -30°C to +70°C
a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range
b. image quality remains stable throughout this temperature range
3.3 DC characteristics
a. using the internal DVDD regulator is strongly recommended for minimum power down current
b. active current is based on sensor resolution at full size and at full speed in compression format. For smaller sizes
such as 720p or below preview, the total active current will be about half.
c. DOVDD active current is based on loading of 10pF and typical compression format output PCLK (48MHz). For YUV
output with higher PCLK, or higher loading, DOVDD current can go up.
d. at room temperature and typical supply voltages
e. based on DOVDD = 1.8V.
3.4 AC characteristics
ADC parameters
B analog bandwidth 30 MHz
a. for input clock range 6~27MHz, the OV5640MRSL can tolerate input clock jitter up to 1ns, for input clock range to
54MHz, the OV5640MRSL can tolerate input clock jitter up to 500ps
b. if the PLL is bypassed, the delay from input clock to output clock is approximately 4~5ns
c. if using the internal PLL
d. typical PCLK is 48 MHz when sensor output is smaller size (VGA YUV or below) or full size compression
e. 96 MHz is for sensor RAW data output at 15fps or YUV output at 7.5fps. For higher speeds such as 5 megapixel
YUV @ 15fps, OmniVision recommends using the MIPI two-lane interface.
4 module specifications
4.1 package specifications
24.00
8.50
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8.50
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0.45
1.20
5.10
6.30
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7.40
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2 40
7.40
1 39
12.90
lens plastic
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4.3 connector information
The OV5640MRSL uses a 40-pin, 0.4 mm pitch flex cable connector. table 4-2 shows a listing of some recommended
connectors. en
table 4-2 recommended connectors
f stop f/2.8
focus range 10 cm → ∞
TV distortion <1%
parameter specification
lens diameter M 6 x 0.35mm
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revision history
• initial release
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website: www.ovt.com