Engineering 5331-Digital ASIC Design

Department of Electrical and Computer Engineering

Faculty of Engineering
2023 F

Instructor Information
Instructor: Yushi Zhou
Office Location: ATAC5010
E-mail: yzhou30@lakeheadu.ca
Office Hours: 1 hour/week time is W. 11:30 am-12:30 pm

Teaching Assistant (TA) Information: Zeke Sedor

Course Identification
Course Number: EELE5331
Course Name: Digital ASIC Design
Course Location: RB1021
Class Times: TTh 11:30 am – 1:00 pm (2023-09-05 to 2023-12-04)
Lab Times: Fri 11:30 – 1:00 pm (2023-09-05 to 2023-12-04)
Lab Location: RB1021
Study week: Oct. 09- Oct. 13
Prerequisites: Prefer background in electronic circuits and digital circuits

Course Description: This course deals with basic design of digital CMOS integrated
circuits. The design metrics of the digital integrated circuits will be covered. The DC and
transient behavior of a single CMOS transistor, including second-order effects will be
examined in detail. The manufacturing process of the CMOS and layout techniques will be
discussed. The characteristics of a CMOS inverter will be used as an example to start. A
number of design techniques for digital logic will be discussed in depth. The study of basic
logic gates as well as combinational and sequential circuits are covered extensively. The
concept of digital design flow, including RTL coding, functional/gate-level verification,
synthesis, place and route, etc. will be covered in this course. The interconnection of the
modules will be examined in detail. The arithmetic building blocks such as adders,
multipliers, MUX, etc. are studied. In addition, the hardware description language – Verilog
HDL will be introduced. The course requires labs, concentrating on the building of standard
cells and the use of industry standard sign-off tools. A course project is also required to be
submitted.

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Student Learner Outcome (SLO)
By the end of the course, the successful student will have a solid understanding of the
operations of the CMOS transistor, the impact from second order effect on the performance
of the transistor and how the layout technique affect the circuit performance. The student
will develop a good understanding of logic gate design techniques including the design and
implementation of arithmetic building blocks. The student will also be familiarized with the
computer-aided design tools (CAD) from Cadence, the design flow from schematic entry to
post-layout simulation, and the use of TSMC 180 nm process. The digital design flow
utilizing Cadence Genus and Innovus will be introduced in the course using free 45 nm
process. Function verification and post-simulation are done in Questa(Formally Modelsim).

Course Resources
Course Website(s)
• myCourseLink

Textbook: CMOS VLSI Design: A Circuits and Systems Perspective (Fourth Edition), Neil
H. E. Weste David M. Harris, ISBN-13: 978-0-321-54774-3
Reference : Digital Integrated Circuits: A design perspective (Second Edition), J. Rabaey,
A. Chandrakasan and B. Nikolic, Prentice Hall, ISBN 0-13-090996-3

Topics:
1. Introduction of MOS Logic (Chapter 1)
2. MOS Transistor Theory (Chapter 2)
3. CMOS Manufacturing and layout (Chapter 3 and some other materials)
4. Hardware Description Language - Verilog HDL
5. Delay of the logic circuits (Chapter 4 and extra materials)
6. Power consumption of the logic circuits (Chapter 5)
7. Interconnect (Chapter 6)
8. Combinational circuits (Chapter 9)
9. Sequential circuits (Chapter 10)
10. Data path (Chapter 11)
11. Memory (Chapter 12)
Assignments and Evaluations

Item Date(s) Value

Lab 1 Digital Circuits Syn and PnR TBD 2
Lab 2 MOSFET and Layout TBD 3
Lab 3 CMOS Inverter TBD 3
Lab 4 Digital Unit TBD 4
Project TBD 13
Mid-Term Test Oct. 05 30
Final Examination TBD 45
Total 100

• Examination date will be posted later. It is your responsibility of checking D2L

regularly to get updated information.
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 • To achieve a passing grade, student must pass both examinations and labs/project.
If students fail both examinations, the maximum marks will be 55.

Late Submissions

Labs: There are four labs in total. Short lab report for each lab should be submitted to lab
instructors on time. Late submission will result in 10% off per day from the corresponding
labs. Three days late submission leads to “ZERO” marks. Fail to submit the report will
automatically result in “ZERO” for this part.

Project: Course project will be assigned to student groups. Student groups will be organized
and each group contain maxim 2 students. If the total number of students is less than
15, project must be completed individually. Each group is required to submit a project
report. The report must be submitted to the instructor with scanned cover page through
mycourselink, including the signature from each of the group member and indicating which
part of the report they were responsible for in terms of design and writing the report, within
the time allocated by the instructor. Without signed cover page, the report will be given
“ZERO”. There is a 50% out of 100% per day penalty from the total marks of the project for
late submission. Therefore, if you are late by two days you will get a zero. Failure to
complete the project, a student will receive a grade of F in the course, i.e. a student will fail
the course.

Assignments
Assignments will not be marked. Solutions will be posted in D2L.

Course Policies
1. Students found to have plagiarized any portion of their labs and final project will
receive a grade of “ZERO” on the complete lab or project.
2. Project reports must be prepared in a single-column double-space format, and must
contain the followings:
a. File name: EELE5331_G#(here is your group number)_2023
b. Title page - Title of the project, authors' name, and course name. o
c. Abstract - Abstract of the project report.
d. Table of contents - list of chapters, sections, and subsections of the project
report.
e. List of figures - list of all figures in the project report.
f. List of tables - list of all tables in the project report.
g. Main body of the project report.
h. References - list of the books, journal papers, conference papers, and other
publications used in the project report. References must be listed using IEEE
reference styles. You need to take a look at IEEE Transactions on Circuits and
Systems I - Regular Papers and IEEE Journal of Solid-State Circuits for IEEE
reference styles on books, journal papers, conference papers, and technical
reports.
i. Appendices
j. Index - list of key words and their page number in the project report.

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 For details, please refer to the course project document.
3. All the reports must be typed. No hand writing content, including scanned hand-
written, or hand-drawn figures.
4. Please note group marks will be given to the group members.

Student Academic Integrity Statement:

I understand and agree that:

(1) Unless otherwise allowed by the course instructor, I must complete the assignments in
this course without the assistance of anyone else.

(2) Unless otherwise allowed by the course instructor, I must not access any sources or
materials (in print, online, or in any other way) to complete any course exam.

I further understand and agree that, if I violate either of these two rules, or if I provide any
false or misleading information about my completion of course assignments or exams, I
may be prosecuted under the Lakehead University Student Code of Conduct – Academic
Integrity, which requires students to act ethically and with integrity in academic matters
and to demonstrate behaviours that support the University’s academic values.

Copyright
Students should be aware that all instructional, reference, and administrative materials
prepared for this course are protected in their entirety by copyright. Students are expected
to comply with this copyright by only accessing and using the course materials for
personal educational use related to the course, and that the materials cannot be shared in
any way, without the written authorization of the course instructor. If this copyright is
infringed in anyway, students may be prosecuted under the Lakehead University Student
Code of Conduct – Academic Integrity, which requires students to act ethically and with
integrity in academic matters and to demonstrate behaviours that support the University’s
academic values.

Class Recordings
In this course, in the context of remote instruction and participation, video and audio
recordings of class activities will be made to ensure students’; and instructors’; easy and
comprehensive access to those activities. The recordings are confidential and are
intended *only* for the use of the course students and instructors. They may otherwise
*not* be used or disclosed. During recording, to protect others’; privacy, each student
should ensure that no one else is present in the location where they are being recorded
without that non-student’s consent. The recordings are made under the authority of
sections 3 and 14 of The Lakehead University Act, 1965.

Regulations
It is the responsibility of each student registered at Lakehead University to be familiar with,
and comply with all the terms, requirements, regulations, policies and conditions in the
Lakehead University Academic Calendar. This includes, but is not limited to, Academic
Program Requirements, Academic Schedule of Dates, University and Faculty/School
Policies and Regulations and the Fees and Refund Policies and Schedules (Lakehead
University Regulations webpage, 2020-21).

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Academic Integrity
A breach of Academic Integrity is a serious offence. The principle of Academic Integrity,
particularly of doing one’s own work, documenting properly (including use of quotation
marks, appropriate paraphrasing and referencing/citation), collaborating appropriately, and
avoiding misrepresentation, is a core principle in university study. Students should view
the Student Code of Conduct - Academic Integrity for a full description of academic
offences, procedures when Academic Integrity breaches are suspected and sanctions for
breaches of Academic Integrity.

Supports for Students – there are many resources available to support students. These
include but are not limited to:
• Health and Wellness
• Student Success Centre
• Student Accessibility Centre
• Library
• Lakehead International
• Indigenous Initiatives

Lakehead University is committed to achieving full accessibility for persons

with disabilities. Part of this commitment includes arranging academic accommodations for
students with disabilities and/or medical conditions to ensure they have an equitable
opportunity to participate in all of their academic activities. If you are a student with a
disability and think you may need accommodations, you are strongly encouraged to
contact Student Accessibility Services (SAS) and register as early as possible. For more
information, please contact Student Accessibility Services (SC0003, 343-8047
or sas@lakeheadu.ca)