Design Guidelines/Training Slides

QFE3320 Low/Mid-Band Tx
Front-end

80-NJ121-5 Rev. E

Confidential and Proprietary – Qualcomm Technologies, Inc.

Restricted Distribution: Not to be distributed to anyone who is not an employee of either Qualcomm
or its subsidiaries without the express approval of Qualcomm’s Configuration Management.
 Confidential and Proprietary – Qualcomm Technologies, Inc.
NO PUBLIC DISCLOSURE PERMITTED: Please report postings of this document on public servers or websites to: DocCtrlAgent@qualcomm.com.
Restricted Distribution: Not to be distributed to anyone who is not an employee of either Qualcomm or its subsidiaries without the express approval of Qualcomm’s
Configuration Management.
Not to be used, copied, reproduced, or modified in whole or in part, nor its contents revealed in any manner to others without the express written permission of Qualcomm
Technologies, Inc.
Qualcomm is a trademark of QUALCOMM Incorporated, registered in the United States and other countries. Qualcomm RF360 is a trademark of QUALCOMM Incorporated.
All QUALCOMM Incorporated trademarks are used with permission. Other product and brand names may be trademarks or registered trademarks of their respective owners.
This technical data may be subject to U.S. and international export, re-export, or transfer (“export”) laws. Diversion contrary to U.S. and international law is strictly prohibited.
Qualcomm Technologies, Inc.
5775 Morehouse Drive
San Diego, CA 92121
U.S.A.

© 2014 Qualcomm Technologies, Inc.

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Revision History (1 of 3)
Revision Date Description
A March 2014 Initial release
B June 2014 Slides 8, 12, 14, 15, 16, 25, 26, 27, 35, and 74: Updated QFE3320 schematic by removing LPF at MB
and replacing notch filter with LPF
Slide 9: Added column to table for WTR4905 and row for MSM8916
Slide 17: Updated QFE3320 capability for Filtering
Slide 20: Updated package from 135 pin to 134 pin
Slide 22: Added document 80-NL713-43 to table
Slide 28: Added new slide for Example Reference Design 2
Slides 31 and 32: Added column for Dime 80-NL713-43
Slide 46: Changed 2 nH to 68 nH
Slide 53: Changed 111 to 110 and 125 to 124 on package
Slide 57: Changed pins 93 to 92, 91 to 90, 101 to 100, 131 to 130 and 112 to 111
Slides 58, 64, 68, and 69: Updated plots
Slide 67: Updated pin numbers
Slide 78: Changed pins 133 to 132, 127 to 126, 108 to 107, 128 to 127, 96 to 95 and 116 to 115
Slides 82 and 83: Added Section 4.2 Dime Using WTR4905
C August 2014 Slide 64: Updated image and added notes
Slide 65: Updated title for Section 3.5
Slide 68: Updated image and added note on the top layer
Slide 69: Updated image

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Revision History (2 of 3)
Revision Date Description
D September 2014 Slide 7: Removed repeated reference to QFE3320
Slides 8–16: Added QFE3320-0 (ET) vs. QFE3320-1 (ET, APT + DPD) slides
Slide 19: Added MDM9x45 to the support matrix
Slide 20: Added the MDM9x45 and MSM8916 reference design schematics
Slide 24: Updated the ASM port assigned for HB
Slide 26: Corrected TDS to TD-SCDMA
Slide 30: Changed to QFE3320-0 package
Slide 31: Changed to QFE3320-1 package
Slide 33: Added 80-NP505-41, 80-NK807-42, and 80-NR113-42 to the list of references
Slide 39: Added note regarding shunt L to example diagram
Slide 42: Added regional 3DL CA port assignments (low-band)
Slide 43: Added regional 3DL CA port assignments (mid-band)
Slide 44: Updated Section 3 title from General Design Guidelines to QFE3320 ET General Design
Guidelines
Slide 68: Updated part name
Slides 69 and 70: Updated VPA power rail line
Slide 75: Updated the ground groupings diagram
Slide 77: Corrected the recommended distance to 285 µm
Slides 78–81: Changed to QFE3320-0
Slides 82–85: Added QFE3320-1
Slide 86: Added Section 4 QFE3320 EPT General Design Guidelines
Slides 90 and 91: Updated the VPA power rail line
Slide 93: Updated the VPA power rail line
Slide 95: Added a note and a callout about pin 89

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Revision History (3 of 3)
Revision Date Description
E October 2014 Slide 11: Clarified QFE3320 variants and removed pin 89 from QFE3320-1
Slide 14: Updated the slide title
Slide 15: Updated the slide title, pin 89, and pin 101
Slide 25: Added notes regarding LC matching for MB_ANT port
Slides 26‒27 and 38‒40: Added LC to block diagram
Slides 45 and 87: Clarified QFE3320 variants
Slide 69: Updated the QFE3320 VDD line
Slides 70 and 71: Updated the VPA power rail line
Slide 87: Updated section title to specific QFE3320-1
Slide 100 and 106: Updated the LC matching for ANT_MB
Slide 109: Updated the dime using WTR4905 design example

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Contents

1 Introduction 7
1.1 QFE3320-0 (ET) vs. QFE3320-1 (ET, APT + DPD) 9
1.2 Qualcomm Technologies, Inc. (QTI) Front-end with
QFE3320 18
1.3 QFE3320 – LB and MB Tx Front-end Device 22
1.4 QTI Support for the QFE3320 33
2 System-level QFE3320 Topics 35
2.1 Example Applications 36
2.2 Software-Defined RF Port Assignments 41
3 QFE3320-0 ET General Design Guidelines 45
3.1 RF Guidelines 46
3.2 Support Circuits 57
3.3 DC Power 66
3.4 Ground Connections 74
3.5 PCB Keep-out Areas (PCB KOAs) 77
4 QFE3320-1 EPT General Design Guidelines 87
4.1 Support Circuits 88
4.2 DC Power 90
4.3 Ground Connections 95
5 Specific Design Guidelines 97
5.1 Regional 2DL CA Using WTR3925 99
5.2 Dime Using WTR4905 108

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Section 1

1.1 QFE3320-0 (ET) vs. QFE3320-1 (ET, APT +

DPD) 9
1.2 Qualcomm Technologies, Inc. (QTI) Front-
end with QFE3320 18
Introduction 1.3 QFE3320 – LB and MB Tx Front-end
Device 22
1.4 QTI Support for the QFE3320 33

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 QFE3320 PA Power Management IC

The QFE3320 PA power management IC is a key component within the Qualcomm RF360™
front-end solution. Qualcomm RF360 is a multimode, multiband front-end that includes power amplifier, PA
power tracking, antenna switch, and antenna tuner ICs – the first truly global RF solution for LTE products.

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Section 1.1

QFE3320-0 (ET) vs.

QFE3320-1 (ET, APT + DPD)

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 Overview

 The 134 WLNSP QFE3320-0 device (with RR code=04) is a multimode, multiband power amplifier with
integrated low-band and mid-band antenna switches. It supports the following
 ET in high power mode (HPM) for FDD systems
 APT in other power mode

 The 133 WLNSP QFE3320-1 device (with RR code=00) is the same silicon but it can support the following
 ET in high power mode (HPM) for FDD systems
 APT + DPD in high power mode (HPM) for FDD systems
 APT in other power mode

 The only thing different between 134 WLNSP QFE3320-0 and 133 WLNSP QFE3320-1 is that one ground
pin (89) was removed from 134 WLNSP QFE3320 package

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 Summary of Changes from QFE3320

134 WLNSP – QFE3320-0 (ET support only) 133 WLNSP QFE3320-1 (ET & APT + DPD support)

Remove pin 89
(GND)

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 Impact

 New PCB boards design

 Use new PCB guidelines (pin 89 removed)
 Existing boards
 For ET, no changes are required*
 For EPT, need to change stencil to disconnect pin 89 from other pins

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 PCB: L1

New PCB guidelines

Thru view (Top)

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 QFE3320-0 Pin-map v2.0 (Complete Pin-map for 134 WLNSP)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TRX_ TRX_ TRX_ TRX_ ANT ANT TRX_ TRX_ TRX_ TRX_
GND TRX_MB5 MB1 MB2 MB3 MB4 _MB GND _LB LB4 LB3 LB2 LB1 GND GND

16 17 18 19 20 21 22 23 24 25 26 27
TRX_ TRX_ TRX_ TRX_ TRX_
GND GND GND MB6 GND MB7 MB8 GND LB6 GND LB5 GND

28 29 30 31 32 33 34 35 36 37 38 39 40
VDD_MB
GND GND GND _G_DA GND GND GND GND GND GND GND GND TRAP

41 42 43 44 45 46 47 48 49 50

DNC GND GND GND GND GND GND GND GND GND

51 52 53 54 55 56 57 58 59 60 61 62
VDD_MB VDD_MB VDD_LB VDD_LB VDD_LB
GND _U_PA _G_PA GND GND GND GND _G_DA DNC DNC _G_PA _G_PA

63 64 65 66 67 68 69 70 71 72 73
TX_ VDD_
MB5 GND GND GND 2P7 GND GND GND GND GND GND

74 75 76 77 78 79 80 81 82 83 84 85 86
TX_ TX_ TX_
MB4 GND GND GND GND GND GND GND GND GND GND LB5 LB4

87 88 89 90 91 92 93 94 95
TX_ VDD_MB VDD_LB TX_
MB3 GND GND _U_DA GND _U_DA GND GND LB3

96 97 98 99 100 101 102 103 104 105 106 107

TX_ VDD_MB TX_
MB2 GND GND GND _U_DA GND GND GND GND GND GND LB2

108 109 110 111 112 113 114 115 116 117 118 119
TX_ CP_ VDD_ IN_ IN_
GND MB1 NEG 1P8 GND MB2 GND LB3 GND GND GND GND

120 121 122 123 124 125 126 127 128 129 130 131 132 133 134
RFFE_ RFFE_ ANA IN_ IN_ IN_ VDD_LB TX_
GND GND CLK DATA _IO MB1 LB1 LB2 GND GND _U_PA GND LB1 GND GND

Low band Mid band Support DNC Power Ground

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 QFE3320-1 Pin-map V2.0 (Complete Pin Map for 133 WLNSP)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TRX_ TRX_ TRX_ TRX_ ANT ANT TRX_ TRX_ TRX_ TRX_
GND TRX_MB5 MB1 MB2 MB3 MB4 _MB GND _LB LB4 LB3 LB2 LB1 GND GND

16 17 18 19 20 21 22 23 24 25 26 27
TRX_ TRX_ TRX_ TRX_ TRX_
GND GND GND MB6 GND MB7 MB8 GND LB6 GND LB5 GND

28 29 30 31 32 33 34 35 36 37 38 39 40
VDD_MB
GND GND GND _G_DA GND GND GND GND GND GND GND GND TRAP

41 42 43 44 45 46 47 48 49 50

DNC GND GND GND GND GND GND GND GND GND

51 52 53 54 55 56 57 58 59 60 61 62
VDD_MB VDD_MB VDD_LB VDD_LB VDD_LB
GND _U_PA _G_PA GND GND GND GND _G_DA DNC DNC _G_PA _G_PA

63 64 65 66 67 68 69 70 71 72 73
TX_ VDD_
MB5 GND GND GND 2P7 GND GND GND GND GND GND

74 75 76 77 78 79 80 81 82 83 84 85 86
TX_ TX_ TX_
MB4 GND GND GND GND GND GND GND GND GND GND LB5 LB4

87 88 89 90 91 92 93 94 95
TX_ VDD_MB VDD_LB TX_
MB3 GND GND _U_DA GND _U_DA GND GND LB3

96 97 98 99 100 101 102 103 104 105 106 107

TX_ VDD_MB TX_
MB2 GND GND GND _U_DA GND GND GND GND GND GND LB2

108 109 110 111 112 113 114 115 116 117 118 119
TX_ CP_ VDD_ IN_ IN_
GND MB1 NEG 1P8 GND MB2 GND LB3 GND GND GND GND

120 121 122 123 124 125 126 127 128 129 130 131 132 133 134
RFFE_ RFFE_ ANA IN_ IN_ IN_ VDD_LB TX_
GND GND CLK DATA _IO MB1 LB1 LB2 GND GND _U_PA GND LB1 GND GND

Low band Mid band Support DNC Power Ground

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 QFE3320-0 and QFE3320-1

Old New

QFE3320-0
ET only
Sept 14

QFE3320
ET Sept 14
APT + DPD Oct. 14

QFE3320-1
ET and APT+DPD
Oct 14

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 QFE3320-0 and QFE3320-1

Items QFE3320-0 QFE3320-1

CS September 2014 October 2014
ET support YES YES
APT + DPD support NO YES
Attachment MDM9x3x MDM9x3x
MSM8994 MSM8994
MSM8916/MSM8936/MSM8939 (with WTR4905)
MSM8909 (with WTR2955)
HW ID v2.0 2.0 (no change)
Band support No change No change
Pin to pin compatible No change Different from QFE3320-0
(refer to slide 10)

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Section 1.2

Qualcomm Technologies,
Inc. (QTI) Front-end with
QFE3320

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 QTI Front-end Overview

QFE2340
QFE3320 LB/MB Tx front-end
ANT0_HB HB PA
(subject of this document)

TX_MHBa
Support TX_BB TX_DAC0
PRX_HBa TX_DAC1
RX_TXFB RX_TXFB_BB BB_RX_FB
PRX_MBb

Support

WTR Modem
TX_MHBb
3925 IC
ANT0_MLB
cpld QFE3320
MB
QFE
2520 LB

PRX_CA1_BB BB_RX_CH3
QFE1100

Support PRX_CA2_BB BB_RX_CH0

PA power

TX_LBc
Bypass
APT
PRX_LBc
ET EPT ANT1_HB

DRX_HBa
Support

DRX_MBb

ANT1_MLB
QFE1040

DRX_CA1_BB BB_RX_CH2
MB
QFE DRX_CA2_BB BB_RX_CH1
2550 LB

DRX_LBc

RxD SW
Simplified diagram highlights QFE devices/functions

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 Chipset Support Matrix

RF transceiver HB PA LB/MB Tx FE
Chipset/modem IC WTR3925 WTR3905 WTR4905 QFE2340 QFE3320 PMIC
MDM9x30 PMD9635
MDM8630   
MDM9230   
MDM9630   
MDM9x35M PMD9635
MDM9235M   
MDM9635M   
MSM8994     PM8994
MSM8916    PM8916
MDM9x45     PMD9645

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 Available Reference Designs

Baseband schematics RF schematic RF configuration

MDM9x30 WTR3925-based Regional 2DL CA
80-NJ115-41 80-NH379-43 includes:
MDM9x35M QFE1040 RxD SW
80-NH377-41
QFE1100 PA ET
MSM8994 QFE2520 antenna tuner
80-NJ051-49
QFE2550 antenna tuner
QFE2340 HB PA
QFE3320 LB/MB Tx front-end
MDM9x45 80-NR113-42 includes: Regional 3DL CA
80-NP505-41
QFE1040 RxD SW
QFE1100 PA ET
QFE2520 antenna tuner
QFE2550 antenna tuner
QFE2340 HB PA
QFE3320 LB/MB Tx front-end
QFE2340 HB PA
MSM8916 80-NL713-43 includes: Qualcomm RF360 CMCC China
80-NK807-42 QFE2550
QFE3320
QFE2340
QFE2101

Note: Each WTR-based reference design is compatible with all listed baseband reference designs.

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Section 1.3

QFE3320 – LB and MB Tx
Front-end Device

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 QFE3320 Low/Mid-band Tx Front-end (1 of 2)

TRX_MB8

TRX_MB6
TRX_MB5
TRX_MB4
TRX_MB3
TRX_MB2

TX_MB1
TX_MB2
TX_MB3
TRX_MB7

TX_MB4
TX_MB5
TRX_MB1
QFE3320 VDD supply pads
RFFE_DATA
Digital IOs &
RFFE_CLK
digital core

IN_MB2
bypass DA
MB_ANT
PA IN_MB1
SP9T (MB)

DA

GSM ‘high’ band DA

PA
GSM low band DA
PA

LB_ANT DA IN_LB3
SP7T (LB)

PA
IN_LB2
bypass DA IN_LB1
TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3
TRX_LB2
TRX_LB1

ANA_IO
TX_LB1
TX_LB2
TX_LB3
TX_LB4
TX_LB5
Bias
GND pads circuits CP_NEG

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 QFE3320 Low/Mid-band Tx Front-end (2 of 2)

Airlink technologies supported

 3GGP2 (1x, DO)
 3GPP (GSM/EDGE, WCDMA, DC-HSPA+, TD-SCDMA, and TDD/FDD-LTE)
Advanced RF techniques supported
 DSDA, UL CA, SVLTE, or SVDO with additional PA and WTR

 B4 UL + B4/B17 DL CA

 B17 UL + B4/B17 CA with external discrete B17 PA

Available gain states and supported PA power tracking

 High-power mode (HPM) – Envelope tracking (ET)

 Medium-power mode (MPM) – Average power tracking (APT)

 Low-power mode (LPM) – APT

 Ultra-low power mode (ULPM) – APT

Highly integrated
 Industry’s smallest PA and antenna switch device

 Integrates matching components and DC blocking capacitors

 Multiple amplifier stages (bypass, driver, power) and selectable paths

Fabrication technology
 CMOS fabrication process allows higher integration

Package
 Small, thermally efficient, and low-profile 134B wafer-level nanoscale package (WLNSP)

 4.39 × 5.99 × 0.55 mm; 0.4 mm pitch

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 QFE3320 Input/Output Ports

See the reference design for port mapping.

Notes:
 LC at MB_ANT is required for impedance matching for MB_ANT and TRX_MBx ports instead of harmonic suppression.
 In case the HB path goes through the QFE3320 ASM, add a shunt L close to the TRX port (example slide 38).
8 MB ASM 5 MB PA
input ports output ports

TX_MB1
TX_MB2
TX_MB3
TX_MB4
TX_MB5
TRX_MB8

TRX_MB6
TRX_MB5
TRX_MB4
TRX_MB3
TRX_MB2
TRX_MB7

TRX_MB1
QFE3320 VDD supply pads
RFFE_DATA
Digital IOs &
RFFE_CLK
digital core

IN_MB2
bypass DA
MB_ANT 2 MB input
PA IN_MB1 ports
SP9T (MB)

DA

2 antenna GSM mid band DA

output ports PA
GSM low band DA
PA

LB_ANT DA IN_LB3
SP7T (LB)

PA
IN_LB2 3 LB input
bypass DA IN_LB1 ports
TRX_LB2
TRX_LB1
TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3

ANA_IO
TX_LB4
TX_LB5
TX_LB1
TX_LB2
TX_LB3

Bias
GND pads circuits CP_NEG

6 LB ASM 5 LB PA
input ports output ports
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 QFE3320 – GSM/EDGE Paths + Integrated LB/MB Low-pass Filter

TRX_MB8

TRX_MB6
TRX_MB5
TRX_MB4
TRX_MB3
TRX_MB7

TRX_MB2

TX_MB1
TX_MB2
TX_MB3
TX_MB4
TX_MB5
TRX_MB1
QFE3320 VDD supply pads
RFFE_DATA
Digital IOs &
RFFE_CLK
digital core

IN_MB2
bypass DA
MB_ANT
PA IN_MB1
SP9T (MB)

DA

GSM mid band DA

GSM must use
PA
IN_MB1 and
GSM low band DA
IN_LB3
PA

LB_ANT DA IN_LB3
SP7T (LB)

PA
IN_LB2
bypass DA IN_LB1
TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3
TRX_LB2
TRX_LB1

TX_LB1 ANA_IO
TX_LB2
TX_LB3
TX_LB4
TX_LB5
Bias
GND pads circuits CP_NEG

Dedicated GSM LPF

Low-pass filter to suppress for MB/LB Dedicated GSM PA paths
(LB and MB)
LB harmonics

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 QFE3320 – UMTS/LTE/CDMA/TD-SCDMA Paths

The UMTS/LTE/CDMA/TD-SCDMA power amplifier has a total of four gain states that can support ET and APT.

Gain 0 (HPM) – ET mode

Gain 1 (MPM) – APT mode Gain 2 (LPM) – APT mode
Gain 3 (ULPM) – APT mode
TRX_MB8

TRX_MB6
TRX_MB5
TRX_MB4
TRX_MB3
TRX_MB2

TX_MB1
TX_MB2
TX_MB3
TX_MB4
TX_MB5
TRX_MB7

TRX_MB1
QFE3320 VDD supply pads
RFFE_DATA
Digital IOs &
RFFE_CLK
digital core

IN_MB2
DA
bypass
MB_ANT
IN_MB1
SP9T (MB)

PA DA UMTS/LTE/CDMA2000
input port
GSM ‘high’ band
PA DA
(LB: GSM/UMTS/LTE/
GSM low band CDMA2000 share same
PA DA input port)

LB_ANT IN_LB3
PA DA
SP7T (LB)

IN_LB2
bypass IN_LB1
DA
TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3
TRX_LB2
TRX_LB1

ANA_IO
TX_LB1
TX_LB2
TX_LB3
TX_LB4
TX_LB5

Bias
GND pads circuits CP_NEG

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 QFE3320 Features
Feature QFE3320 capability
RF operating modes and • LB and MB support for GSM, 3GGP2 (1x, DO), and 3GPP (WCDMA, DC-HSDPA, TD-SCDMA,
bands FDD-LTE, and TDD-LTE)
• MB, multimode • See the next page for supported mode and band combinations
• See modem IC documentation for air interface support details
Highly integrated • One of the smallest PA + antenna switch footprints in the industry
• Integrates key RFFE components, matching components, and DC blocking capacitors
Integrated RFFE functions Multiple amplifier stages (bypass, driver, and power) and selectable paths
• Amplifiers and their • Driver and power amplifiers; three input and five output LB ports; two input and five output MB ports
switches • Dedicated GSM LB and MB power amplifiers
• Filtering • Harmonic notch filter at LB antenna port
• Dedicated low-pass filters in GSM LB and MB paths, plus LB harmonic notch filter
• Antenna switch • Overall 16-port switch: SP_7T at LB, SP_9T at MB
• Duplexer Rx/Tx ports – six LB, eight MB; GSM Tx inputs (internal): one LB and one MB
• Antenna ports – one LB and one MB
High efficiency • QTI Tx system optimizes high-power performance using predistortion and power tracking
 Support for ET, EPT with DPD, and APT
• Bypass paths yield high efficiency at lower output power levels
• Low supply voltages save battery current and allow SMPS source for greater power savings
• Improved biasing techniques for extended linearity performance
• Low leakage current in deep-sleep mode
Digital interface MIPI_RFFE; efficient initialization, status, and control
Fabrication technology CMOS fabrication process allows higher integration than GaAs, plus the benefits of CMOS scale
Package • Small, thermally efficient, and low-profile 134 WLNSP: 4.39 × 5.99 × 0.55 mm
• Low impedance grounding, improved electrical performance, and thermal continuity

Sec. 1.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 28
 QFE3320 Supported Air Interfaces and Bands – Low-bands

Air interface support

Band designator 3GPP2 3GPP
Band GSM 3GPP2 3GPP GSM 1x/DOrA DOrB WCDMA DC-HSPA+ FDD LTE TDD LTE TD-SCDMA
Cell (850) G850 0 5 X X X X X X – –
EGSM (900) G900 – 8 X – – X X X – –
700 lower A-C – – 12 – – – – – X – –
700 upper C – – 13 1 – – – – – X – –
700 lower B-C – – 17 – – – – – X – –
B18 – – 18 – – – – – X – –
B19 – – 19 – – – X X X – –
EU800 – – 20 – – – – – X – –
B26 – – 26 – – – – – X – –
B28 – – 28 – – – – – X – –
2nd 800 – 10 – X X – – – – –

Notes:
1. The internal QFE PA does not support B13, but its antenna switch can be used to route B13 Tx/Rx as shown on the Example
Reference Design – Regional 2DL CA using the WTR3925 Device page.
2. Advanced RF techniques supported by the QFE3320 are discussed on the QFE3320 Low/Mid-band Tx front-end page.

Sec. 1.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 29
 QFE3320 Supported Air Interfaces and Bands – Mid-bands
Air interface support
Band designator 3GPP2 3GPP
Band GSM 3GPP2 3GPP GSM 1x/DOrA DOrB WCDMA DC-HSPA+ FDD LTE TDD LTE TD-SCDMA
IMT (2100) – 6 1 – X X X X X – –
PCS (1900) G1900 1 2 X X X X X X – –
DCS (1800) G1800 – 3 X – – X X X – –
AWS – 15 4 – X X X X X – –
E1900 – – 25 – – – X X X – –
B34 – – 34 – – – – – – X X
B39 – – 39 – – – – – – X X

Sec. 1.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 30
 QFE3320-0 Package

 134 pin wafer-level nano-scale package (134 WLNSP)

 4.39 × 5.99 mm outline, 0.55 mm maximum height
 0.40 mm pitch

Sec. 1.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 31
 QFE3320-1 Package

 133 pin wafer-level nano-scale package (133 WLNSP)

 4.39 × 5.99 mm outline, 0.55 mm maximum height
 0.40 mm pitch
 Pin 89 does not exist in QFE3320-1 package

Sec. 1.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 32
Section 1.4

QTI Support for the

QFE3320

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 Reference Documents

Document # Document title or description

QFE3320 primary documents
80-NJ121-1 QFE3320 Low/Mid-Band Tx Front-end Device Specification (Advance Information)
80-NJ121-4 QFE3320 Low/Mid-Band Tx Front-end - Device Revision Guide
80-NJ121-5 QFE3320 Low/Mid-Band Tx Front-end Design Guidelines/Training Slides (this document)
Compatible modem ICs – Device specifications are listed; other primary documents are referenced within Chapter 1 of the device
specifications
80-NJ115-1 MDM8630/MDM9230/MDM9330/MDM9630 Device Specification
80-NH377-1 MDM9235M/MDM9635M Device Specification
80-NJ051-1 MSM8994 Device Specification (Advance Information)
RF reference schematics
80-NH379-43 WTR3925 + Qualcomm RF360 Regional 2DL CA - Preliminary Reference Schematic
80-NL713-43 WTR4905 with Qualcomm RF360 5-Mode CMCC China Optimized - Preliminary Reference Schematic
80-NR113-42 WTR3925 + WTR4905 + Qualcomm RF360 Global 3DL CA - Preliminary Reference Schematic
Baseband reference schematics
80-NJ115-41 MDM9x30 + PMD9635 Reference Schematic
80-NH377-41 MDM9x35M + PMD9635 Reference Schematic
80-NK307-41 APQ8094 Liquid Tablet Preliminary Design Reference Schematic
80-NP505-41 MDM9x45 + PMD9645 Reference Schematic
80-NK807-42 MSM8916 + PM8916 Preliminary Reference Schematic

Sec. 1.4 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 34
Section 2

System-level QFE3320 2.1 Example Applications

2.2 Software-Defined RF Port Assignments
36
41

Topics

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Section 2.1

Example Applications

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 Example Reference Design 1 – Regional 2DL CA Using the WTR3925 Device
QFE2340
B40 RX
PRX_HB3
ANT0_HB B41 B38,41 B38,41 RX
PRX_HB4
B38
B40 B40
Note 1: QFE3320 can support LTE B8 in B30 B30
B7,30,
38/41,40 TX_MHB2
B7 B7
standalone mode only. This design supports LTE B11/B21 Support
B32 B7 PRX
2DL CA with B3 + B8 only when the UL is in B3. B11/B21
B30 PRX
PRX_HB1
PRX_HB2
A satellite B8 PA is needed if UL support on B8 is B32
B11/21
TX_MHB1
required. TX_FBRX_P
TX_FBRX_M TX_FBRX
B39 B11/21,32,34,39 PRX PRX_MB2
B1 PRX
PRX_MB5
Note 2: QFE3320 can support LTE B12/17 in BALUN TX_FBRX_P
TX_FBRX_Q
B34
B1,3
B3/9 PRX
PRX_MB3
standalone mode only. This design supports LTE Note 1 B4 PRX
PRX_MB4
Note 2 B2,4
2DL CA with B4 + B12 and B4+B17 only when B2,25 PRX
PRX_MB1
B25
the UL is in B4. A satellite B12/17 PA is needed if B34/B39
UL support on B12/17 is required. TX_HMLB1
TX_HMLB2
Support
B1,2,3,4,25,34,39 TX_MHB3
G1800,G1900 TX_MHB4

ANT0_MLB
cpld QFE3320 WTR3925
MB
QFE
2520 LB
B5,18,19,26,8,20,28,
GSM LB
TX_LB1
TX_LB2
B12/17
TX_LB4

Note 1
B8,29
B8 PRX
B28B PRX_LB1

B20,28A B28,29 PRX

PRX_MLB6
QFE1100

Support
B5,18,19,26 B20 PRX
PA power

Bypass PRX_LB3
B5/B18/B19/B26 PRX
B12/17 PRX_LB4
APT
Note 2
B12/17,13 PRX
ET PRX_LB2
B13
B13
TX_LB3
ANT1_HB B7 B7 DRX DRX_HB1
B41
B38,41 DRX
Legend: B38 DRX_HB4
B30 B30 DRX
TX path DRX_HB2
B40 B40 DRX DRX_HB3
RX path

Support
B11,21,32 B32 B11,21,32,
39 DRX
TRX path B11,21 DRX_MB2
B39
B34,39
TX_FBRX path B34 B2/25,34 DRX
B2/B25 DRX_MB1
B2/25,4
ANT1_MLB B4 DRX DRX_MB4
QFE1040

B1 DRX
B1,3/9 DRX_MB5
MB B3/9 DRX
QFE DRX_MB3
B28A
2550 LB B28B B28,29 DRX
DRX_MLB6
B29
B8 B8 DRX
DRX_LB1
B12/B17 B12/B17,13 DRX
B13 DRX_LB2
B20 B20 DRX
DRX_LB3
B5/B26 B5/B18/B19/B26 DRX DRX_LB4

GNSS
GNSS_L1

Sec. 2.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 37
 Regional 2DL CA Routing Example
Diversity and GNSS are not shown (they are not supported by QFE3320).
QFE2340
B41A/B/C Rx
B41A PRX_HB3
ANT0_HB B41B B40 Rx
PRX_HB2
B41C
B40 B7,38,40,
41,WCS
TX_MHB2
WCS
Support TX_BB TX_DAC0
B7 PRX_HB1
PRX_HB4 TX_DAC1
B11,21
TX_MHB1
B11/B21
RX_TXFB RX_TXFB_BB BB_RX_FB
B39 B11,21,34,39
PRX_MB2
B1
PRX_MB5
B34 B3
PRX_MB3
B1,3 B4
PRX_MB4
B2,4 B2,25
PRX_MB1 B34,39
B25

TX_HMLB1
TX_HMLB2
WTR Modem
Support B1,2,3,4,
25,34,39 TX_MHB3 3925 IC
TX_MHB4
G1800,1900
ANT0_MLB
cpld QFE3320
MB
QFE TX_LB1
2520 LB
PRX_CA1_BB BB_RX_CH3
G850,G900 &
TX_LB2
B5,8,18,19,20,26,28
B12,17 PRX_CA2_BB BB_RX_CH0
TX_LB4

B8,29
RED = B1 using ANT_0 and QFE3320 MB B28B
B8
PRX_LB1

B20,28A B28,29
GRN = B5 using ANT_0 and QFE3320 LB PRX_MLB6
B5,18,19,26 B20
PRX_LB3
VIO = B5 Tx FB from ANT_0 B12,17
B5,18,19,26
PRX_LB4
B12,13,17
PRX_LB2
B13
B13
TX_LB3

Sec. 2.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 38
 Routing Examples – Regional 2DL CA
QFE2340
B41A/B/C Rx
B41A PRX_HB3
ANT0_HB B41B B40 Rx
PRX_HB2
B41C
B40 B7,38,40,
41,WCS
TX_MHB2
WCS
Support TX_BB TX_DAC0
B7 PRX_HB1
PRX_HB4 TX_DAC1
B11,21
TX_MHB1
B11/B21
RX_TXFB RX_TXFB_BB BB_RX_FB
B39 B11,21,34,39
PRX_MB2
B1
PRX_MB5
B34 B3
B1,3 PRX_MB3
B4
PRX_MB4
B2,4 B2,25
PRX_MB1
B25
B34
B39 TX_HMLB1
TX_HMLB2
WTR Modem
Support B1,2,3,4,
25,34,39 TX_MHB3 3925 IC
TX_MHB4
G1800,G1900
ANT0_MLB
cpld QFE3320
MB
QFE
2520 LB TX_LB1
PRX_CA1_BB BB_RX_CH3
G850,G900
B5,18,19,26,8,20,28 TX_LB2
B12,17 PRX_CA2_BB BB_RX_CH0
TX_LB4
RED = B1 using ANT_0
B8,29
GRN = B5 using ANT_0 B28B
B8
PRX_LB1

B20,28A B28,29
PRX_MLB6
VIO = B8 Tx FB from ANT_0 B5,18,19,26 B20
PRX_LB3
B5/B18/B19/B26
B12,17 PRX_LB4
B12,13,17
PRX_LB2
B13
B13
TX_LB3
ANT1_HB
B7 B7, B41C
B41C DRX_HB1
B41B B41B DRX_HB2
B41A B41A DRX_HB3
B40 DRX_HB4
Support

WCS DRX_CA1_BB BB_RX_CH2

B11/B21 DRX_MB2
B39
B34 DRX_CA2_BB BB_RX_CH1
B2/B25 DRX_MB1
ANT1_MLB B4 DRX_MB4
QFE1040

B1 DRX_MB5
MB
QFE B3 DRX_MB3
B28A
2550 LB B28B DRX_MLB6
B29
B8 DRX_LB1
B12/B17
B13 DRX_LB2
B20 DRX_LB3
B5/B26 DRX_LB4

GNSS
GNSS_L1 GNSS_BB GNSS_BB

Sec. 2.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 39
 Example Reference Design 2 – Dime Using WTR4905
QFE2340
B38/B41
B40 B40
PRX_HB1
B7/B38/
B40/B41
B38/B41 TX_DA3

B7/B38/B41
B7 PRX_HB2

B34 B34/B39
PRX_MB1
B39
Shunt L required for all HB at B4/B2/BC1/G1900
PRX_MB2
close to QFE3320 TRx port
B3/BC6/B3/G1800
PRX_MB3

QFE2101
PA power
tracking
WTR4905
Support
B1/B2/B3/B4/
B34/B39/GHB
TX_DA1
ANT_0 QFE2550
Support
HB
QFE3320
TX_FBRX TX_FBRX
Tuner
LB
B5/BC0/B8/
B20/B26/GLB
TX_DA2
TX_FBRX
B17/B28
TX_DA4

B5/BC0/B26/G850
PRX_LB3
B8/G900
PRX_LB2

B17

B28a
B17/B20/B28
PRX_LB1
B28b

B20
B8 B8
DRX_LB3
B5/BC0/B26 B5/BC0/B26
DRX_LB2
B17
B28 B17/B20/B28
DRX_LB1
B20
ANT_1 QFE2550
B34/B39
Support B2/BC1/B3/B34/B39
B2/BC1 DRX_MB2
Tuner B3
B1/BC6/B4 B1/BC6/B4
DRX_MB1
B7
B7/B38/B41
B38/41 DRX_HB2
B40 B40
DRX_HB1
GNSS
GNSS_IN

Sec. 2.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 40
Section 2.2

Software-Defined RF Port
Assignments

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 General Port Mapping Guidance

Always refer to the applicable reference schematics for the latest port mapping – especially when starting a
new product design.
 Port assignments for each QTI reference design are included within the application-specific design guidelines
section.
 In the port assignment tables, entries within a single cell that are in different rows cover different frequency ranges.
 This requires some type of hardware to separate the bands – switched filters, duplexers, etc.
 A summary of all port assignments (for non-advanced techniques) available at the time of this document’s
release is given on the QFE3320 RF Port Assignment Summary – Low-band and QFE3320 RF Port
Assignment Summary – Mid-band pages.

Sec. 2.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 42
 QFE3320 RF Port Assignment Summary – Low-band

RF port Regional 2DL CA Dime Regional 3DL CA TBD

Document # 80-NH379-43 80-NL713-43 80-NR113-42

IN_LB1 NC – B5/B6/B19/B26,
B20, B28
IN_LB2 B12, B17 B17, B28 B18
IN_LB3 G850, G900, B5, B8, B20, G850, G900
B5, B8, B18, B19, GSM800, GSM900
B20, B26, B28, BC10
TX_LB1 B12, B17 B5, B26 B18
TX_LB2 B5, B18, B19, B26 B8 B20, B28A
TX_LB3 B20, B28A B20 B5/B26
TX_LB4 B28B B28B B28B, B29
TX_LB5 B8 B17, B28A NC
TRX_LB1 B13 B8 B28B
TRX_LB2 B20, B28A B20 B20, B28A, B18
TRX_LB3 B28B B28B B13
TRX_LB4 B8, B29 Rx B17 B12, B17
TRX_LB5 B5, B18, B19, B26, BC10 B5, B26 B5/B26
TRX_LB6 B12, B17 B28A B8

Note: These port assignments reflect the latest reference schematics available at the time of this document’s release. Always
refer to the applicable reference schematics for the latest port mapping. Any deviation from these recommendations has not
been tested by QTI.

Sec. 2.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 43
 QFE3320 RF Port Assignment Summary – Mid-band

RF port Regional 2DL CA Dime Regional 3DL CA TBD

Document # 80-NH379-43 80-NL713-43 80-NR113-42
IN_MB1 GSM1800, GSM1900 B1, B2, B3, B4, B39 G1800, G1900
G1800, G1900
IN_MB2 B1, B2, B3, B4, – B1, B2, B3/B9,
B25, B34, B39 B4, B25, B34, B39
TX_MB1 B25, B34, B39 – B34, B39, B25
TX_MB2 B1 B1 B1
TX_MB3 B3 B3 B3
TX_MB4 B4 B4 B4
TX_MB5 B2 B2 B2
TRX_MB1 B39 Rx B40 B34
TRX_MB2 B34 Rx B7 B39
TRX_MB3 B2, B4 B3 B2, B4
TRX_MB4 – B4 B41 HORXD
TRX_MB5 B34 Tx, B39 Tx B41 B34, B39
TRX_MB6 – B1 NC
TRX_MB7 B25 B2 B25
TRX_MB8 B1, B3 B34/B39 Rx B1, B3

Note: These port assignments reflect the latest reference schematics available at the time of this document’s release. Always
refer to the applicable reference schematics for the latest port mapping. Any deviation from these recommendations has not
been tested by QTI.

Sec. 2.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 44
Section 3

3.1 RF Guidelines 46

QFE3320-0 ET General 3.2

3.3
Support Circuits
DC Power
57
66
3.4 Ground Connections 74
Design Guidelines 3.5 PCB Keep-out Areas (PCB KOAs) 77

Applicable to all chipsets, applications, and RF

configurations

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Section 3.1

RF Guidelines

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 46
 QFE3320 Input/Output Ports

PA shield area Locate matching networks and/or filters as

Duplexers, filtering, and/or matching as needed
needed for each band within PA shield area

TRX_MB8

TRX_MB6
TRX_MB5
TRX_MB4
TRX_MB3
TRX_MB2

TX_MB1
TX_MB2
TX_MB3
TX_MB4
TX_MB5
TRX_MB7

TRX_MB1

matching as needed
Filtering and/or
IN_MB2
bypass DA
MB_ANT
Match
PA IN_MB1

WTR3925 shield area

to/from antenna diplexer

DA

MB SP_9T GSM high band DA

antenna PA
switches GSM low band DA
LB SP_7T
PA

matching as needed
Filtering and/or
LB_ANT DA IN_LB3
Match
PA
IN_LB2
bypass DA IN_LB3
TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3
TRX_LB2
TRX_LB1

TX_LB1
TX_LB2
TX_LB3
TX_LB4
TX_LB5

Unused ports (if any)

Duplexers, filtering, and/or matching as needed
= no connect (NC)

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 47
 General RF Layout Techniques (1 of 3) Microstrip
50 Ω single-ended coplanar 50 Ω single-ended
stripline traces ground fill microstrip traces

50 Ω single-ended
stripline traces

L3 C2
QFE RFIC L3
50 Ω single-ended Ground via
L4
microstrip traces

C2
L4
50 Ω single-ended Stripline
stripline traces coplanar
ground fill

RF microstrip QFE device

GND

GND
GND

GND
RF

RF
L C
L1
L2
L3
L4

L5
L6 RF stripline
L7
L8

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 48
 General RF Layout Techniques (2 of 3)

 All RF traces must use controlled-impedance techniques – microstrip or stripline – designed to provide
50 Ω single-ended (nominal) and baseband differential (nominal). Stripline provides higher isolation since it is
surrounded by ground planes. Avoid frequent transitions between layers.
 If needed, the areas directly below all component pads and signal traces are cleared of metal on layer 2 to
minimize parasitic capacitance (not shown).
 Inductors should be placed in ways that limit mutual coupling (where appropriate).
 The complementary paths within each differential pair should be as symmetrical as possible to preserve
their phase balance and maintain common-mode rejection.
 Where possible, isolate matching components and traces from all other circuits and traces using
coplanar ground fill.
 Trace capacitances between RFIC pins and matching components should be kept very low. This
allows the following technique:
 Some portions of traces between the RFIC pin and its matching element do not need to be 50 Ω, but could be routed using
minimum-width traces with the associated ground cleared.
 If this technique is used, ensure the thin trace is electrically short, that it is not exposed to noise sources, and that the RF
ground plane is not chopped up.

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 49
 General RF Layout Techniques (3 of 3)

 Avoid routing other Rx signal traces parallel with Tx signals.

 For adequate Tx-to-Rx isolation, the Tx and Rx signals must be isolated from each other.
 Avoid routing audio, digital, or switching analog signals (such as SMPS) adjacent to the Tx signals.
 Some extra components may be included in initial layouts to increase matching flexibility, but might
prove unnecessary after careful testing and evaluation.
 Any ground connections at matching components must follow specific RF grounding guidelines:
 The ground side of the RF components must connect as directly as possible to the nearest ground reference and should
connect to multiple ground fills on multiple layers to provide the best grounding.
 Do not allow long, thin traces to connect RF components to ground. The added trace inductance could disrupt circuit
performance.
 QTI recommends using microvias from the ground pads directly to the PCB ground plane.
 A total ground inductance of less than 100 pH is desired. If direct microvias are not possible, several parallel vias are
recommended to reduce the overall inductance.

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 General Status and Control Guidelines

The QTI antenna switches are all controlled by the modem IC using the industry standard MIPI_RFFI interface.
 See the Support Circuits section for design guidelines.

Other RF front-end devices (quad-band GSM PA, discrete PAs, switches, etc.) are also controlled by the
modem IC, but implementation details depend on the application and RF configuration.
 See WTR3925/WTR3905/WTR3900 RF Transceiver – Design Guidelines/Training Slides (80-NH379-5A) for
details.

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 PA Power Tracking – QFE1100

 The objective of advanced power management techniques such as ET, APT, and enhanced power tracking
(EPT), is to improve DC-to-RF efficiency over a wide range of Tx power levels.
 Higher efficiency → less power dissipation → less heat generated → longer battery life
 Efficiency is greatly improved using these advanced techniques.
 Recommended QTI documents for further study:
 QFE1100/QFE1101 PA Power Management IC Design Guidelines (80-NA681-5)

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 RF Top-level Parts Placement (1 of 2)

HB RFFE
shield area LB/MB RFFE
shield area

QFE3320

QFE2340

WTR3925
WTR3925
This example is based on an in-house
shield area design that is similar to 80-NH379-43

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 53
 RF Top-level Parts Placement (2 of 2)

1. Place the RF section towards the top edge, since the antennas are in that direction.
2. The three RF shield areas are: WTR3925, HB RFFE, and LB/MB RFFE (including the QFE3320 device).
3. The digital devices and traces must not be placed near the antenna because they generate noise that
could couple onto antennas, degrading Rx and Tx performance (self-jamming/spurs).
4. Locate PMIC(s) and associated power management circuitry – especially SMPS circuits – far from the
RF circuits.
5. Locate Rx sections away from antenna feed points and antenna extension paths. If the antenna is
over Rx circuits, strong Tx signals can severely degrade sensitivity (depending on shield isolation and
antennas).
6. Likewise, locate Tx sections away from antenna feed points and extension paths to limit transmitter
noise coupling.
7. Locate QFE1100 PA power management circuits near the PAs – on the backside in the example.
8. Allow space for shields. Specific shielding guidelines are given on the following slides.

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 54
 Shielding Recommendations (1 of 2)

Other shield areas not shown:

 Modem IC and digital circuits HB RFFE LB/MB RFFE shield area
shield area
 Power management circuits
 QFE1100 (backside)
 Diversity RFFE (backside)
 Feedback Rx (backside)
QFE3320
 GNSS (topside, lower right)

Board-to-board connector on backside

Board-to-board connector on backside

in this direction for digital baseband &
in this direction for digital baseband
and power management circuits

2340
QFE

power management circuits

WTR
3925
This example is based on an
in-house design that is similar
to 80-NH379-43. This
example is based on the
Regional 2DL CA reference
WTR3925 design. See the Specific
shield area Design Guidelines chapter for
more details about this
application and others.

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 Shielding Recommendations (2 of 2)

 Shield the following:

 WTR3925 and its RF matching components
 DRx RFFE
 Transmit output chains with associated PAs, duplexers, and switches – low-band/mid-band area including the QFE3320
device and the high-band area including the QFE2340 device
 Digital circuits (including modem IC, memory devices, etc.)
 Power management circuits
 PA power tracking circuits
 Metal cans are better than metalized plastic.
 Keep PRx matching separate from duplexers and PAs to preserve Tx-to-Rx isolation.
 Do not locate matching inductors too close to shield walls.
 This may cause EM coupling and inductor de-Q.

Sec. 3.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 56
Section 3.2

Support Circuits

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 QFE3320 GSM Trap External Inductor

GSM low band DA

PA

LB_ANT DA IN_LB1
PA

TRX_LB6
TRX_LB5
TRX_LB4
TRX_LB3
TRX_LB2
TRX_LB1
QFE3320
TRAP

(LB portion)

40
L500 Reserve 0 Ω resistor on the board in case of
0Ω
external inductor supplements on-chip
components to suppress GSM LB harmonics
Locate next to pin 40; route
directly on surface layer

L500
Ground via

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 Support Circuits – Digital and Analog Overview

 Each power amplifier IC has similar digital and analog support functions.
 Associated pin names are shown here, and pertinent details are provided on the following pages.

QFE2340 QFE3320
— CP_NEG

R_EXT ANA_IO

Analog support
VDD_PA VDD_PA (x5)
Amps’ DC power
Bypass / VPA
Charge pump

QFE1100
VDD_DA VDD_DA (x5) filtering
HKADC
VDD_BIAS — VPA_VBATT
R/C tuner
General biasing VDD_MASTER VDD_2P7 2.7 V

PMIC
VDD_DIG VDD_1P8 1.8 V
Digital support
Digital IOs
SDATA SDATA RFFEx_DATA

Modem IC
Digital core

Clock pulse SCLK SCLK RFFEx_CLK

generator

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 Support Circuits – Regional-type MIPI_RFFE Digital Interfaces

PMD9635 PM8994
VREG_L15 (1.8 V) TBD
QFE and modem ICs use the same digital
VREG_L6 (1.8 V) TBD
I/O pad voltage to ensure logic compatibility

QFE3320 Modem IC PMIC

VDD_DIG
C583
100 pF VDD_P3 TBD

R1
Digital support
SDATA zero GPIO_72
TBD
Digital IOs MIPI_ MIPI_ RFFE2_DATA

DNI
C1
Digital core RFFE RFFE 10 pF R2
Core I/O SCLK zero GPIO_73
Clock pulse TBD
RFFE2_CLK

DNI
generator C2
10 pF
MDM9x30/
MSM8994
QFE2340 VDD_DIG MDM9x35M
C164
100 pF

R3
zero Reserve space for RC filter near
SDATA
each set of QFE pins; see details
DNI

C3
10 pF R4 on Antenna Coupling onto
zero MIPI_RFFE Interfaces page
SCLK
DNI

C4
10 pF

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 MIPI_RFFE

 The number of devices on an MIPI_RFFE bus are limited by the standard.

 Two requirements must be met (per the standard):
 Maximum capacitive load = 50 pF total
 Maximum number of slave devices = 15 (each slave must have a different PRODUCT_ID)
 Due to routing limitations, the QFE RFFE ports need to be located within 15 cm of the RFFE bus port on the modem IC.
Note: This is somewhat flexible when fewer devices are on the bus and when their load capacitance is low.
 The Regional 2DL CA with WTR3925 uses the RFFE2 interface for six devices (as shown):

L/MB PA HB PA
QFE3320 QFE2340 Precautions are required to prevent RF interference
of RFFE_MIPI communications; see the Antenna
USID = TBD USID = TBD Coupling onto MIPI_RFFE Interfaces page for details

RFFE2_DATA
RFFE2_CLK
Modem IC
USID = TBD USID = TBD USID = TBD

QFE1100 B11/B21 B13

PA ET PA PA

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 Antenna Coupling onto MIPI_RFFE Interfaces

High-level WAN Tx signals can couple

onto the MIPI_RFFE interface and disrupt
digital communications with the modem IC

Antenna

Modem IC
MIPI_RFFE

QFE
WTR circuitry
circuitry
Other
RFFE
devices

Case 1:
QFE and antenna on main board with nearby MIPI_RFFE via PCB traces

QFE PCB traces Modem IC

Main board

Case 2:
QFE and antenna on daughtercard with nearby MIPI_RFFE via flex cable

Flex connector traces

QFE Modem IC
Daughtercard Main board

Sec. 3.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 62
 MIPI_RFFE Layout Guidelines

PCB guidelines

PCB cross-section
C1 Upper ground fill

R1
D

C R2

C2
Ground vias
C = clock (123) Stripline traces with Coplanar ground fill
D = data (124) isolating coplanar ground Lower ground fill
Stripline traces

Flex connector guidelines using shielded cable

Flex cross-section
Upper ground fill

Coplanar ground fill

Lower ground fill
Stripline traces

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 Additional MIPI_RFFE Comments

 RF radiation from the antenna is the aggressor, and the MIPI_RFFE interface is the victim.
 MIPI_RFFE traces must be shielded – whether PCB or flex cable – especially in the vicinity of the antenna.
 Each MIPI_RFFE connection should be designed as 50–75 Ω stripline.
 The two signals (clock and data) should be isolated from one another using coplanar ground fill.
 Space and pads should be reserved near the QFE pins for RC filtering.
 Recommended starting values are: R = 0, C = DNI.
 Final values are determined through test and evaluation during product development.
 RC filtering suppresses antenna leakage before reaching QFE pins.
 Added capacitors may be limited when several RFFE components are connected to the same MIPI_RFFE interface
(cumulative device capacitance approaches allowed a maximum of 75 pF).
 The MIPI_RFFE interface runs at 19.2 MHz with very fast edges.
 Fast edges/high slew rates must be preserved for proper operation, and excess capacitance must be avoided (hence RC
filtering must be limited).

Sec. 3.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 64
 Support Circuits – Analog

Locate analog support components near their respective pins and connect them as directly as possible.
 QFE3320:
 External bias resistor (ANA_IO: 12 kΩ ± 1%)
 Charge pump capacitor (CP_NEG: 0.01 µF)

QFE3320
110

124
C586

R418

= Ground via
CP_NEG ANA_IO

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Section 3.3

DC Power

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 General DC Power Layout Techniques (1 of 2)

 RFIC and bypass capacitor on the same side

Star configuration with dedicated Daisy-chain configuration with shared

traces from capacitor to each RFIC pin traces from capacitor to multiple RFIC pins
9 23 36 48 61 9 23 36 48 61
Good 17 30 43 54 69
Bad 17 30 43 54 69

8 22 47 8 22 47

16 29 42 53 68 16 29 42 53 68

7 46 60 7 46 60

15 28 67 15 28 67

6 59 6 59

14 27 41 52 66 14 27 41 52 66

5 21 35 45 58 5 21 35 45 58

13 26 40 51 65 13 26 40 51 65

4 34 4 34

12 25 39 64 12 25 39 64

3 20 33 44 57 3 20 33 44 57

11 38 50 63 11 38 50 63

2 19 32 56 2 19 32 56

10 24 37 49 62 10 24 37 49 62

1 18 31 55 1 18 31 55

RF1 power busses RF1 power busses

If on same side, keep
this distance short
QFE circuits
C

DC PWR

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 General DC Power Layout Techniques (2 of 2)

 RFIC and bypass capacitor on opposite sides (if possible for a particular design)

Good VDD_RF bypass capacitor

from VREG

branch at
QFE device VDD_RF pads capacitor only

VDD_RF bypass capacitor do not branch at VDD_RF bypass capacitor

other places away
from capacitor

from VREG from VREG

Bad
QFE device VDD_RF pads QFE device VDD_RF pads
outer layer or inner layer

Opposite side bypassing is better Inductance loop

due to lower loop inductance QFE circuits

VDD vias
DC PWR
Ground vias

C
Ground
 See PMIC documentation for other DC routing guidelines such as trace width recommendations, sub-planes
vs. power buses, etc.
Sec. 3.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 68
 DC Power Supply Example – Schematic
TBD PM8994 TBD

PMIC
VREG_L12 PMD9635 VREG_L6

2.7 V 1.8 V

QFE1100 circuits
VPA_BATT VPA
VPA_APT

20 22
VDD_BIAS VDD_PA
C162 C181

DNI
R279
0.1 µF 22 pF 0Ω
others 7 others
QFE2340 VDD_DA
others C749

DNI
22 pF
18 4
VDD_MASTER VDD_DIG
C163 C164
100 pF 100 pF
R424
58 0Ω
VDD_LB_G_DA
QFE3320 R425
31 0Ω
VDD_MB_G_DA
61
67 VDD_LB_G_PA
VDD_2P7
C587 62
VDD_LB_G_PA
0.1 µF
53
VDD_MB_G_PA
R426
92 3.9
VDD_LB_U_DA
R_A
90 3.9
VDD_MB_U_DA
DNI 22 pF
100
VDD_MB_U_DA
130
VDD_LB_U_PA
52
VDD_MB_U_PA
111
VDD_1P8
C583
100 pF

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 DC Power Supply Example – VPA Layout (1 of 2)

1 8 15

20 25
= VPA power bus
28 30 35

41 43 46 50
= via to VPA power bus
51 56 61

64 68 73 = ground via
74 78 82 86
 This is based on the 80-NH379-43
88 93 94
reference design.
97 101 102 103 104 105 106
 Power is routed to the vias (and the bypass
108 114 119
capacitor where present) first, and then on
121 128 129 134
to the QFE power pins.
 Some pins are connected directly to the
VPA power bus.
C584

 Other pins include a series RL network

between them and the VPA power bus.
L512

L513

 Power buses and routing to components

R344

must use trace widths sufficient to support

R426 the expected maximum current.

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 DC Power Supply Example – VPA Layout (2 of 2)

Pin 100 (VDD_MB_U_DA) Pin 92 (VDD_LB_U_DA)

QFE1100 in the opposite Pin 52 (VDD_MB_U_PA)
side of the board Pin 90 (VDD_MB_U_DA) Pin 130 (VDD_LB_U_PA)

QFE3320

VPA (From QFE1100)

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 DC Power Supply Example – VPA_APT Layout (1 of 2)

C810

C811

C816
= VPA_APT power bus

L515 R424

L514
= VPA_APT power on intermediate layer
R425

= via to VPA_APT power bus

= ground via

 This is based upon the 80-NH379-43 reference design.

1 8 15
 Power is routed to the vias and bypass capacitors first, and
20 25
then on to the QFE power pins.
28 30 35
 Some pins are connected directly to the VPA_APT bus.
41 43 46 50

 Other pins include a series RL network between them and the 51 56 61

VPA_APT power bus. 64 68 73

 Power buses and routing must use trace widths sufficient to 74 78 82 86

support the expected maximum current. 88 93 94

97 101 102 103 104 105 106

108 114 119

121 128 129 134

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 DC Power Supply Example – VPA_APT Layout (2 of 2)

QFE1100 in the
Opposite side
of the board

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Section 3.4

Ground Connections

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 Ground Connections – General

 Connect ground pins as directly as possible to the nearest ground reference, and then to multiple ground fills
on multiple layers.
 Do not allow long, thin traces between pins and ground – the added trace inductance could disrupt circuit
performance.
 QTI recommends using microvias from the ground pads directly to the PCB ground plane.
 A total ground inductance of less than 100 pH is desired. If direct microvias are not possible, QTI
recommends several vias in parallel to reduce the overall inductance.
 Follow the mandatory keep-out areas on layer 1 under ICs where designated; do not daisy chain
the ground pins.
 Provide solid, continuous ground floods below the ICs.
 Connect IC ground pins and bypass caps’ ground pads directly to ground floods using micro-vias at each pin or pad. Using
the lower layer (main PCB ground plane) for ground return increases the loop inductance and may make bypassing less
effective.
Generic RFIC

pwr/signal
pwr/signal

pwr/signal
pwr/signal

pwr/signal

pwr/signal
pwr/signal
no pad
no pad
no pad
GND

GND

GND
GND

GND
L1
L2
L3
L4

Some QFEs require that metal is

L5
cleared in some areas under the IC
on layer 1. See the designated L6
PCB keep-out areas of each device L7
(where needed) for dimensions. L8

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 Recommended Ground Groupings

Important notes:
 Each ground pin must have its own ground via.
 They must follow the ground grouping (as shown) on the top layer.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

16 17 18 19 20 21 22 23 24 25 26 27

28 29 30 31 32 33 34 35 36 37 38 39 40

41 42 43 44 45 46 47 48 49 50

51 52 53 54 55 56 57 58 59 60 61 62

63 64 65 66 67 68 69 70 71 72 73

74 75 76 77 78 79 80 81 82 83 84 85 86

87 88 89 90 91 92 93 94 95

96 97 98 99 100 101 102 103 104 105 106 107

108 109 110 111 112 113 114 115 116 117 118 119

120 121 122 123 124 125 126 127 128 129 130 131 132 133 134

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Section 3.5

PCB Keep-out Areas

(PCB KOAs)

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 KOAs – General

 The KOAs on PCB layer 1 are required to avoid sensitive on-chip components.
 Do not include any PCB layer 1 metal within the KOAs defined within this document for each IC.
 No signal traces, power traces or fill, or ground traces or fill can be in the highlighted areas.
 Only solder mask is allowed in the highlighted areas.
 The recommended distance from the bottom of the QFE package to layer 2 ground fill is 285 µm.
 PCB layer 2 below the QFE device needs to be ground fill.

WLPSP package

Sensitive RF component

Layer 1 metal keepout

area below component

Do not position metal on the top

solder ball solder ball
layer in these areas – signal
solder mask solder mask routing, power, or ground
pad pad
layer 1

layer 2 Recommended clearance to

layer 2 metal is 285 µm (± 10%)
layer 3

Ground fill is recommended on layer 2 in most

areas; see the keep-out examples that follow

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 QFE3320-0 PCB KOAs

 KOAs are shown here;

dimensioned white areas must be clear
of metal (signal, power, or ground)
to a depth of 285 µm to minimize
coupling to internal sensitive circuits.

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 Layer 1 Keep-out Example (QFE3320-0)

Top layer: Must have metal cut-out for PCB KOA

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 Layer 2 Keep-out Example (QFE3320-0)

Layer 2: Must have metal cut-out here

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 Layer 3 Keep-out Example (QFE3320-0)

Must have separate

ground island here

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 QFE3320-1 PCB KOAs

 KOAs are shown here;

dimensioned white areas must be clear
of metal (signal, power, or ground)
to a depth of 285 µm to minimize
coupling to internal sensitive circuits.

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 Layer 1 Keep-out Example (QFE3320-1)

The top layer must have a metal cut-out for the PCB KOA.

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 Layer 2 Keep-out Example (QFE3320-1)

Layer 2 must have metal cut-out here

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 Layer 3 Keep-out Example (QFE3320-1)

Layer 3 must have

separate ground
island here

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Section 4

QFE3320-1 EPT General 4.1 Support Circuits

4.2 DC Power
88
90
4.3 Ground Connections 95
Design Guidelines

Applicable to all chipsets, applications, and RF

configurations

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Section 4.1

Support Circuits

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 Support Circuits – Analog

Locate analog support components near their respective pins and connect them as directly as possible.
 QFE3320:
 External bias resistor (ANA_IO: 12 kΩ ± 1%)
 Charge pump capacitor (CP_NEG: 0.01 µF)

QFE3320
110

124
C586

R418

= Ground via
CP_NEG ANA_IO

Sec. 4.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 89
Section 4.2

DC Power

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 90
 DC Power Supply Example – VPA Layout (1 of 2)

1 8 15

20 25
= VPA power bus
28 30 35

41 43 46 50
= via to VPA power bus
51 56 61

64 68 73 = ground via
74 78 82 86

88 93 94
 This is based on the 80-NH379-43 reference
97 101 102 103 104 105 106
design.
108 114 119
 Power is routed to the vias (and the bypass
capacitor where present) first, and then on to
121 128 129 134
the QFE power pins.
 Some pins are connected directly to the VPA
power bus.
C584

 Other pins include a series RL network

between them and the VPA power bus.
L512

L513
 Power buses and routing to components must
R344

use trace widths sufficient to support the

R426 expected maximum current.

Sec. 4.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 91
 DC Power Supply Example – VPA Layout (2 of 2)

QFE1100 in the opposite

side of the board

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 DC Power Supply Example – VPA_APT Layout (1 of 2)

C810

C811

C816
= VPA_APT power bus

L515 R424

L514
= VPA_APT power on intermediate layer
R425

= via to VPA_APT power bus

= ground via

1 8 15
 This is based on the 80-NH379-43 reference design. 20 25

 Power is routed to the vias and bypass capacitors first, 28 30 35

and then on to the QFE power pins. 41 43 46 50

 Some pins are connected directly to the VPA_APT bus. 51 56 61

64 68 73
 Other pins include a series RL network between them
74 78 82 86
and the VPA_APT power bus. 88 93 94

 Power buses and routing must use trace widths 97 101 102 103 104 105 106

sufficient to support the expected maximum current. 108 114 119

121 128 129 134

Sec. 4.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 93
 DC Power Supply Example – VPA_APT Layout (2 of 2)

QFE1100 in the
opposite side
of the board

Sec. 4.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 94
Section 4.3

Ground Connections

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 95
 Recommended Ground Groupings

Important notes:
 Each ground pin must have its own ground via.
 They must follow the ground grouping (as shown) on the top layer.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

16 17 18 19 20 21 22 23 24 25 26 27

28 29 30 31 32 33 34 35 36 37 38 39 40

41 42 43 44 45 46 47 48 49 50
Pin 89 removed
51 52 53 54 55 56 57 58 59 60 61 62

63 64 65 66 67 68 69 70 71 72 73

74 75 76 77 78 79 80 81 82 83 84 85 86

87 88 90 91 92 93 94 95

96 97 98 99 100 101 102 103 104 105 106 107

108 109 110 111 112 113 114 115 116 117 118 119

120 121 122 123 124 125 126 127 128 129 130 131 132 133 134

Note: Pin 89 is removed but all other pin numbers remain the same.
Sec. 4.3 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 96
Section 5

5.1 Regional 2DL CA Using WTR3925 99

Specific Design Guidelines 5.2 Dime Using WTR4905 108

Details for a specific chipset or RF configuration

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 97
 Specific Design Guidelines

This section provides design guidelines based on existing reference designs. Each example is presented as its
own subsection, and includes the following details:
 RF front-end functional block diagram
 Software-defined RF port assignments
 RFFE top-level parts placement
 RF schematic diagrams and layout guidelines for all RF ports

Sec. 5 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 98
Section 5.1

Regional 2DL CA Using

WTR3925

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 99
 Regional 2DL CA using WTR3925 Design Example
QFE2340
B40 RX
PRX_HB3
ANT0_HB B41 B38,41 B38,41 RX
PRX_HB4
B38
B40 B40
Note 1: QFE3320 can support LTE B8 in B30 B30
B7,30,
38/41,40 TX_MHB2
B7 B7
standalone mode only. This design supports LTE B11/B21 Support
B32 B7 PRX
2DL CA with B3 + B8 only when the UL is in B3. A B11/B21
B30 PRX
PRX_HB1
PRX_HB2
satellite B8 PA is needed if UL support on B8 is B32
B11/21
TX_MHB1
required. TX_FBRX_P
TX_FBRX_M TX_FBRX
B39 B11/21,32,34,39 PRX PRX_MB2
B1 PRX
PRX_MB5
Note 2: QFE3320 can support LTE B12/17 in BALUN
TX_FBRX_P
TX_FBRX_Q
B34
B1,3
B3/9 PRX
PRX_MB3
standalone mode only. This design supports LTE Note 1 B4 PRX
PRX_MB4
Note 2 B2,4
2DL CA with B4 + B12 and B4+B17 only when the B2,25 PRX
PRX_MB1
B25
UL is in B4. A satellite B12/17 PA is needed if UL B34/B39
support on B12/17 is required. TX_HMLB1
TX_HMLB2
Support
B1,2,3,4,25,34,39 TX_MHB3
G1800,G1900 TX_MHB4

ANT0_MLB
cpld QFE3320 WTR3925
MB
QFE
2520 LB
B5,18,19,26,8,20,28,
GSM LB
TX_LB1
TX_LB2
B12/17
TX_LB4

Note 1
B8,29
B8 PRX
B28B PRX_LB1

B20,28A B28,29 PRX

PRX_MLB6
QFE1100

Support
B5,18,19,26 B20 PRX
PA power

Bypass PRX_LB3
B5/B18/B19/B26 PRX
B12/17 PRX_LB4
APT
Note 2
B12/17,13 PRX
ET PRX_LB2
B13
B13
TX_LB3
ANT1_HB B7 B7 DRX DRX_HB1
B41
B38,41 DRX
Legend: B38 DRX_HB4
B30 B30 DRX
TX Path DRX_HB2
B40 B40 DRX DRX_HB3
RX Path

Support
B11,21,32 B32 B11,21,32,
39 DRX
TRX Path B11,21 DRX_MB2
B39
TX_FBRX Path B34,39
B34 B2/25,34 DRX
B2/B25 DRX_MB1
B2/25,4
ANT1_MLB B4 DRX DRX_MB4
QFE1040

B1 DRX
B1,3/9 DRX_MB5
MB B3/9 DRX
QFE DRX_MB3
B28A
2550 LB B28B B28,29 DRX
DRX_MLB6
B29
B8 B8 DRX
DRX_LB1
B12/B17 B12/B17,13 DRX
B13 DRX_LB2
B20 B20 DRX
DRX_LB3
B5/B26 B5/B18/B19/B26 DRX DRX_LB4

GNSS
GNSS_L1

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 100
 QFE3320 RF Port Assignment Summary – Low-band

RF port GSM CDMA WCDMA FDD-LTE TDD-LTE TD-SCDMA

IN_LB1 ― ― ― ― ― ―
IN_LB2 ― ― ― B12, B17 ― ―
IN_LB3 G850 BC0, BC10 B5, B6, B19 B5, B18, B19, B26 ― ―
G900 ― B8 B8, B29 ― ―
― B20, B28A
― ― B28B
―
TX_LB1 ― ― ― B12, B17 ― ―
TX_LB2 ― BC0, BC10 B5, B6, B19 B5, B18, B19, B26 ― ―
TX_LB3 ― ― ― B20, B28A ― ―
TX_LB4 ― ― ― B28B ― ―
TX_LB5 ― ― B8 B8 ― ―
TRX_LB1 ― ― ― B13 ― ―
TRX_LB2 ― ― ― B20, B28A ― ―
TRX_LB3 ― ― ― B28B ― ―
TRX_LB4 ― ― ― B8, B29 Rx ― ―
TRX_LB5 ― BC0, BC10 B5, B6, B19 B5, B18, B19, B26 ― ―
TRX_LB6 ― ― ― B12, B17 ― ―

Note: These port assignments reflect a slightly modified version of the latest reference schematic (80-NH379-43) available at
the time of this document’s release. Always check the latest release for updates. Any deviation from these recommendations
has not been tested by QTI.

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 101
 QFE3320 RF Port Assignment Summary – Mid-band
RF port GSM CDMA WCDMA FDD-LTE TDD-LTE TD-SCDMA
IN_MB1 GSM1800 ― ― ― ― ―
GSM1900 ― ― ― ― ―
IN_MB2 ― ― ― B1, B3 ― ―
― ― ― B2, B4 ― ―
― ― ― B25 ― ―
― ― ― B34, B39 ― ―
TX_MB1 ― BC1, BC14 ― B25 ― ―
― ― ― B39 B34, B39
TX_MB2 ― BC6 B1 B1 ― ―
TX_MB3 ― ― B3 B3 ― ―
TX_MB4 ― BC15 B4 B4 ― ―
TX_MB5 ― ― B2 B2 ― ―
TRX_MB1 ― ― ― ― B39 Rx B39 Rx
TRX_MB2 ― ― ― ― ― B34 Rx
TRX_MB3 ― ― B2, B4 B2, B4 ― ―
TRX_MB4 ― ― ― ― ― ―
TRX_MB5 ― ― ― ― B34 Tx, B39 Tx B34 Tx, B39 Tx
TRX_MB6 ― ― ― ― ― ―
TRX_MB7 ― ― ― B25 ― ―
TRX_MB8 ― ― B1, B3 B1, B3 ― ―

Note: These port assignments reflect the latest reference schematic (80-NH379-43) available at the time of this document’s
release. Always check the latest release for updates. Any deviation from these recommendations has not been tested by QTI.

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 102
 Regional 2DL CA RFFE Top-level Parts Placement

FL81
To/from antenna tuner

C803
L496 Diplexer

Mid-band paths U124 Low-band paths

C810

C811

C816
L518 L506 L494

L424
C809
L515 R424

C765
L514
R425 L423

C701
FL79

C700
C661
FL38

C580
L445

L380
FL72
L450

L360
C510

C713

L449
C702
L516
L336 1 8 15

20 25
C687 L361 C576
L425
28 30 35 C684 FL69
C575

C615

L500
L357 41 43 46 50

51 56 61
L363

C683
FL76
64 68 73 C578
74 78 82 86
L446
89 94 95

C706

L444

L454
C707
C660 98 102 103 104 105 106 107
C682 FL57

C579
FL37

109 115 120

L429
L379

122 129 130 135 L364

L430
C685

C586
C587

L359
C614
C584

C581 R418 FL54

C583

L365 L432

FL28
L512

FL55
L513

L358
C574
C582

C686

C709

L453
R344

C807
C738

R426
R354
R378
L378

C659

C764
FL27 R371

C773
L452 FL36
C767 C766
U122
C804
L335

L473
C806
FL41
U110
C714

C808

R428
C740
C741

C805

C509

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 103
 Regional 2DL CA QFE3320 LB – RF Schematic

Reference design is still being developed,

so component values are not included
L365 132
FL28 B12, B17 TX_LB1
24 C709 ANT C574 C614
TRX_LB6 126
L453 L432 FL55 IN_LB1
PRx L364

— — To/from WTR3925 — —
107
B5, etc TX_LB2
26 C706 ANT C579 C682 FL36
TRX_LB5 127 C807 C806
L444 L429 FL57 IN_LB2
PRx L363 95
B20, B28A TX_LB3
12 C702 ANT C578 C683
TRX_LB2 115
L449 L425 FL69 IN_LB3
PRx L361 86
B28B TX_LB4
11 C700 ANT C576 C684
To/from antenna

TRX_LB3
L423 L450 FL72
diplexer

C809 9
ANT_LB PRx L360 85
B8, B29 TX_LB5
DNI

L494
10 C701 ANT C580 C687
TRX_LB4

WTR3925 shield area

L424 FL79
Open antenna area

PRx PRx
FL76
13 C707
PA shield area

PA shield area
to/from
TRX_LB1 duplexer
L454 L430 Red lines are lengthy
B13
stripline connections

GSM LB Tx uses IN_LB1 input and does not go off-chip until the ANT_LB output

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 104
 Regional 2DL CA QFE3320 LB – RF Layout Guidelines
Diplexer LB port
L494

L424
C809
= Microstrip routing
L423

C701
FL79

C700
= Stripline routing

C580
(conceptual path, not actual) FL72
L450

= Ground via

L360

L449
C702
L516
1 8 15

20 25
C687 L361 C576
L425
28 30 35 C684 FL69

41 43 46 50

51 56 61
L363

C683
FL76
64 68 73 C578
74 78 82 86

89 94 95

C706

L444

L454
C707
98 102 103 104 105 106 107
C682

C579
109 115 120
L429

FL57
122 129 130 135 L364
L430

C614
FL54
L432

L365

FL28
FL55
C574

C709

L453
C807

R378

C764
R371

C773
FL36
C767 C766
U122
C804

L473
C806

U110 C808

R428
C740
C741

C805
B19/B20/B26/
B28/BC10 Tx

B13 Rx
GLB Tx &
B5/B8/B18/

B12/B17 Tx

B13 Tx

B12/B17 Rx

B5 etc Rx

B20/B28A Rx
B28B Rx
B8 Rx
B29 Rx
Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 105
 Regional 2DL CA QFE3320 MB – RF Schematic

B25
19 C659 ANT C509
TRX_MB6 Reference design is still being developed,
L378 L452 FL41 so component values are not included
PRx
R410
21 C738 B34, B39 R398 109
TRX_MB7 TX_MB1
L335 C714
R354
22 FL27
TRX_MB8

6 L359 87
To/from antenna

— — To/from WTR3925 — —
TRX_MB4 TX_MB3
L506 C581 C685 125
diplexer

C765 7 L358 IN_MB1

ANT_MB 96
1.5‒3.8 nH B1, B3 TX_MB2
1.5 pF 17 C660 ANT C582 C686
TRX_MB5
L446 L379 FL37
PRx PRx L357 74
TX_MB4
C575 C615 113
L336 IN_MB2
63
B2, B4 TX_MB5
5 C661 ANT C510 C713
TRX_MB3
L380 L445 FL38
PRx PRx
4 C672
TRX_MB2 U116

WTR3925 shield area

L393 B34 & B39
Open antenna area

or B11/B21
selection switch
3 C671
PA shield area

PA shield area
TRX_MB1 B34/B39
L392 Red lines are lengthy
stripline connections

GSM MB Tx uses IN_MB1 input and does not go off-chip until the ANT_MB output

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 106
 Regional 2DL CA QFE3320 MB – RF Layout Guidelines
Diplexer LB port
L518 L506

= Microstrip routing

C765
= Sripline routing
C661 (conceptual path, not actual)

FL38

L445

L380
= Ground via

C510

C713
L336 1 8 15

20 25

28 30 35

C575

C615
L357 41 43 46 50

51 56 61

64 68 73

74 78 82 86
L446
89 94 95

C660 98 102 103 104 105 106 107

FL37
109 115 120

L379
122 129 130 135

C685
L359

C581

L358
C582

C686

C738

R354
L378

C659

FL27

L452

L335

FL41
C714

C509
B2 Rx
B4 Rx
B3 Rx
B1 Rx
B25 Rx

B39 Rx
B34 Rx
GHB Tx
B1/B2/B3/B4/
B25/B34/B39 Tx

Sec. 5.1 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 107
Section 5.2

Dime Using WTR4905

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 108
 Dime Using WTR4905 Design Example
QFE2340
B38/B41
B40 B40
PRX_HB1
B7/B38/
B40/B41
B38/B41 TX_DA3

B7/B38/B41
B7 PRX_HB2

B34 B34/B39
PRX_MB1
B39
Shunt L required for all HB at B4/B2/BC1/G1900
PRX_MB2
close to QFE3320 TRx port
B3/BC6/B3/G1800
PRX_MB3

QFE2101
PA power
tracking
WTR4905
Support
B1/B2/B3/B4/
B34/B39/GHB
TX_DA1
ANT_0 QFE2550
Support
HB
QFE3320
TX_FBRX TX_FBRX
Tuner
LB
B5/BC0/B8/
B20/B26/GLB
TX_DA2
TX_FBRX
B17/B28
TX_DA4

B5/BC0/B26/G850
PRX_LB3
B8/G900
PRX_LB2

B17

B28a
B17/B20/B28
PRX_LB1
B28b

B20
B8 B8
DRX_LB3
B5/BC0/B26 B5/BC0/B26
DRX_LB2
B17
B28 B17/B20/B28
DRX_LB1
B20
ANT_1 QFE2550
B34/B39
Support B2/BC1/B3/B34/B39
B2/BC1 DRX_MB2
Tuner B3
B1/BC6/B4 B1/BC6/B4
DRX_MB1
B7
B7/B38/B41
B38/41 DRX_HB2
B40 B40
DRX_HB1
GNSS
GNSS_IN

Sec. 5.2 Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 109
Questions?
You may also submit questions to:
https://support.cdmatech.com

Confidential and Proprietary – Qualcomm Technologies, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-NJ121-5 Rev. E 110